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Low-Noise MEMS Microphone Readout Integrated Circuit Using Positive Feedback Signal Amplification
Low-Noise MEMS Microphone Readout Integrated Circuit Using Positive Feedback Signal Amplification
ETRI Journal. 2016. Apr, 38(2): 235-243
Copyright © 2016, Electronics and Telecommunications Research Institute (ETRI)
  • Received : July 25, 2015
  • Accepted : September 30, 2015
  • Published : April 01, 2016
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About the Authors
Yi-Gyeong Kim
Min-Hyung Cho
Jaewoo Lee
Young-Deuk Jeon
Tae Moon Roh
Chun-Gi Lyuh
Woo Seok Yang
Jong-Kee Kwon

Abstract
A low-noise readout integrated circuit (ROIC) for a microelectromechanical systems (MEMS) microphone is presented in this paper. A positive feedback signal amplification technique is applied at the front-end of the ROIC to minimize the effect of the output buffer noise. A feedback scheme in the source follower prevents degradation of the noise performance caused by both the noise of the input reference current and the noise of the power supply. A voltage booster adopts noise filters to cut out the noise of the sensor bias voltage. The prototype ROIC achieves an input referred noise (A-weighted) of −114.2 dBV over an audio bandwidth of 20 Hz to 20 kHz with a 136 μA current consumption. The chip is occupied with an active area of 0.35 mm 2 and a chip area of 0.54 mm 2 .
Keywords
I. Introduction
In recent years, microelectromechanical systems (MEMS) microphones have quickly replaced electret condenser microphones (ECMs). The reason for this is that an MEMS microphone has a wider range of operating temperature and a lead-free solder reflow capability for its automated assembly process [1] , [2] . In addition, recent audio recording technologies for mobile applications, such as HD voice, noise cancellation, beamforming, and always-on technologies, require a high signal-to-noise ratio (SNR) performance, precise part-to-part matching property, and low current consumption. During the last several years, the required SNR performance has increased from 58 dB to over 64 dB, and the required sensitivity variation has decreased from ±3 dB to ±1 dB [3] .
To improve the SNR, the performances of both an MEMS sensor and an ROIC have to be enhanced [4] . For a high SNR, the MEMS sensor has to be designed to obtain a high sensitivity in spite of a number of design trade-offs, such as noise, cost, and reliability. A low-noise readout integrated circuit (ROIC) must show a decrease in device noise despite trade-offs such as the current consumption and chip area.
In this paper, we present a low-noise ROIC for MEMS microphones with a positive feedback signal amplification technique that amplifies the electrical signals at the front-end of the ROIC to minimize the effect of the output buffer noise. The proposed ROIC uses several circuit techniques to lower the circuit noises; first, a source follower adopts a feedback scheme as an input buffer to reduce the effect of noises in a reference current from a bandgap reference. Second, noise filters are used at the input of the voltage booster regulator for minimizing the effect of the reference voltage noise, and at the output of the voltage booster for filtering out charge pump noise.
The remainder of this paper is organized as follows. Section II introduces the proposed architecture. Section III describes the circuit techniques used to lower the circuit noises. Section IV provides the measurement results, and Section V offers concluding remarks.
II. Proposed Architecture
Figure 1 shows the conventional analog ROIC architecture for MEMS microphones. For biasing an MEMS sensor, an ROIC applies high dc voltage to the MEMS sensor through an SBIAS node. The biased MEMS sensor produces a voltage signal at an IN node according to the sound pressure signal. An input buffer transmits the voltage signal at the IN node to an output amplifier with low output impedance. The role of the output amplifier is to amply the signal to match the required sensor signal level and to drive a resistive load within the audio frequency ranges. The input and output buffers are supplied from a regulator to improve the power supply rejection ratio (PSRR) and power supply rejection (PSR).
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Conventional ROIC architecture.
Figure 2 shows the proposed ROIC architecture. Whereas the conventional architecture amplifies a signal using the output amplifier, the proposed ROIC amplifies a signal using a positive feedback configuration. The positive feedback loop is formed with an input buffer, the capacitors of the low-pass filter in the voltage booster, and the MEMS sensor. This gain scheme reduces the noise contribution of the output buffer, which improves the SNR performance. In addition, the proposed ROIC can use a low-noise output buffer. To implement the gain stage such as the output amplifier of the conventional ROIC, the output amplifier has to use a non–unity gain feedback circuit and a reference voltage generator. This amplifier has more noise sources compared to the output buffer shown in Fig. 2 because the output buffer can be implemented with only unity gain feedback. Therefore, the proposed architecture can achieve a high SNR performance by reducing the noise effect of the output buffer and using the low-noise output buffer.
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Proposed ROIC architecture.
Figure 3 shows a simplified model for an SNR analysis of the two ROICs in Figs. 1 and 2 . Here, V S indicates the signal source, and V N1 and V N2 represent the noise sources of the input buffer and output amplifier (or output buffer), respectively. The output signal and output noise of the conventional ROIC can be derived as follows:
(1) V OUT1(SIGNAL) = A 2 ⋅ A 1 ⋅ A P ⋅ V S ,
(2) V OUT1(NOISE) = A 2 ⋅ V N2 + A 2 ⋅ A 1 ⋅ V N1 .
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Simplified ROIC models for SNR analysis: (a) conventional ROIC and (b) proposed ROIC.
The signal and noise equations of the proposed architecture are as follows:
(3) V OUT2(SIGNAL) = A 1 ⋅ A P ⋅ 1 1− A 1 ⋅ A P ⋅ A C ⋅ V S ,
(4) V OUT2(NOISE) = V N2 + A 1 ⋅ 1 1− A 1 ⋅ A P ⋅ A C ⋅ V N1 .
The gain of the proposed ROIC has to be the same as that of a conventional ROIC. In addition, for simplicity, the input buffer is assumed to have a gain of one. These two conditions are shown in (5) and (6).
(5) A 2 = 1 1− A 1 ⋅ A P ⋅ A C =G,
(6) A 1 =1.
By substituting (1) through (4) with (5) and (6), the outputs of the signal and noise can be expressed in (7) through (10).
(7) V OUT1(SIGNAL) =G⋅ A P ⋅ V S ,
(8) V OUT1(NOISE) =G⋅( V N1 + V N2 )
(9) V OUT2(SIGNAL) =G⋅ A P ⋅ V S ,
(10) V OUT2(NOISE) =G⋅( V N1 + 1 G ⋅ V N2 ).
Equations (7) through (10) show that the proposed ROIC has an SNR performance that is superior to that of a conventional ROIC. To adjust the sensitivity of the microphone to −38 dBV/Pa or −42 dBV/Pa, the ROIC amplifies the signal by 0 dB to 8 dB according to the sensitivity of the MEMS sensors. Whereas the output amplifier noise of a conventional ROIC is increased according to the gain, the output buffer noise of the proposed ROIC represents no increases in the ROIC output. For example, if the required gain of the ROIC, G , is 4 dB and the input buffer and output amplifier (or output buffer) have the same noise power, then the noise level of the proposed ROIC will be 1.8 dB less than that of a conventional ROIC.
III. Circuit Techniques and Implementation
- 1. Low-Noise Source Follower
The input buffer in the MEMS microphone ROIC can be implemented using either an operational amplifier with a unity gain feedback network or a source follower. The input buffer using an operational amplifier (OPA buffer) can have a large output swing range. In addition, because the OPA buffer has a differential input stage, there is little increase in noise at its output due to the noise of the reference current from the bandgap reference. Despite the advantages mentioned above, the OPA buffer has certain problems in terms of low power and high SNR. The OPA buffer consumes more current to satisfy the noise requirement, because the OPA buffer has more noise sources due to both a differential architecture and an additional circuit to meet the operating point of the input transistors. In addition, the OPA buffer causes a large signal loss due to a large input capacitance because of the Miller effect formed by the common source input stage of the operational amplifier. On the other hand, the source follower is able to receive an input signal with a 0 V dc offset and consumes less current compared to the OPA buffer owing to its simple circuit configuration.
In addition, the source follower as the input buffer has a lower input capacitance than the OPA buffer, resulting in less signal loss. Therefore, the source follower is suitable for low power and a high SNR as the input buffer [5] .
Figure 4(a) shows a typical source follower. Although the source follower has a low signal loss, degradations may be caused by the external noise sources such as the reference current, I REF , and power supply because the source follower has a single-input and single-output architecture. To suppress the reference current noise and power supply noise, a negative feedback scheme is adopted, as shown in Fig. 4(b) . The feedback loop is composed of gain-stage 1 with a 14 dB gain, and gain-stage 2 with a 7.5 dB gain by adding a resistor, R D , and an amplifier, Amp2. The noises from the reference current and power supply are suppressed by a loop gain of 21.5 dB. Flicker noise and thermal noises of the input transistor, PM1, are optimized by increasing both the area and the transconductance of the input transistor. The noise simulation results of the typical source follower of Fig. 4(a) and the low-noise source follower of Fig. 4(b) are −105 dBV and −117 dBV, respectively. Despite the additional noise contribution of R D and Amp2 for the negative feedback loop, which is 13.2% of total noise of the source follower, the low-noise source follower using the negative feedback scheme shows superior noise performance.
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Circuit schematics of (a) typical source follower and (b) low-noise source follower.
The typical source follower with a single-input and single-output architecture has poor PSRR and PSR performances. The PSRR and PSR can be improved using a regulator for the input buffer, as presented in Figs. 1 and 2 . However, the PSRR and PSR improvements using the regulator are limited, because the regulator, which consumes a several micro-ampere current, has a limited regulation performance over a signal bandwidth of 20 Hz to 20 kHz. The negative feedback in the low-noise source follower additionally enhances the PSRR and PSR performances. Therefore, the low-noise source follower and regulator can provide sufficient PSRR and PSR performances.
- 2. Low-Noise Voltage Booster
The bias voltage to the MEMS sensor is 10 V dc; it must be independent of the supply voltage variation for stable sensitivity and have the property of low noise.
Power-supply independent voltage can be generated using a voltage multiplier by receiving a reference voltage from the bandgap reference, as shown in Fig. 5 . The property of low noise can be achieved by designing a low-noise voltage regulator, a clock generator, and a voltage multiplier. However, this approach for such a low noise performance requires a large current consumption.
To reduce the A-weighted noise of V SBIAS over a signal bandwidth of 20 Hz to 20 kHz with minimized current consumption, the voltage booster uses two low-pass filters, noise filters 1 and 2, as shown in Fig. 5 . Noise filters 1 and 2 are implemented with a capacitor and a back-to-back diode that represent a low-pass filter with a pole at several hertz. The noise filters cut out any in-band noise within a bandwidth of 20 Hz to 20 kHz. However, the back-to-back diode at the noise filters generates additional noise. This noise is negligible over the signal bandwidth because the noise is not only filtered out with a transfer function of the noise filter but also weighted through the A-weighting function [6] . Noise filter 1 filters out the noise of the reference voltage from the bandgap reference. Moreover, noise filter 1 prevents the switching noise of the clock generator from deteriorating the reference voltage of the bandgap reference. Noise filter 2 cuts out the noise and provides capacitors to add the output signal of the input buffer to the output signal of the voltage multiplier. The designed voltage booster outputs 10 V dc with −120 dBV noise.
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Circuit schematic of voltage booster using noise filters.
- 3. Unity Gain Output Buffer
Figure 6 shows the output buffer, which is implemented with a two-stage class AB operational amplifier and a unity gain feedback loop to provide a minimum of 3 kΩ resistive-load drive capability at the in-band frequency. To satisfy a target noise of −116 dBV, input transistors NM1 and NM2 have large sizes for low flicker noise and high transconductance for low thermal noise. The noise simulation result shows −116 dBV of noise. Miller compensation is used to ensure stability in the case of a light capacitive load, and zero compensation using a series resistor, Rz, at the output is adopted to maintain a phase margin of 60° in the case of a heavy capacitive load of up to 100 pF.
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Output driver.
IV. Measurement Results
The bare prototype chip for a microphone module was fabricated in a 0.35 μm CMOS technology and occupies an active area of 0.35 mm 2 and a chip area of 0.54 mm 2 (0.95 mm × 0.57 mm), as shown in Fig. 7 . The total current consumption is 136 μA from a 1.8 V supply. The supply voltage ranges from 1.5 V to 3.6 V. Figure 8 shows the test configuration for the ROIC performance measurement. This configuration was fabricated in a chip and assembled in a quad-flat no-leads (QFN)-type package to minimize the parasitic capacitance at the signal input node. For the signal gain measurement, the package chip includes two ROICs with target gains of 0 dB and 6.8 dB, which are indicated by ROIC-A and ROIC-B, respectively. A coupling capacitor of 1 pF for the signal input is denoted by Cs. As the capacitance at the SBIAS node in the ROIC is 40 pF, which is much larger than that of Cs, Cs can be negligible in the SBIAS node.
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Photograph of ROIC chip.
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Test configuration for ROIC measurement.
Figures 9(a) and 9(b) show the measured output spectrums when a sinusoidal signal of −15 dBV is applied to Cs. The signal power values of ROIC-A and ROIC-B are −53.2 dBV and −46.4 dBV, respectively. These values indicate that ROIC-B amplifies the signal with a gain of 6.8 dB using the proposed positive feedback architecture. Figures 9(c) and 9(d) show the measured output spectrums of ROIC-A and ROIC- B without signals through Cs, where the A-weighted output noise power over a signal bandwidth of 20 Hz to 20 kHz is −110.6 dBV and −107.4 dBV, respectively. These results show that the input-referred noise of ROIC-B adopting positive feedback signal amplification is enhanced by 3.6 dB compared to that of ROIC-A. Figures 10(a) and 10(b) show that ROIC-A and ROIC-B have similar frequency responses; that is, that of a high-pass filter with −3 dB cut-off frequency of about 20 Hz in the range of 20 Hz to 20 kHz. The frequency response of a microphone module depends on a ventilation hole, a front chamber geometry, and a back chamber geometry. Typical microphones show a low −3 dB cut-off frequency in the range of 50 Hz to 100 Hz and a high ±3 dB cut-off frequency in the range of 15 kHz to 20 kHz [7] , [8] . Therefore, both ROIC-A and ROIC-B can convert the signal from a MEMS sensor to an analog voltage signal without signal bandwidth loss.
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FFT plots of ROIC test configuration for (a) ROIC-A output signal, (b) ROIC-B output signal, (c) ROIC-A output noise, and (d) ROIC-B output noise.
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Frequency response plots of ROIC test configuration for (a) ROIC-A output signal and (b) ROIC-B output signal.
The MEMS microphone modules were fitted with both an MEMS sensor for a 62 dB SNR product and an ROIC, as shown in Fig. 11 . The microphone module with ROIC-A is referred to as MIC-A; similarly, that with ROIC-B is referred to as MIC-B. Table 1 shows the measured three-sample averaged values of two types of microphone modules. The gain of MIC-B is 10.3 dB, which is calculated from the sensitivity results of −44.0 dBV/Pa for MIC-A and −33.7 dBV/Pa for MIC-B. The gain difference between the test configuration for the ROIC performance measurement and the microphone module is caused by differences in the sensor model, especially the parasitic capacitance at the IN node. The microphone module has a parasitic capacitance of 160 fF at the IN node (corresponding to 400 fF in the test configuration of the ROIC). The input-referred noises are −106.4 dBV for MIC-A and −106.9 dBV for MIC-B. MIC-A and MIC-B show SNR levels of 62.4 dB and 62.9 dB, respectively. The SNR of MIC-B is higher than that of MIC-A by 0.5 dB. This result shows the superior noise performance of the positive feedback gain architecture. Figure 12 shows the measured output spectrum of MIC-B for (a) the noise level, (b) PSRR, and (c) PSR. Although the PSR has to be measured using an A-weighted filter [9] , the PSR is measured under an un-weighted condition because the measurement equipment does not support a plot function of an A-weighted output spectrum. The measured PSRR and PSR show good performances. A performance summary of the ROIC is shown in Table 2 . Table 3 provides a performance summary of the MEMS microphone module and a comparison with other MEMS microphones, as well as indicating that this work achieves a good noise performance and PSRR performance.
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Photograph of MEMS microphone module.
Measured results of microphone modules.
Parameter MIC-A MIC-B
Sensitivity (dBV/Pa) −44.0 −33.7
Gain (dB) 0 10.3
Output noise (dBV), AW1) −106.4 −96.6
Input referred noise (dBV), AW1) −106.4 −106.9
SNR (dB) 62.4 62.9
A-weighted
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FFT plots of microphone module output for (a) noise level, (b) PSRR, and (c) PSR.
ROIC performance summary.
Parameter Measured result
Power supply voltage (V) 1.5–3.6
Current consumption (μA) 136
VSBIAS voltage (V) ~10
Gain (dB) 0, 6.8 (Fig. 8 sensor model)
Max. output signal (dBV1)) −11
Input referred noise (dB) −114.2 (A-weighted)
Dynamic range (dB) 103.2 (A-weighted)
THD (%) < 0.02 @ −28 dBV output
Active area/chip area (mm2) 0.35/0.54
Technology 0.35 μm CMOS technology
Output signal in the case of 10% THD
Performance comparison of MEMS microphone.
Parameter This work 1) [1] 2) [10]
Bandwidth (Hz) 20–20 k 20–20 k 20–20 k
Sensitivity (dBV3)) −33.7 −33 −35.1
Gain (dB) 10.3 8 N/A
SNR (dB) 62.9 65.5 58
Input referred noise (dBV) −106.9 −106.5 N/A
PSRR (dB4)) −62.5 −55 N/A
PSR (dBV5)) −89.4 6) N/A N/A
Supply range (V) 1.5–3.6 1.8–3.6 4–6
Current consumption (μA) 136 120 500
Active area (mm2) 0.35 3 0.25
Technology (μm) 0.35 0.18 0.16
Three-sample average value Results when using two microphone sensors At 94 dB SPL 1 kHz, 100 mVpp sine wave is superimposed on VDD 217 Hz, 100 mVpp square wave is superimposed on VDD Un-weighted value
V. Conclusion
A low-noise ROIC for an MEMS microphone was presented in this paper. A positive feedback signal amplification technique was applied at the front-end of the ROIC to minimize the effect of the output buffer noise. The feedback scheme in the source follower prevents a degradation of the noise performance caused by both the noise of the input reference current and the noise of the power supply. Noise filters are used in the voltage booster to cut out the noise of the sensor bias voltage. The prototype ROIC achieves an input-referred noise (A-weighted) of −114.2 dBV over an audio bandwidth of 20 Hz to 20 kHz with a 136 μA current consumption. In addition, the microphone modules assembled with the ROIC and an MEMS sensor of a 62 dB SNR product achieve an SNR of 62.9 dB. The chip has an active area of 0.35 mm 2 and a total area of 0.54 mm 2 .
This work was supported by the IT R&D program of MKE/KEIT, Rep. of Korea (10035570, Development of self-powered smart sensor node platform for smart&green).
BIO
Corresponding Author kimyig@etri.re.kr
Yi-Gyeong Kim received his BS degree in electronic, electric, and communication engineering from Pusan National University, Rep. of Korea, in 2003 and his MS degree in electrical engineering from the Korea Advanced Institute of Science and Technology, Daejeon, Rep. of Korea, in 2005. He subsequently joined ETRI. He is currently involved in the design of readout integrated circuits for MEMS microphones and sensor interface circuits for automotive systems. His research has been focused on analog/mixed-signal integrated circuits including sigma-delta data converters, nyquist-rate data converters, and low-noise sensor interfaces.
minhyung@etri.re.kr
Min-Hyung Cho received his BS degree in electronic engineering from Hanyang University, Seoul, Rep. of Korea, in 1998 and his MS degree in electrical engineering from the Korea Advanced Institute of Science and Technology, Daejeon, Rep. of Korea, in 2000. Since 2000, he has been with ETRI, where he is now a senior researcher. He is involved in designing high-speed digitalto- analog converters and bus driver ICs for automotive systems. His research interests include CMOS analog and mixed-mode integrated circuit design.
jaewoo@etri.re.kr
Jaewoo Lee received his BS degree in electrical and electronics engineering from Korea University, Seoul, Rep. of Korea, in 2000 and his MS degree in information and communication engineering from Gwangju Institute of Science and Technology, Rep. of Korea, in 2002. After this, he joined a microsystems team at ETRI, where he focused on RF MEMS switches for a front-end antenna module. Since 2006, he has developed MEMS microphones for mobile applications. In addition, he is currently working toward his PhD degree in electrical engineering at the Korea Advanced Institute of Science and Technology, Daejeon, Rep. of Korea.
ydjeon@etri.re.kr
Young-Deuk Jeon received his BS and MS degrees in electronic engineering from Sogang University, Seoul, Rep. of Korea, in 1998 and 2000, respectively. Since September 2005, he has been with ETRI. He is currently involved in the design of analog front-end circuits for image signal processing and sensor interface circuits. His research has been focused on high-resolution low-power CMOS data converters and low-voltage CMOS analog circuit design.
tmroh@etri.re.kr
Tae Moon Roh received his BS, MS, and PhD degrees in electronic engineering from the School of Electrical Engineering & Computer Science, Kyungpook National University, Daegu, Rep. of Korea, in 1984, 1986, and 1998, respectively. In 1988, he joined ETRI. Since 1988, he has worked at the Information & Communications Core Technology Research Laboratory, where he is now a principal researcher. From 2014 to 2015, he worked at the University of Texas at Arlington, USA, as a visiting researcher. He was engaged in research for the development of process technology for digital/analog CMOS ICs and power ICs; improving reliability of ultrathin gate oxides; and evaluating hot carrier effects of MOSFETs. He studied low power digital circuits, multimedia SoCs with reconfigurable processors, vision SoC platforms for intelligent vehicles, and readout integrated circuits for ubiquitous sensor networks. His current interests are SiC power devices for hybrid electric vehicles and intelligent sensors for bio health monitoring and health care systems.
cglyuh@etri.re.kr
Chun-Gi Lyuh received his BS degree in computer engineering from Kyungpook National University, Daegu, Rep. of Korea, in 1998. He received his MS and PhD degrees in electrical engineering and computer science from the Korea Advanced Institute of Science and Technology, Daejeon, Rep. of Korea, in 2000 and 2004, respectively. He joined ETRI in 2004 and is currently a principle member of the research staff. His current research interests include mixed-signal processing and digital integrated-circuit design.
wsyang68@etri.re.kr
Woo Seok Yang received his BS, MS, and PhD degrees in materials science and engineering from Pohang University of Science and Technology, Rep. of Korea, in 1991, 1993, and 1998, respectively. From 1998 to 2001, he worked for SK Hynix Inc., Icheon, Rep. of Korea. Since 2001, he has been with ETRI, where he is now a principal researcher. His main research interests are smart sensors and MEMS devices.
jkkwon@etri.re.kr
Jong-Kee Kwon received his BS and MS degrees in electronics engineering from Yeungnam University, Gyeongsan, Rep. of Korea, in 1981 and 1983, respectively, and his PhD degree in electrical engineering from the Korea Advanced Institute of Science and Technology, Daejeon, Rep. of Korea, in 2004. Since 1984 he has been with ETRI, where he woks mainly on the development of analog integrated circuits (ICs). As the technical manager of the Mixed-Signal Product Engineering Department at ETRI, he currently is involved in the Development of high-speed, high-performance mixed-signal ICs, including low-voltage/low-power analog functions; amplifiers; high-speed/high-resolution data converters; PLL/VCO; and analog interfaces for sensor or MEMS systems.
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