Advanced
Performance of Solution Processed Zn-Sn-O Thin-film Transistors Depending on Annealing Conditions
Performance of Solution Processed Zn-Sn-O Thin-film Transistors Depending on Annealing Conditions
Transactions on Electrical and Electronic Materials. 2015. Apr, 16(2): 62-64
Copyright © 2015, The Korean Institute of Electrical and Electronic Material Engineers
This is an open-access article distributed under the terms of the Creative Commons Attribution Non-Commercial License (http://creativecommons.org/licenses/by-nc/3.0) which permits unrestricted noncommercial use, distribution, and reproduction in any medium, provided the original work is properly cited.
  • Received : December 12, 2014
  • Accepted : February 02, 2015
  • Published : April 25, 2015
Download
PDF
e-PUB
PubReader
PPT
Export by style
Share
Article
Author
Metrics
Cited by
TagCloud
About the Authors
Sangmin Han
Sang Yeol Lee
sylee@cju.ac.kr
Jun Young Choi
Abstract
We have investigated zinc tin oxide (ZTO) thin films under various silicon ratios. ZTO TFTs were fabricated by solution processing with the bottom gate structure. Furthermore, annealing process was performed at different temperatures in various annealing conditions, such as air, vacuum and wet ambient. Completed fabrication of ZTO TFT, and the performance of TFT has been compared depending on the annealing conditions by measuring the transfer curve. In addition, structure in ZTO thin films has been investigated by X-ray diffraction spectroscopy (XRD) and Scanning electron microscope (SEM). It is confirmed that the electrical performance of ZTO TFTs are improved by adopting optimized annealing conditions. Optimized annealing condition has been found for obtaining high mobility.
Keywords
1. INTRODUCTION
Oxide semiconductor which has been studied extensively as a semiconductor material has a wide band gap and high mobility. Amorphous oxide semiconductors (AOSs) such as ZnO-based thin film transistors (TFTs) have attracted much attention for their application to integrated circuits used in backplane of active matrix displays, because of their higher electrical and optical property than that of amorphous silicon thin film transistors (a-Si TFTs) and low production cost compared with the lowtemperature polycrystalline silicon (LTPS). The AOSs TFTs have shown high mobility due to their ns-orbital overlap structure. In addition, AOS thin-films have advantages of transparency in the visible range due to a large bandgap(~3.3 eV) [1 - 3] . Recently, there have been many reports on different active layer materials of AOSs TFTs. Among them, the material that is most extensively used currently is indium-gallium-zinc-oxide (IGZO) [4] . However, indium is an expensive and rare material, and indium-free materials, like zinc tin oxide (ZTO), have been studied intensively these days [5 , 6] . Because indium is not an abundant material, it is necessary to reduce indium usage for the future. Most of AOSs TFTs are annealed for the improvement of electrical performance and stability of device after deposition at room temperature (RT). Thermal annealing parameters are observed to be closely related with the annealing temperature and the ambient condition [7] . Therefore, it is very important to optimize the annealing process [8 , 9] .
In this paper, we have fabricated zinc tin oxide (ZTO) TFTs without indium and compared them in the air and in wet and vacuum ambient with different annealing conditions. Followed by the completed fabrication of ZTO TFT, the performance of TFT has been compared depending on the annealing conditions.
2. EXPERIMENTS
ZTO films were deposited by solution process on a SiO 2 (200 nm)/p-type Si(heavily doped) substrate with the bottom gate structure. A 0.05 M precursor solution of ZTO was prepared by solution method, dissolving mixture of tin chloride [ZrCl 4 ] and zinc acetate dihydrate [Zn(CH 3 COO) 2 ·2H 2 O] in 2-methoxyethanol [C3H8O 2 ] and H 2 O 2 . Then, it was stirred at 50℃ for 12 h to form the ZTO sol-gel precursor. The molar ratio of Zn:Sn was fixed at 3:7.
Figure 1 shows the schematic diagram of ZTO TFT structure. The ZTO film thickness was about 40 nm and patterned by using photolithography. The channel width and length are 250 μm and 50 μm, respectively. After deposition of the ZTO films, source and drain electrodes (Ti/Au=10 nm/50 nm) were fabricated by ebeam evaporation and lift off process. Then, annealing process was performed in different annealing conditions, such as air, wet and vacuum ambient. The ZTO TFT was annealed at 500℃ for 2 h. Air annealing treatment was performed in atmosphere condition, while wet annealing was performed in the ambient of heated de-ionized (DI) water. The amorphous structure of ZTO thin films was confirmed by X-ray diffraction (XRD). All electrical performance were measured by using a semiconductor parameter analyzer(EL 423).
PPT Slide
Lager Image
Schematic diagram of ZTO TFTs structure.
3. RESULTS AND DISCUSSION
Figure 2 shows XRD patterns of ZTO thin films. The X-ray diffraction profiles for the films that are annealed at 500℃ exhibited amorphous structure [10 , 11] .
PPT Slide
Lager Image
X-ray diffraction (XRD) spectrum of ZTO thin-film.
Figure 3 shows the surface microstructure of the ZTO thin films analyzed by SEM. In ZTO thin films, the surface is composed of small and uniform grains.
PPT Slide
Lager Image
SEM image of ZTO thin film.
Figure 4 shows transfer characteristic of air, wet and vacuum annealed ZTO TFTs measured at V DS =5.1 V. Gate voltage (V GS ) was swept from –30 V to 20 V. Transfer curve shows drain current of log plot (black line) and leakage current of linear plot (red line). We deduced threshold voltage (V th ) by extrapolation method in linear plot of drain current.
PPT Slide
Lager Image
Transfer characteristic of ZTO TFTs with (a) air ambient, (b) vacuum ambient, (c) wet ambient annealing condition, and (d) mobility, subthreshold swing, and threshold voltage graph.
Table 1 shows the electrical performance of ZTO TFTs with different annealing condition. The field-effect mobility (μ FE ) was calculated by using the following relation: [12]
The electrical performance of ZTO TFTs with different annealing condition.
PPT Slide
Lager Image
The electrical performance of ZTO TFTs with different annealing condition.
PPT Slide
Lager Image
where, g m is the transconductance; C ox is the oxide capacitance of the gate insulator; W and L are channel width and length, respectively. In the case of air annealing, the threshold voltage (V th ), subthreshold slop (SS), drain current on/off ratio (I on/off ), and μ FE were measured to be about –6.4 V, 1.41 V/decade, 1.7 × 10 7 , and 8.2 cm 2 /Vs, respectively. For the wet annealing, the V th , SS, Ion/off, and the μ FE were measured to be about –10.6 V, 0.56 V/decade, 1.1 × 10 7 , and 9.23 cm 2 /Vs, respectively. Also, in vacuum annealing, the Vth, SS, I on/off , and the μFE were measured to be about –10.4 V, 0.77 V/decade, 8.4 × 10 6 , and 9.87 cm 2 /Vs, respectively. Based on these results, it is interesting to note that wet and vacuum annealing treatment can improve the electrical characteristics of the device. It is understood by the generation of free electrons by adopting wet and vacuum annealing process. In the case of wet annealing, two possible mechanisms could be proposed to explain the performance improvement. One of the mechanisms is oxygen atoms of ZTO film reacting with neighboring hydrogen to generate H 2 O. This mechanism can be described as follows: [13]
PPT Slide
Lager Image
where, Vo··an ionized oxygen vacancy, and e- denotes free electron. The second possibility is the carrier injection by the adsorption of H 2 O on the a-ZTO surface. H 2 O adsorption donates a partial negate charge to the channel surface with either molecules or hydroxyl forms [14] . In this case, the role of H 2 O could be defined as a donor. When the devices were annealed in vacuum, the oxygen in the channel would go through desorption from the device and induce more carrier concentration as well as density of states. On the other hand, air annealing treatment reduces the defective states such as oxygen vacancy [5] . It is understood by passivation effect of oxygen atoms.
Vacuum annealing process provides large amount of free electron, due to relatively less amount of oxygen in the furnace. Consequently, carrier concentration is increased by wet and vacuum annealing process.
4. CONCLUSIONS
In summary, we have fabricated the amorphous ZTO TFTs by solution process with different annealing conditions in the air, wet and vacuum ambient. XRD data shows the amorphous structure of ZTO thin films. The air annealing process reduces the sub-gap defective states, such as oxygen vacancy, and decreases the instability of the channel material. However, air annealing has suppressed the generation of free electron; hence, electrical performance was deteriorated. As a result, electrical characteristics such as field effect mobility and subthreshold swing were improved after wet and vacuum annealing treatment compared with air annealing treatment. Through this result, it is expected that wet and vacuum annealing process can improve device performance.
References
Kamiya T. , Nomura K. , Hosono H. 2009 Journal of display Technology http://dx.doi.org/10.1109/JDT.2009.2034559 5 468 -
Kamiya T. , Nomura K. , Hosono H. 2009 Journal of Display Technology http://dx.doi.org/10.1109/JDT.2009.2022064 5 462 -
Chong E. , Chun Y. S. , Kim S. H. , Lee S. Y. 2011 Journal of Electrical Engineering & Technology http://dx.doi.org/10.5370/JEET.2011.6.4.539 6 539 -
Nomura H. , Ohta H. , Takagi A. , Kamiya T. , Hirano M. , Hosono H. 2004 Nature http://dx.doi.org/10.1038/nature03090 432 488 -
Fortunato E.M.C. , Pereira L.M.N. , Barquinha P.M.C. , do Rego A.M.B. , Goncalves G. , Vila' A. , Morante J. R. , Martins R.F.P. 2008 Appl. Phys. Lett. http://dx.doi.org/10.1063/1.2937473 92 222103 -
Choi J. Y. , Kim S. S. , Lee S. Y. 2013 J. Nanosci. Nanotechnol. http://dx.doi.org/10.1166/jnn.2013.7632 13 7089 -
Son D. H. , Kim D. H. , Kim J. H. , Park S. N. , Sung S. J. , Kang J. K. 2013 J. Nanosci. Nanotechnol. http://dx.doi.org/10.1166/jnn.2013.7026 13 4211 -
Guill'en C. , Herrero J. 2007 J. Appl. Phys. http://dx.doi.org/10.1063/1.2715539 101 073514 -
Park S. , Bang S. , Lee S. , Park J. , Ko Y. , Jeon H. 2011 J. Nanosci. Nanotechnol. http://dx.doi.org/10.1166/jnn.2011.4360 11 6029 -
Wu C. , Li X. , Lu J. , Ye Z. , Zhang J. , Zhou T. , Sun R. , Chen L. , Lu B. , Pan X. 2013 Appl. Phys. Lett. http://dx.doi.org/10.1063/1.4818728 103 082109 -
Chong E. G. , Kang I. J. , Park C. H. , Lee S. Y. 2013 Thin Solid Films http://dx.doi.org/10.1016/j.tsf.2013.02.033 534 609 -
Shea P. B. , Kanicki J. 2005 J. Appl. Phys. http://dx.doi.org/10.1063/1.1949713 98 014503 -
Nomura K. , Kamiya T. , Ohta H. , Hirano M. , Hosono H. 2008 Appl. Phys. Lett. http://dx.doi.org/10.1063/1.3020714 93 192107 -
Park J. S. , Jeong J. K. , Chung H. J. , Mo Y. G. , Kim H. D. 2008 Appl. Phys. Lett. http://dx.doi.org/10.1063/1.2838380 92 072104 -