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Modeling and Feedback Control of LLC Resonant Converters at High Switching Frequency
Modeling and Feedback Control of LLC Resonant Converters at High Switching Frequency
Journal of Power Electronics. 2016. May, 16(3): 849-860
Copyright © 2016, The Korean Institute Of Power Electronics
  • Received : September 19, 2015
  • Accepted : December 09, 2015
  • Published : May 20, 2016
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About the Authors
Hwa-Pyeong, Park
School of Electrical and Computer Engineering, Ulsan National Institute of Science and Technology, Ulsan, Korea
Jee-Hoon, Jung
School of Electrical and Computer Engineering, Ulsan National Institute of Science and Technology, Ulsan, Korea
jhjung@unist.ac.kr

Abstract
The high-switching-frequency operation of power converters can achieve high power density through size reduction of passive components, such as capacitors, inductors, and transformers. However, a small-output capacitor that has small capacitance and low effective series resistance changes the small-signal model of the converter power stage. Such a capacitor can make the converter unstable by increasing the crossover frequency in the transfer function of the small-signal model. In this paper, the design and implementation of a high-frequency LLC resonant converter are presented to verify the power density enhancement achieved by decreasing the size of passive components. The effect of small output capacitance is analyzed for stability by using a proper small-signal model of the LLC resonant converter. Finally, proper design methods of a feedback compensator are proposed to obtain a sufficient phase margin in the Bode plot of the loop gain of the converter for stable operation at 500 kHz switching frequency. A theoretical approach using MATLAB, a simulation approach using PSIM, and experimental results are presented to show the validity of the proposed analysis and design methods with 100 and 500 kHz prototype converters.
Keywords
I. INTRODUCTION
Products in industrial fields, such as light-emitting diodes, television sets, computers, and other home appliances require a small size and high functionality. To achieve these requirements, the switched-mode power supply (SMPS) should be small while supplying the same power rate. An effective method to improve the power density is to increase the switching frequency because it reduces the size of the passive component. Although high-switching-frequency operation has several obstacles, such as large switching losses, large hysteresis losses, and electro-magnetic interference problems, it is one of the state-of-the-art trends in SMPSs to achieve high power density. With regard to high-frequency switching in power converters, an LLC resonant converter has several advantages [1] - [3] . Compared with hard-switching pulse-width modulatin (PWM) converters and asymmetrical half-bridge converters, the LLC resonant converter has small circulating current and small switching losses by using the soft-switching techniques, such as zero-voltage switching (ZVS) for primary metal–oxide–semiconductor field-effect transistors (MOSFETs) and zero-current switching (ZCS) for secondary diodes [4] - [8] . Previous research has sufficiently analyzed the design methods of the LLC resonant converter to achieve its advantages [8] - [13] . Several studies have also shown the advantages of high-frequency switching in power converters [14] - [17] . Fig. 1 shows a circuit diagram of a half-bridge LLC resonant converter composed of primary power MOSFETs ( S 1 , S 2 ), the output capacitance of the primary MOSFETs ( C s1 , C s2 ), magnetizing inductance ( L m ), leakage inductance ( L r ), resonant capacitance ( C r ), secondary diodes ( D 1 , D 2 ), output capacitance ( C o ), and load resistance ( R o ).
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Circuit diagram of the LLC resonant converter.
In this paper, design methods of the passive components for high power density are proposed by increasing the switching frequency. The size reduction of the passive components is proportional to the increase in switching frequency. The relationship between switching frequency and size reduction of passive components, such as the transformer and output capacitor, is investigated under high-switching-frequency operation to design a power converter with proper passive components for high power density.
As the switching frequency increases, the size of resonant components is inevitably reduced through proper design methods of the LLC resonant converter. Small capacitance and small effective series resistance (ESR) can reduce the size of the output capacitor. However, a small output capacitance induces stability problems because of the lack of phase margin. Therefore, the effects of the output capacitor, such as capacitance and ESR, are investigated with a small-signal model of the LLC resonant converter derived by using the extended describing function (EDF) method. The theoretical open-loop gain is measured by using the small-signal model to obtain information on crossover frequency and phase margin according to the conditions of the output capacitor [18] - [23] . The measured open-loop gain is utilized to select the proper output capacitor for stability. A proper feedback compensator is then designed to obtain sufficient gain and phase margins.
The LLC resonant converters operating at 100 and 500 kHz are implemented with a theoretical method using MATLAB, a simulation method using PSIM, and experimental measurements using prototype converters to verify the validity of the proposed design methodology. Compared with the size of the passive components at 100 kHz switching frequency, a smaller size of the passive components is proposed at 500 kHz switching frequency. The poor stability caused by the small size of the output capacitor is analyzed with the small-signal model. The dominant poles and zeros of the transfer function are measured as the capacitance and ESR value change. The theoretical open-loop gains are obtained to design a proper feedback loop for sufficient gain and phase margin. The theoretical control-to-output transfer function using the open-loop gain and the feedback compensator is compared with the experimental measurements; an impedance analyzer is employed to verify the results. The step load responses are also measured to obtain the response of the output impedance of the power converter to verify stable operation indirectly. All design details are verified through proper simulation and experimentation with 300 W prototype LLC resonant converters operating at 100 and 500 kHz switching frequencies.
II. DESIGN METHODOLOGY FOR THE POWER STAGE
The relationship among the quality factor (Q-factor), voltage gain, and inductance ratio λ (= L r / L m ) is considered in the design of a conventional LLC resonant converter. First, the magnetizing inductance is designed to achieve the ZVS condition of the primary power MOSFETs for their small switching and conduction losses [5] . Second, the inductance ratio is selected in consideration of the magnetizing inductance. On the one hand, a large λ makes output voltage regulation easy through the small switching frequency variation from light load to full load. However, this condition cannot be operated under overload condition. On the other hand, a small λ overloads an operating capability with a large frequency variation to regulate the output voltage [8] . The selected leakage inductance and resonant capacitance have to satisfy the Q-factor requirement to allow the converter to achieve the desired voltage gain at the maximum load condition [4] .
The properly designed LLC resonant converter has a narrow switching frequency variation according to the load variation. This well-designed LLC converter has small conduction losses with small circulating currents over the entire load range. The leakage and magnetizing inductance of the transformer contribute to the resonance operation to transfer the electric power from the primary side to the secondary side. The output capacitor mitigates severe output voltage ripples. In this section, the design methodology of the passive components as switching frequency is increased to improve the power density is discussed.
- A. Small Transformer Design
Using Faraday’s law, the transformer size can be determined by using the cross-sectional area of the core as follows:
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where A c is the cross-sectional area, V1 ( t ) is the input voltage,
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is the average value of the input voltage, D is the duty ratio, ΔB is the maximum flux density, Np is the primary turn number of the transformer, μo is the space permeability, μe is the magnetic permeability, Rc is the resistance of the core, Rg is the resistance of the air gap, le is the effective magnetic length, and lg is the length of the air gap.
Equation (2) shows that Ac is inversely proportional to the switching frequency. Np in Equation (2) is substituted into Equation (3) to consider the inductance and transformer size. Equation (4) shows that the size reduction of the transformer is proportional to the square of the switching frequency. The small primary side turn number and the long air gap length at high switching frequency can induce a small magnetizing inductance. The bifilar winding between primary-side and secondary-side wires can also induce a small leakage inductance. The square of ΔB and D × V1 is assumed to be constant to compare the size reduction of 500 kHz with the case of 100 kHz. Although the
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value increases by approximately 2 times and the leakage and magnetizing inductance decrease by approximately 3.5 times according to the switching frequency increment, the transformer size is reduced by approximately 3.5 times because the square of switching frequency increases by approximately 25 times.
- B. Small-Output Capacitor Design
The output capacitor should be selected with proper methods to mitigate the output voltage ripple. The conventional converter utilizes high capacitance at the output to reduce the output voltage ripple; however, it is not an effective method in a high-switching-frequency operation because the output capacitance is reduced to improve power density. Equation (5) and Fig. 2 show the relationship among capacitance, ESR, and switching frequency for the output voltage ripple. As indicated by Equation (5) and Fig. 2 , the output voltage ripple caused by the output capacitance is proportional to the output current and inversely proportional to the switching frequency. However, the output voltage ripple caused by ESR is only proportional to the output current. Therefore, at a high switching frequency, a small ESR is more dominant than the output capacitance in terms of output voltage ripple. The small ESR and output capacitance of the output capacitor can improve the performance of the output voltage ripple in the high-power-density design of the high-switching-frequency converter.
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Output voltage ripple according to switching frequency.
where Io is the average output current, Ts is the switching period, and ΔQ = 0.363× Io Ts .
The theoretical equation of the output capacitance can be derived from the rectified output current waveform. This equation shows the tendency of the output voltage ripple according to the capacitance and ESR of the output capacitor at high switching frequency. However, high frequency switching noise, which changes according to the power stage design, is not considered in the design equation. Therefore, the proper output capacitance should be selected with the relationship between the capacitance and ESR of the output capacitor in a practical manner. The output capacitance of 6600 μF generates 1 V of output voltage ripple, including switching noise.
III. SMALL-SIGNAL ANALYSIS OF THE HIGH-FREQUENCY LLC RESONANT CONVERTER
The size of the passive components in the converter must be reduced to improve the power density of the power stage. The resonant components, such as magnetizing inductance, leakage inductance, and resonant capacitance, are inevitably reduced with the increase in switching frequency. A small-output capacitor is selected to improve the power density. However, such a capacitor induces poor stability, as shown in Fig. 3 . The output voltage cannot be regulated by the feedback control, which operates in a burst mode that induces high peak current at full load. The burst mode should be activated to save on standby power at light load. However, burst mode operation at full load induces high peak current, which causes the breakdown of switching devices. Owing to the burst mode even at full load, brownout protection is activated to prevent high circulating current on the primary side. The solution to the unstable operation is the proper design of the feedback compensator to obtain an adequate stability margin.
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Unstable operation of a 500 kHz prototype converter: (a) high current peak by burst mode and brownout protection, (b) operational waveform of brownout protection, and (c) unstable current waveform by drastic frequency variation.
The control block diagram of the converter with a feedback loop is shown in Fig. 4 . It consists of the transfer functions of the power stage of the converter, a feedback compensator, and a PWM generator. The small-signal model of the power stage depends on the power stage design and its operating point. The controller compensates for the output voltage error to regulate the output voltage. The design of the feedback compensator is significant to obtain proper characteristics of the loop gain, which is based on the small-signal models of the power stage and the feedback compensator. Therefore, a theoretical analysis of the open-loop transfer function of the converter is required to design a proper feedback compensator for stability and fast dynamic responses. The loop gain can be determined as follows [19] :
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where Gvf ( s ) is the frequency-to-output voltage transfer function of the power stage, Fv ( s ) is the transfer function of the feedback compensator, and Fm is the PWM generator gain. This equation shows that the voltage feedback compensator Fv ( s ) is the only variable to design the loop gain characteristics.
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Control block diagram of the LLC resonant converter.
A conventional small-signal model of PWM converters is obtained through the state-space averaging method and derived by approximations when the natural frequency is much lower than the switching frequency. However, the state-space averaging method is not valid for resonant converters because the switching frequency is located near the natural frequency. The small-signal model using an EDF is considered for high natural frequency and switching harmonics to improve the accuracy of the model for the LLC resonant converter [21] , [23] . The transfer functions of the LLC resonant converter, such as the control-to-output and input-to-output transfer functions, can be obtained through the EDF method.
In this section, an analysis of the small-signal model is presented according to the variation in output capacitance and ESR at high switching frequency to obtain the variation in the locations of crossover frequency and phase margin. A proper design method of the feedback compensator is also proposed to achieve high power density with small output capacitance and ESR.
- A. Analysis of the Small-signal Model with Respect to the Output Capacitor
The small-signal model of the LLC resonant converter has been proposed in previous research [18] [21] . The line resistance and ESR of the output capacitor should be considered to obtain a high-accuracy model of the converter. The average model is illustrated in Fig. 5 ; it contains the line resistance and ESR of the output capacitor [23] . This average model is divided into DC components and small-signal AC components to analyze the small-signal response. Therefore, the small-signal model can be derived by linearizing the average model using the small-signal AC components at the DC operating point. The state-space model of the LLC resonant converter is as follows:
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where A , B , C , and D are the state-space system matrices,
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is a state vector of the state-space model,
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is the control input vector, and
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is the output vector.
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Averaged circuit model of the LLC resonant converter.
Table I shows the parameters of the theoretical model derivation. The theoretical results are obtained through model derivation with MATLAB software, and the experimental results are measured with a gain-phase analyzer (PSM3750 manufactured by N4L). Fig. 6 shows the theoretical analysis and experimental results at 100 kHz switching frequency. The closed-loop gain at 100 kHz switching frequency shows a stable operating condition with a sufficient phase margin of 65°. To achieve a phase margin of 65° at 100 kHz, the effect of the output capacitance should be considered to properly design the feedback compensator for high power density.
SPECIFICATION OF THE THEORETICAL SIMULATION
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SPECIFICATION OF THE THEORETICAL SIMULATION
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Theoretical and experimental results of the 100 kHz small-signal response: (a) theoretical result of the open-loop gain, (b) theoretical result of the closed-loop gain, and (c) experimental result of the closed-loop gain.
Fig. 7 shows the comparison of the pole placements of the open-loop gain according to the output capacitance at 500 kHz switching frequency with a Bode plot and a pole-zero map. The small output capacitance results in a much higher frequency location of the first two poles and the zero and thus provides higher crossover frequency than with a high output capacitance. The significant frequency difference between the poles and the zero induces a drastic decrease in phase margin in the open-loop gain. The effect of high ESR is also investigated to obtain the overall effects of the output capacitor for high power density. Fig. 8 shows the characteristics of the 1000 μF and 100 mΩ case compared with those of the 1049 μF and 5.6 mΩ case, which is already shown in Fig. 7 (a).
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Comparison of the pole placements of the open-loop gains according to output capacitance: (a) Bode plot of 1049 μF output capacitance, (b) Bode plot of 6600 μF output capacitance, (c) pole-zero map of 1049 μF output capacitance, and (d) pole-zero map of 6600 μF output capacitance.
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Theoretical small-signal response and pole-zero placement with small capacitance and high ESR: (a) Bode plot of the 1049 μF and 100 mΩ case and (b) pole-zero map of the 1049 μF and 100 mΩ case.
A high ESR results in a low frequency location of the zero, which induces a high crossover frequency and a high phase margin by the gradual magnitude slope and early phase boost. Therefore, a high ESR has advantages in terms of stability with fast dynamics and a high phase margin; however, it induces a high output voltage ripple and a large power loss in the output capacitor at high switching frequencies. The open-loop gain with respect to the output capacitance and ESR is obtained to analyze the variation in the crossover frequency, as shown in Fig. 9 . A small output capacitance induces a high crossover frequency and a small phase margin. A high ESR induces a high crossover frequency and a large phase margin. The small output capacitor that induces a high crossover frequency and a low phase margin results in an unstable operation of the converter, as shown in Fig. 10 . Therefore, a proper output capacitor must be selected to achieve stability, power conversion efficiency, and high power density.
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Comparison of open-loop gain according to output capacitance and ESR: (a) gain curve variation according to output capacitance (from 500 μF to 5 mF) and (b) gain curve variation according to ESR (from 1 mΩ to 20 mΩ).
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Destabilizing effect of high crossover frequency in the 500 kHz LLC resonant converter.
Without considering the nonlinearities of the transfer function, such as the sampling effect and the nonlinear transfer function of a PWM generator in the high-frequency region, high crossover frequency exhibits good performance at high ESR condition from the viewpoint of fast dynamics. However, to select the proper capacitor, nonlinearity should be considered to obtain the loop gain for high accuracy in the high-frequency region. Nonlinearity induces an undesired phase drop of the small-signal response, which is significant in the high-frequency region. The crossover frequency should be lower than the Nyquist frequency to reduce the side effect of nonlinearity. The magnitude of the small-signal response of the feedback loop should descend over the crossover frequency to allow for attenuation of the high-frequency noise caused by switching devices [19] . A high ESR induces considerable power losses and a large output voltage ripple, which is improper for the precise regulation of output voltage.
Therefore, the output capacitor that has a small capacitance and ESR should be selected to obtain a small output voltage ripple, small power losses, and high power density, although high ESR has a high phase margin and a high crossover frequency in the open-loop gain. Finally, the feedback compensator should be designed by considering the above effects to obtain a sufficient phase margin with proper crossover frequency under high power conversion efficiency operation of the LLC resonant converter.
- B. Design of the Feedback Compensator
A small output capacitance and small ESR induce a high crossover frequency and a drastic decrease in the phase margin. The feedback loop design is crucial for the closed-loop gain to obtain a sufficient phase margin for stability. The compensator is configured with two poles and one zero, which is widely applied in power converters. Fig. 11 shows a circuit diagram of the two-pole one-zero feedback compensator and its Bode plot. The transfer function of the error amplifier in Fig. 9 can be expressed as
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where CTR is the current transfer ratio and Verr ( s ) is the output voltage of the feedback loop.
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Circuit diagram and Bode plot of the two-pole one-zero feedback compensator: (a) circuit diagram of the two-pole one-zero feedback compensator and (b) Bode plot of the two-pole one zero feedback compensator.
To design a proper feedback loop, the K-factor approach method [24] is utilized to obtain the desired crossover frequency and phase margin using the theoretical open-loop transfer function. In the conventional design method, a phase boost should be placed slightly beyond the resonant frequency of the output filter to obtain high dynamics through the high crossover frequency. The maximum phase drop in the loop gain is located at the resonant frequency. However, in the case of high switching frequency operation, a small capacitance already sets the high frequency location of the first two poles (6.3 kHz). This condition induces a high crossover frequency that leads to a fast transient response, drastic phase decrease, and high switching noise. For these reasons, the designed crossover frequency and phase boost (5 kHz) should be placed slightly below the double pole of the resonant frequency of the output filter (6.3 kHz) to obtain a sufficient phase margin, gradual phase variation, and small nonlinearity near the crossover frequency. Therefore, with magnitude compensation using the feedback loop, the crossover frequency of the closed-loop gain can be placed slightly below the resonance frequency of the output filter, which is much lower than the crossover frequency of the open-loop gain.
The crossover frequency of the closed loop (5 kHz) should be selected to achieve a sufficient phase margin through the feedback compensator, which is configured with two poles and one zero. The magnitude of the closed-loop gain should be smaller than the magnitude of the open-loop gain to achieve a low crossover frequency that is unaffected by the nonlinearity effect. However, magnitude reduction is limited by the values of RLED and Rpullup of the compensator, as shown in Fig. 11 . The high resistance of RLED to reduce the magnitude of the open-loop gain prevents current flow to the optocoupler, which requires 0.15 mA as a minimum current. Rpullup is a fixed small value to control the range of the switching frequency. Therefore, 5 kHz is selected as the lowest crossover frequency, which is slightly below the resonant frequency of the output filter. When the desired phase margin is specified as 60° to achieve a fast settling response without oscillation, the phase boost is calculated as follows:
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where ϕboost is the desired phase boost, ϕpm is the desired phase margin, and ∠ Gps ( s ) fc is the phase of the crossover frequency in the open-loop condition.
The coefficient of the K-factor approach, Kboost , can be determined by using ϕboost to specify the location of the pole and zero of the feedback compensator. The pole and zero are placed at fz and fp , which can be calculated as follows:
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The designed feedback compensator, theoretical closed-loop gain, and experimental closed-loop gain are shown in Fig. 12 . The 500 kHz high-frequency LLC resonant converter has a sufficient phase margin and a lower crossover frequency than the open-loop gain. The theoretically designed closed-loop gain has 5 kHz crossover frequency with 63° of phase margin. The experimental closed-loop gain has 5.2 kHz crossover frequency with 66° of phase margin. The theoretical models and experimental measurements match well. The difference between the theoretical and experimental results is the low-frequency-range (100 Hz to 500 Hz) distortion, which arises from controller insensitivity according to the injected low-frequency signal and switching noise at the MOSFET. However, the tendency of the experimental magnitude and phase Bode plots is similar to the theoretical result. Compared with the 100 kHz switching frequency case, the closed-loop gain of the 500 kHz high-frequency LLC resonant converter has a much higher crossover frequency to achieve high power density.
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Theoretical and experimental Bode plots of the 500 kHz small-signal response: (a) theoretical Bode plot of the open-loop gain, (b) theoretical Bode plot of the closed-loop gain, and (c) experimental Bode plot of the closed-loop gain.
IV. EXPERIMENTAL RESULTS
The simulated circuit diagram is shown in Fig. 13 . The configuration of the power stage and feedback loop is similar to that in Fig. 4 . The power stage is similar to that in the conventional LLC resonant converter. The feedback loop is configured with a two-pole one-zero compensator and a PWM signal generator. The simulation results of the LLC resonant converter show that the ZVS operation of power MOSFETs and the ZCS operation of secondary diodes can reduce switching losses, as shown in Fig. 14 . The ideal condition of the simulation does not consider the effects of parasitic components. The specific parameters of the simulation and the experimental measurements are shown in Table I .
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Experimental waveforms of the 500 kHz LLC resonant converter.
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Simulation waveforms under 100 kHz and 500 kHz switching frequency operations: (a) operational waveform of 100 kHz switching frequency and (b) operational waveform of 500 kHz switching frequency.
Compared with the 100 kHz switching frequency operation, the size of the passive components is drastically reduced in the 500 kHz operation. Figs. 15 and 16 show the experimental waveforms at 100 and 500 kHz switching frequencies, which show the operations of the power MOSFETs under the ZVS condition and the secondary diodes under the ZCS condition, respectively. Compared with the operational waveforms at 100 kHz, the operation at 500 kHz has high frequency ringing in the current waveform caused by the influence of parasitic capacitance and stray inductance.
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Experimental waveforms of the 100 kHz LLC resonant converter: (a) 4 A light load case and (b) 10 A full load case.
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Experimental waveforms of the 500 kHz LLC resonant converter: (a) 4 A light load case and (b) 10 A full load case.
The size reduction of passive components can be achieved at a high switching frequency, as derived in Equation (4).
Fig. 17 shows the size reduction of the passive components. The volumes of the output capacitor and transformer are reduced by approximately 5.2 and 1.3 times, respectively. The high-frequency LLC resonant converter that adopts a small output capacitance and a small ESR has an advantage of small output voltage ripple, as shown in Equation (5) and Fig. 2 .
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Size reduction of passive components under high-switching-frequency operation: (a) comparison of output capacitor sizes and (b) comparison of transformer sizes.
Fig. 18 shows the output voltage ripple with respect to the output capacitance and ESR conditions. The case with small capacitance and ESR has a smaller output voltage ripple (1049 μF, 5.6 mΩ, 1.01 V pp ) than the case of with high capacitance and ESR (6600 μF, 9 mΩ, 1.21 V pp ).
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Comparison of output voltage ripple according to the output capacitor cases: (a) high capacitance and ESR case and (b) small capacitance and ESR case.
To verify the variation in relative stability according to the output capacitor, the high output capacitance case (6600 μF, 9 mΩ), as shown in Fig. 19 , exhibits a higher phase margin and a lower crossover frequency than the small output capacitance case. The low-frequency location of the first two poles induces a low crossover frequency and a high phase margin. The step load response of the output voltage is measured to verify the stability of the converter according to the output impedance. The response can reveal the relative stability in an indirect manner and the dynamic performance of the converter.
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Theoretical and experimental Bode plots of the 500 kHz small-signal response using high capacitance: (a) theoretical Bode plot of the closed-loop gain and (b) experimental Bode plot of the closed-loop gain.
A high phase margin can induce a small output impedance, which results in a small output voltage variation under step load changes. Fig. 20 shows the step load response of the output voltage at 500 kHz switching frequency from no load to full load. In Fig. 20 , the high output capacitance suppresses output voltage spikes. As a result, the high output capacitance results in a small output voltage variation according to the load changes.
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Step load response according to the output capacitance: (a) step load waveforms using small output capacitance and (b) step load waveforms using high output capacitance.
Compared with the power conversion efficiency of the 100 kHz converter, the power conversion efficiency of the 500 kHz converter decreases by 2% at the rated load, as shown in Fig. 21 . This efficiency drop results from the large switching and hysteresis losses in spite of the soft-switching techniques. The efficiency difference between the large output capacitance and the small output capacitance is insignificant in the same resonant network configuration because the ESR of the output capacitor is an insignificant power loss factor compared with the switching and transformer losses.
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Power conversion efficiency.
V. CONCLUSION
Design methods of an LLC resonant converter with improved power density were proposed by comparing 500 and 100 kHz switching frequency operations. The relationship between passive component size and switching frequency was analyzed to investigate the power density improvement. The unstable operation caused by a small-sized output capacitor was verified with a small-signal model. To overcome the stability problem, the open-loop gain was investigated to obtain the variation in crossover frequency and phase margin according to the output capacitor. As a result, a feedback compensator for high-frequency operation was designed to obtain a sufficient phase margin with proper crossover frequency. All proposed methodologies were verified through a theoretical analysis using MATLAB. The simulation results were verified through PSIM, and the experimental measurements were validated with 300 W prototype converters at 100 and 500 kHz switching frequencies.
Acknowledgements
This research was supported by the Basic Science Research Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Science, ICT, & Future Planning (NRF-2013R1A1A1009632).
BIO
Hwa-Pyeong Park received his B.S. degree in electrical engineering from KOREATECH in 2013. He is working toward his M.S. degree at the School of Electrical and Computer Engineering, Ulsan National Institute of Science and Technology (UNIST), Ulsan, Korea. His research interests are high-switching-frequency converters, switched-mode power supply, and digital control algorithms.
Jee-Hoon Jung received his B.S., M.S., and Ph.D. degrees from Pohang University of Science and Technology, Pohang (POSTECH), Korea, in 2000, 2002, and 2006, respectively. From 2006 to 2009, he was a senior research engineer with the Digital Printing Division, Samsung Electronics Company Ltd., Suwon, Korea. From 2009 to 2010, he was a postdoctoral research associate with the Department of Electrical and Computer Engineering, Texas A&M University of Qatar, Doha, Qatar. From 2011 to 2012, he was a senior researcher with the Power Conversion and Control Research Center, HVDC Research Division, Korea Electro Technology Research Institute (KERI), Changwon, Korea. He has been an assistant professor at the School of Electrical and Computer Engineering, Ulsan National Institute of Science and Technology (UNIST), Ulsan, Korea, since 2013. His research interests include DC–DC converters, switched-mode power supplies, motor drives and diagnosis systems, digital control and signal-processing algorithms, digitally controlled power electronics, power conversion for renewable energy, and real-time and power Hardware-in-the-Loop Simulations (HILS) of renewable energy sources. He has been studying high-frequency power converters using wide bandgap devices, smart power transformers for smart grids, power control algorithms for DC microgrids, and wireless power transfer techniques for electric vehicle and home appliance applications. Dr. Jung is a senior member of the IEEE Industrial Electronics Society, the IEEE Power Electronics Society, the IEEE Industry Applications Society, and the IEEE Power and Energy Society. He is an associate editor of the Journal of Power Electronics and a member of the Editorial Committee of the Korea Institute of Power Electronics.
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