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Design of a High-Precision Constant Current AC-DC Converter with Inductance Compensation
Design of a High-Precision Constant Current AC-DC Converter with Inductance Compensation
Journal of Power Electronics. 2016. May, 16(3): 840-848
Copyright © 2016, The Korean Institute Of Power Electronics
  • Received : January 26, 2015
  • Accepted : November 23, 2015
  • Published : May 20, 2016
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About the Authors
Changyuan, Chang
School of Integrated Circuits, Southeast University, Nanjing, China
ccyycc@seu.edu.cn
Yang, Xu
School of Integrated Circuits, Southeast University, Nanjing, China
Bin, Bian
School of Integrated Circuits, Southeast University, Nanjing, China
Yao, Chen
School of Integrated Circuits, Southeast University, Nanjing, China
Junjie, Hu
School of Integrated Circuits, Southeast University, Nanjing, China

Abstract
A primary-side regulation AC-DC converter operating in the PFM (Pulse Frequency Modulation) mode with a high precision output current is designed, which applies a novel inductance compensation technique to improve the precision of the output current, which reduces the bad impact of the large tolerance of the transformer primary side inductance in the same batch. In this paper, the output current is regulated by the OSC charging current, which is controlled by a CC (constant current) controller. Meanwhile, for different primary inductors, the inductance compensation module adjusts the OSC charging current finely to improve the accuracy of the output current. The operation principle and design of the CC controller and the inductance compensation module are analyzed and illustrated herein. The control chip is implemented based on a TSMC 0.35μm 5V/40V BCD process, and a 12V/1.1A prototype has been built to verify the proposed control method. The deviation of the output current is within ±3% and the variation of the output current is less than 1% when the inductances of the primary windings vary by 10%.
Keywords
I. INTRODUCTION
Flyback AC-DC converters with the PSR (primary-side regulation) structure are widely used in many power supply applications, including LED drivers, chargers for portable electronic equipment and off-line power supply adapters [1] , [2] , [3] . They have the advantages of simplicity and cost-effectiveness. Compared with the conventional secondary feedback converters, the topology of primary-side regulation does not have the demand for an optical coupler or a precise voltage source [4] , [5] , which reduces both the volume and cost [6] , [7] . In addition, the PSR structure has a good system reliability. Nevertheless, for PSR converters, high demands are required in terms of the performance of the transformer. For CC controllers, the PFM is a common mode for adjustment due to its high efficiency and feasibility [8] . The CC output accuracy of a PSR constant current AC-DC converter is easily affected by the primary inductance of the transformer. However, the inductance of the primary windings in the same batch has a tolerance of ±10%. Thus, for the CC converter, an inductance compensation function should be employed in the circuit, to reduce the variations of the output current caused by differences on the primary inductance.
A primary side inductance compensation circuit is proposed in [9] . The compensation module adjusts the input power, which is influenced by the primary inductance, which keeps it constant. However, it only accomplishes a theoretical analysis. Another compensation technology for inductance tolerance is illustrated in [10] . A target time is set to indicate how long the primary current takes to reach a predetermined current limit. The real ramp time before the primary current stops increasing is compared to this target time and the error signal is used to adjust the switching frequency and pulse width, which maintains a constant output current. However, this compensation circuit has a complex structure. In addition, a primary inductance correction circuit is introduced in [11] . A compensation current is generated based on the output current, which is sampled and injected into the OSC for regulating the switching frequency, to correct the output power change caused by inductance tolerance. However, the output accuracy is constrained by the sampling precision.
To overcome these drawback, a PSR High-precision constant current AC-DC converter, operating in the PFM mode and adopting the inductance compensation method, is presented in this paper. This paper is organized as follows. The operation principle and design of the constant current and compensation are illustrated in Section II. Some experimental results based on a prototype are given in Section III. Section VI presents some conclusions.
II. DESIGN OF THE PSR AC-DC CONTROLLER CHIP
- A. System Review
A system diagram of a PSR constant current AC-DC flyback converter with the proposed control chip is shown in Fig. 1 [12] . It is comprised of a bridge rectifier BD, EMI filter, RCD clamp circuit, freewheel diodes D 0 and D 1 , capacitors C 0 and C a, transformer, power switch M 1 , primary current sensing resistor R CS , pull-up resistor R 1 , pull-down resistor R 2 , and control IC. For this control chip, an INV pin is used to detect information on the output voltage through the auxiliary winding. The CS pin is used to detect the primary side current, and GATE pin is used to drive the power switch.
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Schematic diagram of PSR AC-DC converter.
A block diagram of the control IC is shown in Fig. 1 . It mainly consists of a sampling trigger module, OSC (Oscillator) module, PFM generator, inductance compensation module, CS peak controller and gate driver module. The switching frequency is generated by the OSC module and in proportion to the charging current. The sampling trigger module contains a sampler and a Demag module, which is a demagnetization time detector. Information on the output voltage is sampled from the auxiliary winding cycle by cycle. It is then input to the CC controller. At this point, the CC controller regulates the frequency of the OSC, which makes the PFM generator create a modulated pulse for driving the power switch. The CS peak controller is used to keep the primary peak current constant. The inductance compensation module, including the control circuit, charge pump, voltage to current (V/I) converter and compensation starting delay circuit, is applied to compensate the loss of the output current accuracy owing to the different inductances of the transformer primary windings in the same batch.
- B. Design of Constant Current Modules
The PFM mode is employed to achieve a constant current output. In the switch power circuit, the output power can be expressed as:
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where η is the transformer conversion efficiency, L p is the primary inductance, F S is the switching frequency, and I pp is the primary peak current.
In the PSR controller, shown in Fig. 1 , the relationship between the voltage of the INV pin and the output voltage V o is:
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In eq. (2), R 1 is the pull-up resistance, R 2 is the pull-down resistance, and V INV is the voltage sampled from the INV pin. N is the turn’s ratio of the auxiliary and secondary windings. Based on eq. (1) and eq. (2), the output current I o can be derived as:
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On the basis of the analysis above, the OSC charging current is adjusted based on the sampled voltage V INV (the OSC charging current is proportional to V INV ), and the OSC charging current is proportional to F S to keep the ratio of F S and V INV constant. However, the output current precision is influenced by the conversion efficiency of the transformer η , since it may vary slightly under different input voltages and loads.
For a converter operating in the PFM mode, if the load is extremely light (the output voltage is extremely low), the switching frequency F S drops to a very small value, causing the V INV sampling speed to be quite slow as a result of V INV being sampled cycle by cycle. When the load jumps from light to heavy, the controller cannot handle the load step rapidly and the output current decreases instantly. It would take too long of a response time for the output to become constant again. In order to overcome this shortcoming of the PFM mode, it is necessary to determine a minimum value for the switching frequency. However, this increases the power dissipation under light loads.
The CC controller is shown in Fig. 2 , where EA is an error amplifier, INV 1 is an inverter, and COMP 1 is a current comparator. The connection between the CC controller and the inductance compensation module can also be seen in Fig. 2 .
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CC (constant current) Controller.
In Fig. 2 , en 1 is the active-low enable signal for the inductance compensation module. I OSC , the OSC charging current, can be expressed as:
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I OSCadj is the fine adjusting current from the inductance compensation module, which helps to improve the accuracy of the output current. I 1 is proportional to V INV , and I 2 is a constant value.
For the circuit in Fig. 2 , if I 1 , the current controlled by V INV and inductance compensation module, is less than I 2 , I OSC becomes equal to I 2 due to the current comparator, which determines the minimum frequency under the CC mode. If I 1 is larger than I 2 , I OSC is controlled linearly by V INV with the scale factor 1/R 3 and it is regulated slightly by the inductance compensation module.
- C. Design of Inductance Compensation Circuit
For flyback converters produced in the same batch, the inductances of the transformer magnetizing inductors have a tolerance of about 10%, which leads to inconsistent output currents from these converters. This can be explained based on the equation of I o , eq. (3). The magnetizing inductor of a flyback converter is the primary inductor of the transformer. Hence, an inductance compensation module is needed, in order to acquire a constant output current that is unrelated to the primary inductance L p .
The process of CC regulation is illustrated in Fig. 3 . It is seen that when the system begin to start up, the compensation module does not work at first. The CC controller enters the operating state and the output current rises to an initial value, which is a little larger than the target value. At this moment, the primary inductance has a bearing on the output current, and the accuracy can be easily influenced. Until the state of the output current becomes steady, the inductance compensation module works, which makes the output current drop to the target value. Then the accuracy of output current is immune to the unstable primary inductance and is maintained at a constant level.
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The process of CC regulation.
It is known that L p is difficult to measure directly. Thus, L p can be calculated based on demagnetization time T D and primary peak current I pp :
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where n is the turn’s ratio of the primary and secondary windings. According to eq. (1) and eq. (5), the output current equation can be inferred as follows:
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From the above analysis, the primary peak current I pp is fixed. Therefore, if the product of the demagnetization time T D and the switching frequency F S is constant, it can be noticed from eq. (6) that the output current is kept constant and is unconcerned with L p . In addition, comparing the transformer conversion efficiency η in eq. (3) and eq. (6), it is obvious that the variation of η has relatively less influence on the output current if the CC regulation is based on eq. (6). Then a higher output current precision can be achieved.
In order to obtain an unchanged product of T D and F S , the inductance compensation module detects the demagnetization time T D and compares it with half a switching period, 1/2 T S . If T D is shorter than 1/2 T S , the compensation module decreases I OSCadj to increase I OSC ,which makes the switching period shorter. On the other hand, if T D longer than 1/2 T S , the compensation module increases I OSCadj to decrease I OSC , then the switching period becomes longer. After several switching periods for adjusting, T D is forced to be equal to 1/2 T S . In other words, the product of T D and F S remains a constant value 1/2.
The inductance compensation circuit includes four main parts: the control circuit, charge pump, V/I converter and compensation starting delay circuit. Each part plays an important role in the regulation process. These circuits are analyzed in detail.
1) Control Circuit: The control circuit is the core part of the inductance compensation module. It offers a control signal based on T D and 1/2 T S , as shown in Fig. 4 . COMP 2 is a comparator and FF 1 is a rising-edge triggered D flip-flop. V demag is the demagnetization signal from the Demag module, and CLK is the output signal of the OSC.
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Design implementation of control circuit.
The length of T D and 1/2 T S should be converted to the corresponding voltage in order to detect them conveniently. Based on the current equation of the capacitance:
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The voltage on the capacitor can be calculated as eq. (8) if the current I is constant.
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In Fig. 4 , C 2 =2 C 1 . Thus, the voltage of V C1 and V C2 represents the length of T D and 1/2 T S . The working process of the control circuit is shown in Fig. 5 .
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Working process of the control circuit.
As shown in Fig. 5 , two switching periods compose one working period. During the first switching period, M 10 is turned on by the logic circuit and C 1 is charged by I 3 at the rising edge of the demagnetization signal V demag , when the demagnetization occurs. M 10 is turned off when the demagnetization is over and the voltage V C1 on the capacitor C 1 stays constant. In the whole second switching period, M 11 is turned on and C 2 is charged by I 3 . At the end, the voltage V C1 on the capacitor C 1 is compared with the voltage V C2 on the capacitor C 2 . The result is then stored in D flip-flop and stays unchanged until the end of another two switching periods. In Fig. 5 , ctl is at a low level when V C1 > V C2 . On the other hand, if V C1 < V C2 , ctl is switched to high.
After one working period, in order to not affect the next comparison, the charge on C 1 and C 2 should be immediately released. In Fig. 5 , C 1 and C 2 are discharged quickly through M 12 and M 13 when V 5 is at a high level before the demagnetization in the first switching period.
2) Charge Pump Circuit: The charge pump is shown in Fig. 6 . According to the output result of the control circuit, the charge pump offers the control voltage V ctl , which is converted to the OSC charging current adjusting current, to improve or reduce the charging current of the OSC, for adjusting the switching frequency.
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Design implementation of charge pump circuit.
In Fig. 6 , en 1 (from the CC controller) and en 2 (from the compensation starting delay circuit) are the active-low enable signals for the compensation module. The signal ctl (the output of the control circuit) is the input signal, and V ctl is the output voltage.
Suppose the signal ctl is at a low level, M 18 is in the ON state and M 19 is OFF. The capacitor C 3 is charged by I 4 through the current mirror. At this moment, the voltage V ctl is ramping up slowly. On the other hand, if ctl at a high level, M 18 is in the OFF state and M 19 is ON, the charge on C 3 is released by I 4 through the current mirror. As a result, V ctl begins to ramp down.
3) Voltage to Current Converter: The voltage to the current (V/I) converter receives a control voltage from the charge pump and regulates the switching frequency by adjusting the OSC charging current, to achieve a constant product of T D and F S . Fig. 7 shows the converter circuit.
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Design implementation of V/I converter.
In the circuit in Fig. 7 , M 27 and R 6 are identical to M 28 and R 7 , when converting V ctl to the current which is in proportion with V ctl . Then, this current is transported to the output I OSCadj by the current mirror. I OSCadj makes a fine regulation to I OSC , which causes the switching frequency to vary with the demagnetization time. An unchanged product of T D and F S can be achieved after several working periods. Thus, a constant output current unrelated to the primary inductance is obtained.
Six working periods of the compensation adjustment are shown in Fig. 8 , where the level of ctl is decided by T D and 1/2 T S . It can be seen that I OSCadj increases with V ctl in one working period while ctl is low and that it decreases while ctl is high. The switching frequency can be regulated well by the adjusting circuit.
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Key waveform of inductance compensation adjustment.
4) Compensation Starting Delay Circuit: According to the above analysis, the inductance compensation adjustment is realized by moderately reducing the OSC charging current.
Hence, in the start-up process of the system, the compensation module may decrease the switching frequency, which makes the CC controller start slowly. In order to avoid this problem, the operation of the compensation circuit should be delayed until after the system has completely started.
A compensation starting delay circuit is adopted in the inductance compensation module. Its function is to lock the compensation circuit at the beginning of the system’s start-up and to enable it when the output current becomes relatively stable. As shown in Fig. 9 , the circuit consists of a 4096 times frequency divider, a NOR gate, a falling-edge triggered D flip-flop FF2 and a rising-edge triggered D flip-flop FF3 .
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Compensation starting delay circuit.
In Fig. 9 , the output Q of the two D flip-flops are both reset to low levels by a transient low level pulse when the circuit just powered on. Since the start-up frequency is about 14kHz, a pulse with a period of about 292ms can be obtained by dividing the frequency of the CLK 4096 times. This signal is about to switch after 146ms from when the system starts. The two D flip-flops detect the rising or falling edges at this moment. The signal en 2 switches to high detecting the edge. Thus, the starting delay circuit does not unlock the compensation function until 146ms later after the start-up of the system. The working process of the starting delay circuit can be seen in Fig. 10 .
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Working process of the starting delay circuit.
III. EXPERIMENTAL RESULTS
- A. Layout Design of the Control IC
The proposed AC-DC converter is implemented in a TSMC 0.35μm 5V/40V BCD process and the area is 904×920μm 2 , as is shown in Fig. 11 . The key modules are marked in this photograph. The designed PCB is shown in the Fig. 12 . Its size is about 5.9cm×3.4cm.
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Photograph of the implemented chip.
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Photograph of the fabricated PCB.
- B. Test Results of the Proposed Control Chip
As shown in Fig. 1 , the proposed AC-DC controller adopts the PSR flyback topology. The key components and parameters of the circuit are listed in Table I .
KEY COMPONENTS AND PARAMETERS
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KEY COMPONENTS AND PARAMETERS
The related waveforms of the circuit operating in the CC mode are shown in Fig. 13 . The input voltages are 90Vac/60Hz and 264Vac/50Hz, and the output voltages are 7V and 10V. The first curve from top to bottom is the output current, I o ; the second is the sampled voltage from the auxiliary winding, V INV ; the third is the sampled voltage across the primary current sense resistor, V CS .
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Test results of output current with different load voltages. Top trace: Io; second trace: VINV; third trace: VCS.
According to Fig. 13 , the maximum of V CS is fixed at 900mV, which indicates that the primary peak current I pp is an unchanged value. The demagnetization time T D is nearly equal to half of a switching period T S . The output current in every figure is almost 1.1A, where the deviation is less than ±3%. The test results are in accordance with the analysis based on eq. (6).
Fig. 14 depicts the curves of the output current I o when the output load voltage varies from 5V to 12V, under a 90Vac/60Hz-input and a 264Vac/50Hz-input, respectively. It is shown that the output current is kept constant at about 1.1A and that the deviation is less than ±3%.
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Measured Io curves versus Vo under 90Vac & 60Hz-input and 264Vac & 50Hz-input.
In order to demonstrate the validity of the inductance compensation module, the transformer with a 0.8mH primary inductance on the demo board is substituted by other transformers with 0.7mH and 0.9mH primary inductances. Fig. 15 shows the output current with the different primary inductors when the input voltage is 220Vac/50Hz.
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Measured Io curves versus Vo with Lp =0.7mH, 0.8mH, 0.9mH under 220Vac & 50Hz-input.
According to the curve drawn in Fig. 15 , the primary inductance varies by over 10%. However, the output current can be kept constant and the variation is within ±1%. Since there exists a deviation in the conversion efficiency of the transformers, a variation of the output current is inevitable. This indicates that the inductance compensation module reduces the negative impact of the tolerance of the primary inductance.
The system efficiency in the CC mode is tested and depicted in Fig. 16 , when input voltage is 90V/60Hz and 264V/50Hz, respectively. Obviously, the efficiency under a low input voltage is lower than that a under high input voltage. The minimum of the system efficiency can reach about 80%.
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Measured efficiency versus Vo under 90Vac & 60Hz-input and 264Vac & 50Hz-input.
The performance of the proposed chip is listed in table 2 . It can be seen that the accuracy of the output current is very high and that adopting the proposed inductance compensation technology produces a good effect.
PERFORMANCE INDEX
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PERFORMANCE INDEX
IV. CONCLUSION
A PSR constant current AC-DC converter operating in the PFM mode with inductance compensation is designed and implemented. The primary-side regulation structure omits the need for an optical-coupler or a precise voltage source to reduce the size and cost of the converter. The inductance compensation function eliminates the influence caused by the inductance tolerance of the primary windings, and a constant output current can be acquired. In order to verify the proposed compensation technology, a control chip adopting this method has been fabricated in the TSMC 0.35μm 5V/40V BCD process and a 12V/1.1A prototype has been built. Experimental results show that the deviation of the output current is within ±3%, and that the variation of the output current is less than 1%, when the variation of the primary inductance is ±10%.
Acknowledgements
The author would like to thank National Nature Science Foundation of China, for financially supporting this research under Funds Programme 2014-2017, 61376029, which is co-funded by the Chinese Government.
BIO
Changyuan Chang was born in Nanjing, China, in 1961. He received his M.S. and Ph.D. degrees in Electronic Engineering from Southeast University, Nanjing, China, in 1990 and 2000, respectively. He is presently working as an Associate Professor in the School of Integrated Circuits, Southeast University. His current research interests include analog and digital ICs, power management techniques such as DC-DC converters, AC-DC converters and nonlinear modeling.
Yang Xu was born in Jiangsu, China, in 1991. He received his B.S. degree from Nanjing Normal University, Nanjing, China, in 2013. He is presently working towards his M.S. degree in IC Engineering at Southeast University, Nanjing, China. His current research interests include analog integrated circuits, power electronics and CV/CC AC-DC converters.
Bin Bian was born in Shandong, China, in 1982. He received his B.S. degree in Electrical Engineering from the Anhui University of Technology, Ma'anshan, China, in 2005. He is presently working towards his M.S. degree in IC Engineering at Southeast University, Nanjing, China. From 2005 to 2009, he designed special power supplies for use in optical instruments for the Shibuya Optical Company. He is presently working as a product application technology leader for Chiplink Semiconductor Company, Xiamen, China.
Yao Chen was born in Jiangsu, China, in 1979. He received his B.S. degree from Southeast University, Nanjing, China, in 2001; and his M.S. degree from the University of Glasgow, Glasgow, Scotland, UK, in 2003. He is presently working towards his Ph.D. degree in Power Electronics at Southeast University, Nanjing, China. His current research interests include high efficiency LED drivers, power electronics and nonlinear modeling.
Junjie Hu was born in Hubei, China, in 1989. He received his B.S. degree from Hubei University, Wuhan, China, in 2013. He is presently working towards his M.S. degree in Microelectronics at Southeast University, Nanjing, China. His current research interests include analog integrated circuits, power electronics and high-efficiency AC-DC converters.
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