In this paper, a novel quasidirect power control (QDPC) scheme based on a resonant frequency adaptive proportionalresonant (PR) current controller with a variable frequency resonant phase locked loop (RPLL) is proposed, which can achieve a fast power response with a unity power factor. It can also adapt to variations of the generator frequency in Ttype Threelevel shaft synchronous generator (SSG) converters. The PR controller under the static
α

β
frame is designed to track ac signals and to avert the strong cross coupling under the rotating
d

q
frame. The fundamental frequency can be precisely acquired by a RPLL from the generator terminal voltage which is distorted by harmonics. Thus, the resonant frequency of the PR controller can be confirmed exactly with optimized performance. Based on an instantaneous power balance, the load power feedforward is added to the power command to improve the antidisturbance performance of the dclink. Simulations based on MATLAB/Simulink and experimental results obtained from a 75kW prototype validate the correctness and effectiveness of the proposed control scheme.
I. INTRODUCTION
A combination of a brushless excite synchronous generator (BESG) and an ac/dc/ac converter scheme is widely applied in variablespeed constantfrequency (VSCF) generation systems, such as ship shaft generation and wind turbine generation, to harvest matched load power or maximum power from synchronous generator. The concept of a shaft generator converter has been around for decades due to its many distinct advantages, such as using cheaper natural gas instead of diesel fuel, better efficiency for combustion engines, and reduced noise level in ship rooms
[1]
. The main purpose of this application is to make full use of the surplus power of combustion engines to provide power for the ship grid. An ac/dc/ac converter consists of a pulse width modulation (PWM) rectifier, an intermediate dclink capacitor and a PWM inverter
[2]
. The rectifier is used to transfer specific power from the BESG to the dclink capacitor. The inverter connected to the dclink is used to generate constantvoltage constantfrequency (CVCF) power for ship grid. In particular, multilevel topologies, such as the Ttype threelevel converter as a modification of the neutral point control (NPC) converter, are more efficient than other multilevel converters in lowvoltage applications
[3]
,
[4]
.
Fig. 1
shows a Ttype threelevel SSG backtoback converter.
The structure of Ttype threelevel SSG converter.
The rectifier control scheme has been widely studied by scholars in gridconnected operating conditions
[5]

[11]
. However, few studies have been carried out in the synchronous generatorconnected mode. From the existing related literature, several practical control strategies have been proposed for gridrectifiers, such as voltageoriented vector control based on a decoupled proportionalintegral (PI) regulator
[5]
, direct power control with a fixed switching frequency
[6]
,
[7]
, model predictive control
[7]
,
[8]
, repetitive control
[9]
, fuzzy control
[10]
and slidingmode control
[11]
. These control strategies have been successfully applied to gridconnected rectifier control with improved performance.
In order to improve the response performance of currentloops, several methods have been proposed
[12]

[17]
. In
[12]
, the control of a distributed generation converter under the rotating
d

q
frame using a Park transformation has been analyzed, in which 3phase sinusoidal quantities are transformed into constant values under rotating
d

q
coordinates and a PI controller with inductance decoupling to eliminate errors. However, a strong coupling item
ω_{e}L
under
d

q
coordinates makes it difficult to design the controller, especially when the system frequency
ω_{e}
or inductance
L
varies
[13]
,
[14]
.
The authors of
[15]
proposes a complex vector PI (CVPI) control under the
d

q
fame to solve the coupling problem from the perspective of the controller itself. However, the designation of the CVPI controller needs frequency information, which deteriorates the system performance. Reference
[16]
proposes a predictive current control scheme with load power feedforward to enhance the system response. However, the dynamic/static response of the predictive current control depends on an accurate predictive mathematical model and an appropriate cost function
[17]
. To solve these problems, a proportionalresonant (PR) controller under the static
α

β
frame has been proposed
[18]
,
[19]
and the static error of the sinusoidal signal control at the resonant frequency point can be completely eliminated because the PR controller can provide an infinite gain at this frequency. As a result, the inductancefrequency coupling item is removed and the current control performance can be greatly enhanced. However, unlike PI controllers, the PR controller is always difficult to design to make the control system stable because the PR controller is a multiorder system, especially when taking the digital control delay into consideration
[20]
. Reference
[21]
proposes a PR controller design method based on the root locus trajectory and a cascaded compensator, where the PR parameters can be confirmed to ensure the system stability and dynamic response. In order to achieve a fast transient response, reference
[22]
proposes a methodology to optimize the transient response of the PR current controller. This is based on the study of the error signal transfer function roots by the means of the polezero plots in the zdomain. All of these schemes are applied in a small scale variation of the frequency (gridconnected mode). In a VSCF generation system, the frequency of the synchronous generator voltage varies more significantly than that in the gridconnected mode and the synchronous reactance is larger than the line impedance of the grid
[23]
. To obtain the best performance from the PR control, its resonant frequency must be identical to the generator frequency
[23]
. Thus, it should be noticed that an adaptive adjustment of the PR control is necessary when generator frequency variations are registered in the system
[24]
,
[25]
. The ideal way to accomplish this is to observe the precise generator frequency in real time to modify the PR parameters
[26]
.
The frequency observer is generally realized by a phaselocked loop (PLL). The gridconnected rectifier can lock the frequency and phase by a PLL while most of the generatorconnected rectifiers can realize this by a position encoder. However, the moist and vibrating conditions on a ship make the encoder hard to maintain. Moreover, the generator voltage is distorted. As a result, the frequency and phase are difficult to obtain by a traditional PLL or position encoder. When the detected voltage is distorted by loworder harmonics or switching frequency harmonics, the precise frequency and phase are hard to obtain by a general digital PLL (DPLL) which is called a traditional PLL
[27]
. In some references, an enhanced PLL is proposed to lock the frequency in a polluted utility grid
[27]

[30]
. The authors of
[28]
propose a grid synchronization PLL based on an adaptive lowpass notch filter, which is a modified version of a PLL based on the fast Fourier transform, which is robust to harmonics and imbalances of the grid voltage. The authors of
[30]
present a statefeedback quasistatic PLL model, which can identify and quantify the inherent frequency selfsynchronization mechanism in converter control systems. All of these methods realize the gridphase lock under harmonic distortions but do not take wide frequency variations into consideration and are hard to design in digital signal processors. As a result, a variable frequency resonant PLL is proposed based on a multiresonantcompensator to solve this problem in this paper.
The structure of this paper is presented as follows. In section II, the Ttype threelevel SSG converter system and the operational principle are introduced. A mathematical model under the static
α

β
frame of a PWM rectifier and its instantaneous power model are set up in Section III. In Section IV, an adaptive adjustment PR current controller is proposed based on a mathematical model of a currentloop, to reduce the inductancefrequency coupling impact on the current control performance. Based on the method of the frequency response and the method of the root locus trajectory, the PR parameters are designed for the purpose of the dominant pole configuration. In order to obtain an accurate generator frequency to adjust the resonant frequency of the PR controller, the analysis and design of the variable frequency resonant phase locked loop based on a multiresonant compensator are discussed. According to the instantaneous power balance, an inverter power feedforward scheme is proposed in the dclink control loop to ease the burden of the voltage controller. A smallsignal model is established to analyze the antiturbulence of the dclink voltage power charge. The results of simulations and prototype experiments are presented in Section V. The feasibility and validity of the proposed control scheme have been verified. Finally, some conclusions are presented in Section VI.
II. ANALYSIS OF THE SYSTEM STRUCTURE
The topology structure of a Ttype threelevel shaft synchronous generator converter is shown in
Fig. 1
.

 The brushless excited synchronous generator (BESG) is a fourpole synchronous generator which is equipped with an automatic voltage regulator (AVR). The synchronous speed is 1500rpm. The rotor of the synchronous generator is connected to the principal axis of a ship engine through the clutch, which can operate from 25Hz to 60Hz. By designing the AVR, the output voltage of the generator is stabilized at 400V while its frequency varies from 25Hz to 60Hz. The main purpose of this design is to realize operation at the full power scale when the ship speed varies.

 The fullpower backtoback Ttype threelevel converter is the core part in this system. It includes a PWM rectifier and a grid inverter. In order to avoid over modulation, the target voltage of the dclink ought to be set at 600V. The grid inverter should be able to operate in the standalone operational mode and the gridconnected operational mode. In addition, smoothswitching between the two modes is also essential. Both sides communicate with each other through the DSP’s controller area network (CAN) bus.
III. MATHEMATICAL MODEL OF A THREELEVEL TTYPE CONVERTER
In
Fig. 1
, the left half part is a Ttype threelevel PWM rectifier circuit.
L
is the ac inductance, and
R
is the ac inductor inner resistance.
C
=
C_{1}/2
=
C_{2}/2
is the polar film capacitor between the dc stack buses.
e_{x}
,
i_{x}
and
u_{x}
(
x
=
A
,
B
,
C
) denote the generator voltages, input currents and phase voltages of rectifier respectively.
S_{x}
=1,0,1 stands for the switching function.
i_{dc}
and
i_{L}
denote the current from rectifier to the dclink and the load current from the dclink to the inverter, while
u_{dc1}
,
u_{dc2}
and
u_{dc}
represent the upper/lower capacitors voltages and dclink voltage respectively.
u_{y}
and
i_{y}
(
y
=
U
,
V
,
W
) denote the grid side voltages and currents.
Taking phase A as an example, when
T_{A1}
and
T_{A2}
are closed and
T_{A3}
and
T_{A4}
are open,
S_{A}
=1, and the voltage
u_{AO}
=
u_{dc}
/2. When
T_{A2}
and
T_{A3}
are closed and
T_{A1}
and
T_{A4}
are open,
S_{A}
=0, and the voltage
u_{AO}
= 0. When
T_{A3}
and
T_{A4}
are closed and
T_{A1}
and
T_{A2}
are open,
S_{A}
=1, and the voltage
u_{AO}
= 
u_{dc}
/2. According to this principle, the tristate switching function
S_{x}
can be decomposed into three twostate switching functions
S_{xP}
,
S_{xO}
and
S_{xN}
as follows:
The mathematical model of the threelevel Ttype PWM rectifier in the static
a

b

c
frame can be derived as:
u_{xO}
and
u_{MO}
can be expressed as follows:
By applying the Clark transformation
, Eq. (2) and Eq. (3) can be derived in the stationary
α

β
frame as:
where the subscript
rct
denotes the generator side variables.
i_{rctα}
,
i_{rctβ}
,
u_{rctα}
,
u_{rctβ}
,
e_{α}
and
e_{β}
are the ac current, rectifier input voltage and generator voltage in the stationary
α

β
frame, respectively.
S_{αP}
,
S_{βP}
and
S_{αN}
,
S_{βN}
are the coordinate components of
S_{xP}
and
S_{xN}
in the stationary
α

β
frame.
The primary function of the Ttype PWM rectifier in a SSG converter system as a power converter is to absorb specific active and reactive powers from the BESG to keep a constant dclink voltage. The instantaneous active and reactive powers are given by:
where
p_{rct}
and
q_{rct}
mean the active power and reactive power. Assuming that
p
^{*}
_{rct}
and
q
^{*}
_{rct}
are the given values of the active and reactive powers from the BESG and that the rectifier operates in the unity power factor (i.e.,
q
^{*}
_{rct}
=0), then the input current commands
i
^{*}
_{rctα}
and
i
^{*}
_{rctβ}
are derived as:
Due to the threephase balanced generator voltages and the constant voltage amplitude from 25Hz to 60Hz, the current commands
i
^{*}
_{rctα}
and
i
^{*}
_{rctβ}
are in the phase of the generator voltages
e_{α}
and
e_{β}
. According to the mathematical model established above, an adaptive proportionalresonant (PR) current controller in the stationary
α

β
frame and a proportionalintegral (PI) voltage controller based on the principle of simultaneous power balance can be designed. In general, there are two types of PR controllers. They are as follows:
where
K_{p}
and
K_{r}
denote the proportional coefficient and resonant coefficient, respectively. By contrasting Eq. (11) and Eq. (12), it can be observed that both of the controllers can have an infinite gain at the resonant frequency point. In the control system, the 180° delay phaseshifting is fed into the system by the Eq. (12) controller, while a 90° delay phaseshifting is fed by the Eq. (11) controller. Thus, Eq. (11) is selected for its better phase margin. This method improves the tracking performance of the ac signal and eliminates the steadystate error.
IV. CONTROL SCHEMES OF CONVERTER
 A. General Block of the QuasiDPC Scheme
Based on an analysis of the mathematical model of a PWM rectifier and instantaneous power, a quasiDPC control block with an adaptive resonant frequency PR controller is proposed and shown in
Fig. 2
. This scheme takes a dc voltage controller as an outerloop to generate a given value of active power. Then it calculates the given value of the innerloop current. A PI controller is chosen in the dc voltage control loop, while a PR controller is needed in the ac current innerloop. The quasiDPC scheme realizes the active and reactive power control by using a fast current controller.
The block of proposed quasiDPC control scheme.
However, considering the varying frequency of a BESG, a general PR controller with a constant resonant frequency cannot reach the expected performance. When the actual current frequency is very different from the resonant frequency of the PR controller, it can deteriorate the dynamic/static performance of the current loop. Therefore, a variable frequency resonant phase locked loop (RPLL) is proposed, which is used for tracking the frequency and phase of the BESG voltage. The output frequency of the RPLL can modify the resonant frequency of the PR controller, so that it can ensure that the PR controller regulates the ac current at the right frequency.
 B. Resonant Frequency Adaptive PR Control Scheme
In order to improve the current dynamic response, the selection of the controller parameters seems especially important. Unlike the polezero cancellation method in the PI controller design, the second order PR controller needs the synthesis design method to optimize the controller parameters. Taking the control delay of a digital control system and the filter of the feedback current into consideration, from Eq. (6) and Eq. (11), a control block of the current innerloop is set up in
Fig. 3
and the currents formulas can be expressed as:
Control model scheme of current innerloop.
In this formula, the characteristic polynomial D(s) is denoted as:
where
T_{s}
is the PWM control cycle, and
T_{f}
is the time constant of the feedback current filter (in this paper
T_{f}
=1/(2
π
5k)).
i_{Mα,β}
is generated by the current reference, while
i_{disα,β}
is generated by disturbances of the BESG voltage. At the resonant frequency point, no matter what the values of
K_{p}
(
K_{p}
>0) and
K_{r}
(
K_{r}
>0) are, the provided the system is stable, and the frequency response characteristic of Eq. 13 can be obtained as:
From Eq. 15, it can be observed that if the radian frequency of the current reference is equal to
ω_{e}
, the current controller can achieve zero static error. In addition, thedisturbance of the BESG voltage variation can also be eliminated.
Thus, the closeloop transfer function of the current innerloop can be expressed as:
The corresponding openloop transfer function is obtained as:
To achieve the realization of the digital control system, the discretization process is taken into the system. In this paper, a bilinear discrete method (
Tustin
) is used
[31]
. It is given by:
By substituting the system parameters shown in
Table I
into Eq. (16), the root locus of the current closedloop transfer function in the zdomain can be illustrated in
Fig. 4
. From Eq. (16) and Eq. (17), it is known that the currentloop is a fifthorder system by using a PR controller. In order to make the control loop obtain a better dynamic performance, the system predominant poles should be configured as a typical secondorder system. Taking both the static and dynamic responses into consideration, the system damping coefficient
ζ
should be set to 0.707. Meanwhile, the three other poles should be kept away from the unit circle boundary. Firstly, with
K_{p}
confirmed in a specific range of values, the root locus in the zdomain with
K_{r}
varying from zero to infinity is drawn in
Fig. 4
(a). Then with
K_{r}
confirmed in a specific range of values, the root locus in the zdomain with
K_{p}
varying from zero to infinity is drawn in
Fig. 4
(b).
THE SYSTEM PARAMETERS
The roots locus of current PR control loop with different parameters of (a) K_{p}=1,10,15,20,25 and (b) K_{r}=3k,4k,5k,6k,7k.
From
Fig. 4
(a), the following can be determined. When 0<
K_{p}
<1, the system root locus starts from the boundary of the unit circle and moves outside the circle. The system is unstable. As a result, there is no proper
K_{p}
. When 1<
K_{p}
<12, the system root locus moves from the inner unit circle to outside the unit circle. However, the locus have not reached the equal damping ratio (
ζ
=0.707) line. There is no proper
K_{p}
. When 12<
K_{p}
<18, the system root locus crosses the equal damping ratio (
ζ
=0.707) line and the poles on this line are nearer to the boundary of the unit circle unlike the other poles. Thus, there is a proper
K_{p}
in this value range. When
K_{p}
>18, the system root locus gradually goes away from the equal damping ratio. From
Fig. 4
(b), the following can be determined in the same way. When 0<
K_{r}
<4500, the system root locus does not reach the equal damping ratio (
ζ
=0.707) line. There is no proper
K_{r}
. When 4500<
K_{r}
<5500, the system root locus crosses the equal damping ratio (
ζ
=0.707) line. The predominant poles exist. There is a proper
K_{r}
in this value range. When
K_{r}
>5500, the poles at the cross points of the system root locus and the equal damping ratio line gradually get close to other poles, and lose the predominant function.
In addition, a certain gain margin and phase margin should also be considered to determine
K_{p}
. According to Eq. (16), an openloop system bode diagram is illustrated in
Fig. 5
. When
K_{p}
varies from 1 to 25, the magnitude margin decreases slowly while the phase margin first increases and then decreases gradually. When
K_{p}
=25, the magnitude margin is 19.3dB and the phase margin is 31.3°. If
K_{p}
increases continuously, the phase margin becomes negative and the system becomes unstable.
Bode diagram of current openloop with different K_{p}.
Based on the principle discussed above,
K_{p}
=15.6 is confirmed. Meanwhile
K_{r}
=5400. Based on the designed parameters, the frequency response characteristic of the current closedloop transfer function Eq. (16) is illustrated in
Fig. 6
. From this it can be seen that the system has a wider bandwidth
f_{b}
=1.61kHz which approaches to a twentysixfold current frequency. Therefore, the response of the current control loop to the current reference is very fast. According to the aforementioned analysis, quick instantaneous power control in a PWM rectifier can be realized as long as the response speed of the current control loop is fast enough. This makes the quasiDPC scheme possible.
Bode diagram of current of current closedloop.
Generally, the parameters of a current control loop may change along with variations of ambient temperature and load. In order to confirm the controller robustness corresponding to changes in the inductance, resistance and frequency, the distribution of the characteristic roots along with the changes of these three parameters are drawn in the zdomain and shown in
Fig. 7
(a)(c).
Fig. 7
(a) shows the migration of the characteristic roots of the current closedloop transfer function when
L
changes from 0.1mH to 1.4mH, all of the closedloop characteristic roots are located inside the unit circle and system is stable.
Fig. 7
(b) shows the migration of the characteristic roots when
R
changes from 0.05Ω to 0.5Ω and all of the roots are located inside the unit circle. However, they tend to move to the boundary of the unit circle. This may cause an unstable system as
R
increases. However, the line resistance in a highpower converter does not generally transcend to 0.5Ω. Thus, the system can be kept stable.
Roots locus of current PR control loop corresponding to the change of system parameters of (a) L, (b) R, (c) ω_{e}.
According to
Fig. 7
(c), it can be observed that all of the characteristic roots are located inside the unit circle, when
ω_{e}
varies from 50
π
rad
/
s
(25Hz) to 120
π
rad
/
s
(60Hz). However, all of these roots are much closer to the boundary of the unit circle and tend to move outside of it when the frequency decreases or increases. In particular
ω_{e}
decreases approaching to 50
π
rad
/
s
(25Hz), and the roots move much closer to the boundary of the unit circle along the path of the real axis direction. Thus, the frequency of the BESG should be tracked in real time to reduce the impact on the system stability against frequency variations. A comparison of a conventional PI controller and an adaptive PR controller is shown in
Fig. 8
. This indicates that an open loop transfer function with the proposed controller has a higher gain at a specific frequency than that with the conventional PI controller.
Comparison of conventional PI controller and adaptive PR controller.
 C. Variable Frequency Resonant PLL Design
Unlike the traditional rectifier circuit
[12]
, the input of the rectifier circuit in this paper is the BESG, which has a higher impedance than the grid. Moreover, the designed inductance in the line is much smaller (0.3mH). When the driving signal comes out, the terminal voltage of the BESG is distorted by harmonics and its frequency varies from 25Hz to 60Hz. The conventional digital phaselocked loop (DPLL) faces a serious challenge in tracking the precise frequency and phase of a terminal voltage. Based on the theory of resonant control and a modified PLL which is based on the unity voltage vector orientation, the fluctuation of the PLL output frequency and phase is compensated by multi resonant controllers (ΣRC). Then, the block of the variable frequency RPLL can be constructed in
Fig. 9
.
Block of variable frequency RPLL.
Assuming that
θ_{e1}
is the phase angle of the BESG voltage,
v_{e1}
is the unit voltage vector and
θ_{e}
is the output observed phase angle of the PLL, and
v_{e}
is the unit vector at its direction. The relationship among these variables is expressed as:
If Δ
θ
=
θ_{e1}

θ_{e}
, when Δ
θ
≈
0
, the following formula is obtained:
This means that the two vectors product is approximately equal to the subtraction their phase angles.
By using a PI regulator to reduce the deviation between the two vectors, the angle frequency
ω_{e}
of the vector
v_{e}
can be obtained by the output of the PI. The integration of
ω_{e}
is equal to the observed phase angle
θ_{e}
. By analyzing the THD, the BESG voltage includes the 5
^{th}
, 7
^{th}
and a high frequency switching harmonic, which makes the angle deviation include the 4
^{th}
, 6
^{th}
and 99
^{th}
harmonics
[27]
. A traditional PI regulator cannot eliminate this deviation which varies periodically and sinusoidally. Thus, a multiresonant compensator scheme is introduced to eliminate the sinusoidal deviation. The transfer function of the multiresonant compensator is expressed as:
The compensation value
θ_{c}
is calculated by
ΣRC
to eliminate the deviation of the phase and frequency. However, when the fundamental frequency varies, the constant resonant compensator cannot realize the aforementioned effect. Therefore, the output frequency
ω_{e}
is used to modify the resonant frequency of the compensator. Then, selfadaptive tracking of the resonant frequency can be realized
[28]

[30]
.
A Bode diagram of the multiresonant compensator is shown in
Fig. 10
. It can be observed that a higher amplitude at the resonant frequency point can be achieved, which can realize the zero steadystate error control at this frequency.
Bode diagram of multiresonant compensator.
When
K_{r4}
=400,
K_{r6}
=800 and
K_{r99}
=1000, the amplitudes are 133dB, 134dB and 113dB, respectively.
Fig. 11
shows a contrastive simulation of the PLL and the RPLL, when the voltage contains 5
^{th}
, 7
^{th}
and 100
^{th}
harmonics.
Fig. 12
shows the voltage THD. The simulation results indicate that obvious fluctuations of the phase appear in the traditional PLL, while the contrary is the case in the RPLL. In addition, the fast frequency tracking ability is essential for the variable frequency RPLL.
Fig. 13
shows the frequency tracking process from 30Hz to 50Hz within a 0.2s interval.
Contrastive simulation of PLL and RPLL.
Voltage harmonics analysis with THD.
frequency tracking process of RPLL from 30Hz to 50Hz.
 D. Voltage Controller with Instantaneous Power FeedForward
The substance of the dclink voltage fluctuation is that the generator rectifier input power is not equal to that in the grid inverter when a sudden load is imposed or unloaded. Assuming that
R_{L}
is the equivalent load resistance between the PN points and noticing that
u_{dc}
=2
u_{dc1}
=2
u_{dc2}
, from Eq. (7) and Eq. (8) the instantaneous power balance equation is derived as:
where
p_{L}
stands for the absorbing power of the rectifier. The transfer function
G_{V}
(s) from the square of the dc voltage
u_{dc}^{2}
to the instantaneous power
p_{L}
can be obtained:
From Eq. (23), the relation between
u_{dc}^{2}
and
p_{L}
represents linearity.
Therefore, the output of the dc voltage controller can be designed as:
where
K_{Vp}
and
K_{Vi}
are the parameters of the PI regulator.
Considering the delay of the current innerloop (
T_{bw}
=1/2
π
f_{b}
), the dc voltage openloop transfer function with a PI controller is obtained as:
The closedloop transfer function is derived as:
The control block of the dclink voltage outerloop is illustrated in
Fig. 14
.
Block of dclink voltage outerloop.
Since 0.5
R_{L}C
>>
T_{bw}
, Eq. (26) presents a nearly typical second order model. The damping ratio and natural frequency are given by:
To achieve better dynamic performance and stability, the damping ratio should be set to 0.707. The natural frequency should be designed as 300
rad
/
s
to avoid mutual interference between the voltage loop and the current loop. Therefore, at the rated load (i.e.,
R_{L}
=4.8
Ω
), the parameters of the PI controller can be obtained as
K_{Vp}
=0.025 and
K_{Vi}
=49.5. When
K_{Vi}
=49.5, the root locus in the zdomain with an increase of
K_{Vp}
is shown in
Fig. 15
. It can be seen that the variation of
K_{Vp}
has very little impact on the system stability.
Root locus plots in zdomain when K_{Vi}=49.5, 0Vp<∞.
From Eq. (27), the gain value
K_{Vp}
of the PI controller is determined by the load. In order to maintain the designed optimal second order system performance,
R_{L}
should be estimated in realtime and the estimation method is given by:
The parameters of the PI controller can be modified online.
Instantaneous power feedforward is adopted to reduce the burden of the dc voltage regulator when the load changessuddenly:
where
p_{inv}
is the instantaneous power of the grid side inverter.
u_{invα}
,
u_{invβ}
and
i_{invα}
,
i_{invβ}
denote the grid side voltages and currents in the stationary
α

β
frame.
p
^{*}
_{rct}
is the active power command. Considering the inverter power feedforward,
p
^{*}
_{L}
becomes the command of the capacitor charging power. Through this method, the system can keep an ideal dynamic performance in the entire power range with a smaller film capacitor (
C
=1100
μF
).
 E. SmallSignal Analyses
In order to analyze the antidisturbance capability of the dclink voltage against sudden changes of load power, a smallsignal model is established. The system state variables can be described as the sum of two parts i.e. the quantity on the operating point which is called a large signal and the small deviation from the operating point which is called a small signal. This is shown by:
where
U_{dc}^{2}
,
P_{inv}
and
P_{rct}
stand for the large signal; and
Δu_{dc}^{2}
,
Δp_{inv}
and
Δp_{rct}
stand for the small signal. Substituting (31)(33) into the state equations (6)(8) and considering the PR current control with a SVM module as a
T_{bw}
=1/2
π
f_{b}
time delay, the smallsignal model of the Ttype converter is derived as:
A smallsignal model block with the proposed control scheme is illustrated in
Fig. 16
, from which the transfer function from
Δp_{inv}
to
Δu_{dc}^{2}
is obtained as:
The smallsignal model of the proposed control scheme.
In Eq. (35),
PI
=
K_{Vp}
+
K_{Vi}
/
s
is the voltage controller, and
e
^{Ts}
is the effect of the sampling delay on the digital control system, which can be replaced by a firstorder delay by the Taylor series.
Fig. 17
shows a Bode diagram of the proposed control scheme and the conventional control scheme. It is shown that the proposed scheme has a lower magnitude peak than the conventional scheme at the same low voltage controller gain (
K_{Vp}
=0.025), which does not lead to a large overshoot of the voltage response. Hence, fluctuations of dclink voltage are suppressed with the power charges. When the dclink voltage PI gain increases, the magnitude peak decreases. The system stability is investigated from the root locus plots i.e.
Fig. 15
. It is observed that the system is kept stable when
K_{Vp}
varies from 0.025 to 0.5 since the system poles stay within the unit circle.
The bode diagram of smallsignal model of threelevel Ttype converter.
V. SIMULATION AND EXPERIMENTAL RESULTS
To validate the proposed control scheme, the simulation of a 75kW Ttype threelevel SSG converter is established based on MATLAB/Simulink R2011b. The system parameters are listed in
Table I
.
 A. Simulation
The simulation results of the conventional scheme, which is based on the voltageoriented control with a PI controller and a DPLL
[12]
, and the proposed scheme are compared in
Fig. 18
. The generator terminal voltage harmonics analysis with the THD is shown in
Fig. 19
. The simulation is a sudden load change process in which a resistive load is imposed at 1s and unloaded at 1.15s.
Simulation results of the load sudden change transient response. (a) Conventional scheme. (b) Proposed scheme.
generator voltage harmonics analysis with THD.
Fig. 18
(a) adopts the conventional scheme and shows the transient response of the dclink voltage, the generator current, the voltage phase, the active power and the reactive power in the entire process. The output phase angle of the DPLL is unstable for the distorted generator voltage. Due to the impact of the strong coupling on the current controlloop and the inaccurate output frequency of the DPLL, the response speed to the reference current is unsatisfactory and an overshoot is inevitable. The fluctuation extent of the dclink voltage approaches 50V. As a result, the active power fluctuates greatly while the reactive power is not kept at zero.
On the other hand,
Fig. 18
(b) shows the adoption of the proposed quasiDPC scheme. When compared to
Fig. 18
(a), it can be observed that the system dynamicstatic performance has been significantly improved. After a very short transient, the generator current tracks its reference value with a high rapidity and stability. The fluctuation extent of the dclink voltage is reduced to 6V which is much smaller than that in the conventional scheme. In addition, the active power is kept at a specific constant value while the reactive power is kept at zero. According to the comparative simulation results, fast power control is successfully achieved by the proposed quasiDPC scheme.
 B. The Prototype Experiment
The prototype of a 75kW Ttype threelevel SSG converter is developed based on a Texas Instruments’ digital signal processer (DSP) chip TMS320F28335 and an Altera’s complex programmable logic device (CPLD) chip EPM3032AT144.
Fig. 20
shows the hardware prototype, including a Ttype threelevel SSG converter, a YOKOGAWA DL850 recorder, a brushless excite synchronous generator tied to the principal axis of a ship engine, a diesel auxiliary generator and a Tektronix’s voltage/current probe. An Infineon FF600R12ME4 power module is selected, and the dead time is set to 2
μs
. For an objective analysis of the experiment results, the YOKOGAWA DL850 recorder is adopted to measure the voltages and currents on both side of the converter. The parameters of the experimental prototype are the same as those used in the simulation.
Hardware prototype. (a) 75kW Ttype threelevel SSG converter. (b) BESG and ship engine. (c) Diesel auxiliary generator. (d) Measuring instruments.
In order to test the dynamic performance of the proposed control scheme, load sudden change experiments are conducted in the inverter standalone operational mode. Due to the considerable load capacity, the rotor speed should be around 1500
rpm
, and the frequency of the ship shaft synchronous generator is approximately at 50Hz. The inverter output voltage (RMS) and its frequency are kept at constant values of 400V and 50Hz, respectively. The power of the resistive load is 75kW. Experimental results obtained with the conventional scheme and the proposed scheme are shown in
Fig. 21
. They are identical to the simulation. The transient response of the rectifier current with the proposed scheme is faster than that with the conventional scheme. The generator current with the proposed scheme tracks its reference value within five switching cycles (1ms). When the 75kW resistive load suddenly changes, the fluctuation extent of the dclink voltage is kept within 60~65V by using the conventional control scheme [see
Fig. 21
(a) and (b)]. However, with the proposed scheme, the dc voltage fluctuation extent can be kept at 8~10V [see
Fig. 21
(c) and (d)]. The dclink voltage reaches the reference value (600V) without an overshoot in approximately 22ms. According to the waveforms of
u_{UVW}
and
i_{U}
in
Fig. 21
(a)(d), by using the proposed scheme, the output voltage and the power response at the inverter side are much more stable than those with the conventional scheme. This indicates that the proposed control scheme can provide a fast power response and a fast current control. It also indicates that the dclink voltage has an excellent robustness to power changes with a small voltage deviation. According to experimental results of a sudden change in load, the proposed scheme achieves the effect of quasidirect power control.
Experimental results of the load sudden change transient response with (a), (b) Conventional scheme, (c), (d) Proposed scheme.
An experiment on rotor speed variations is also conducted for testing the ship speed variation working conditions. Making the BESG operate at speed of 900 rpm (35Hz) with a 55kW load on the system, the speed increases linearly up to 1500 rpm (50Hz) in a 2s interval. The entire experiment process and its partial waveforms are shown in
Fig. 22
. The experimental result show that the proposed scheme can adapt the changes in the frequency. The envelope curve of the generator current is kept at 115A when the frequency varies from 35Hz to 50Hz. This indicates that the proposed variable frequency phase locked loop can track the frequency and phase of the BESG precisely.
Experimental results of proposed scheme with speed variation from 35Hz to 50Hz in 2s.
Fig. 23
shows an experiment on a 7.5kw ac motor load. Before the motor load direct starting, a 40kW resistive load is loaded on the system. From the figure, it can be seen that the same rapid dynamic response is presented upon the application of an ac motor load. The generator current is nearly sinusoidal and in the phase with the generator phase voltage (i.e. the generator power factor approaches 1).
Experiment on the 7.5kw ac motor load.
Fast Fourier transform (FFT) analyses of the generator side current and grid side current with the proposed scheme are shown in
Fig. 24
. The THD of the generator side current is 5.12% while the THD of the grid side current is 2.65%. As a result, the harmonic characteristic and EMC of the entire generation system have been significantly improved, which perfectly meets the standards of vessel electronic power supplies. The efficiency of a Ttype SSG converter with the conventional scheme and with the proposed scheme at each power scale is measured with a FLUKE 1725 power logger. The system maximum efficiency is promoted to 97.5% with the proposed scheme with the full power scale application as shown in
Fig. 25
.
Current THD at (a) generator side and (b) grid side.
System efficiency curve.
VI. CONCLUSION
This paper presents a novel fast instantaneous power control scheme for Ttype Threelevel SSG converters. A novel quasi direct power control is proposed, which adopts a resonant frequency adaptive PR controller with a variable frequency resonant PLL. The current control loop parameters have been designed by analyzing the frequency response characteristic and root locus trajectory in detail. The rotating transformation and strong coupling are both eliminated. To suppress the impact of a distorted generator voltage on the DPLL, a multiresonant compensator is introduced into the modified RPLL. As a result, an accurate generator frequency is obtained to modify the PR controller’s resonant frequency. This method provides a fast current dynamic response and promotes system robustness. According to the theory of instantaneous power balance, the load instantaneous power is fed forward to the dclink voltage control loop to alleviate the burden on the voltage controller. As a result, a fast power response with a unity power factor is easily achieved by the proposed scheme. Moreover, all of the controllers are designed based on the predominant pole method with the required phase margin and steadystate error. The simulation and experimental results show that the proposed control scheme is feasible and valid for Ttype threelevel SSG converter systems.
Acknowledgements
This project is supported by the National Natural Science Foundation of China under Grant No. 51377064.
BIO
Zhenjun Lin was born in Changsha, Hunan Province, China, in 1987. He is presently working towards his Ph.D. degree at Huazhong University of Science and Technology (HUST), Wuhan, China. His current research interests include PWM back to back acdcac converter integrated control, motor control and microgrid technologies.
Shenghua Huang received his Ph.D. degree from Huazhong University of Science and Technology (HUST), Wuhan, China, in 1991; where he is presently working as a Professor. He is a Member of the China Electrotechnic Society and the Electrotechnic Integration Committee. His current research interests include the control method designs of new types of electrical machines, power electronics and their applications in industry and power systems.
Shanming Wan received his Ph.D. degree from Huazhong University of Science and Technology (HUST), Wuhan, China, in 1998; where he is presently working as a Professor. His current research interests include the control method designs of new types of electrical machines, power electronics and their applications in industry.
Prousalidis J.
,
Patsios C.
,
Kanellos F.
,
Sarigiannidis A.
,
Tsekouras N.
,
Antonopoulos G.
“Exploiting shaft generators to improve ship efficiency,”
Electrical Systems for Aircraft, Railway and Ship Propulsion (ESARS)
2012
1 
6
Lee J.S.
,
Lee K.B.
2015
“Openswitch fault tolerance control for a threelevel NPC/TType rectifier in wind turbine systems,”
IEEE Trans. Ind. Electron.
62
(2)
1012 
1021
DOI : 10.1109/TIE.2014.2347912
Schweizer M.
,
Kolar J. W.
2013
“Design and implementation of a highly efficient threelevel ttype converter for lowvoltage applications,”
IEEE Trans. Power Electron.
28
(2)
899 
907
DOI : 10.1109/TPEL.2012.2203151
Alemi P.
,
Jeong S.Y.
,
Lee D.C.
2015
“Active damping of LLCL filters using pr control for gridconnected threelevel Ttype converters,”
Journal of Power Electronics
15
(3)
786 
795
DOI : 10.6113/JPE.2015.15.3.786
Zhang W.
,
Hou Y.
,
Liu X.
,
Zhou Y.
2012
“Switched control of threephase voltage source PWM rectifier under a widerange rapidly varying active load,”
IEEE Trans. Power Electron.
27
(2)
881 
890
DOI : 10.1109/TPEL.2010.2095507
Xia C.L.
,
Xu Z.
,
Zhao J.X.
2015
“A new direct power control strategy for NPC threelevel voltage source rectifiers using a novel vector influence table method,”
Journal of Power Electronics
15
(1)
106 
115
DOI : 10.6113/JPE.2015.15.1.106
Kwak S.
,
Park J.C.
2015
“Modelpredictive direct power control with vector preselection technique for highly efficient active rectifers,”
IEEE Trans. Ind. Informat.
11
(1)
44 
52
DOI : 10.1109/TII.2014.2363761
Song Z.
,
Tian Y.
,
Chen W.
,
Zhu Z.
,
Chen Z.
2016
“Predictive duty cycle control of threephase activefrontend rectifiers,”
IEEE Trans. Power Electron.
31
(1)
698 
710
DOI : 10.1109/TPEL.2015.2398872
Zou Z.X.
,
Zhou K.
,
Wang Z.
,
Cheng M.
2015
“Frequencyadaptive fractionalorder repetitive control of shunt active power filters,”
IEEE Trans. Ind. Electron.
62
(3)
1659 
1668
DOI : 10.1109/TIE.2014.2363442
Hang L.
,
Liu S.
,
Yan G.
,
Qu B.
,
Lu Z.–Y.
2011
“An improved deadbeat scheme with fuzzy controller for the gridside threephase pwm boost rectifier,”
IEEE Trans. Power Electron.
26
(4)
1184 
1191
DOI : 10.1109/TPEL.2010.2089645
Guzman R.
,
de Vicuña L. G.
,
Morales J.
,
Castilla M.
,
Matas J.
2016
“Slidingmode control for a threephase unity power factor rectifier operating at fixed switching frequency,”
IEEE Trans. Power Electron.
31
(1)
758 
769
DOI : 10.1109/TPEL.2015.2403075
Dannehl J.
,
Wessels C.
,
Fuchs F.W.
2009
“Limitations of Voltageoriented PI current control of gridconnected PWM rectifiers with LCL filters,”
IEEE Trans. Ind. Electron.
56
(2)
380 
388
DOI : 10.1109/TIE.2008.2008774
Bao X.
,
Zhuo F.
,
Tian Y.
,
Tan P.
2013
“Simplified feedback linearization control of threephase photovoltaic inverter with an LCL filter,”
IEEE Trans. Power Electron.
28
(6)
2739 
2752
DOI : 10.1109/TPEL.2012.2225076
He N.
,
Xu D.
,
Zhu Y.
,
Zhang J.
,
Shen G.
,
Zhang Y.
,
Ma J.
,
Liu C.
2013
“Weighted average current control in a threephase grid inverter with an LCL filter,”
IEEE Trans. Power Electron.
28
(6)
2785 
2797
DOI : 10.1109/TPEL.2012.2219322
Kim H.
,
Degner M. W.
,
Guerrero J. M.
,
Briz F.
,
Lorenz R. D.
2010
“Discretetime current regulator design for ac machine drives,”
IEEE Trans. Ind. Appl.
46
(4)
1317 
1324
Yin L.
,
Zhao Z.
,
Lu T.
,
Yang S.
,
Zou G.
2014
“An improved DClink voltage fast control scheme for a PWM rectifierinverter system,”
IEEE Trans. Ind. Appl.
50
(1)
1669 
1675
CallePrado A.
,
Alepuz S.
,
Bordonau J.
,
NicolasApruzzese J.
,
Cortés P.
,
Rodriguez J.
2015
“Model predictive current control of gridconnected neutral point clamped converters to meet low voltage ride through requirements,”
IEEE Trans. Ind. Electron.
62
(3)
1503 
1514
DOI : 10.1109/TIE.2014.2364459
Jia Y.
,
Zhao J.
,
Fu X.
2014
“Direct grid current control of LCLfiltered gridconnected inverter mitigating grid voltage disturbance,”
IEEE Trans. Ind. Electron.
29
(3)
1532 
1541
Shen G.
,
Zhu X.
,
Zhang J.
,
Xu D.
2010
“a new feedback method for PR current control of LCLfilterbased gridconnected inverter,”
IEEE Trans. Ind. Electron.
57
(6)
2033 
2041
DOI : 10.1109/TIE.2010.2040552
Li B.
,
Yao W.
,
Hang L.
,
Tolbert L. M.
2012
“Robust proportional resonant regulator for gridconnected voltage source inverter (VSI) using direct pole placement design method,”
IET Power Electron.
Vol. 5
5
(8)
1367 
1373
DOI : 10.1049/ietpel.2012.0102
Guo Q.
,
Liu H.
,
Zhang Y.
2015
“A new control strategy for a threephase PWM currentsource rectifier in the stationary frame,”
Journal of Power Electronics
15
(4)
994 
1005
DOI : 10.6113/JPE.2015.15.4.994
Vidal A.
,
Freijedo F. D.
,
Yepes A. G.
,
FernandezComesana P.
,
Malvar J.
,
Lopez Ó.
,
DovalGandoy J.
2013
“Assessment and optimization of the transient response of proportionalresonant current controllers for distributed power generation systems,”
IEEE Trans. Ind. Electron.
60
(4)
1367 
1383
DOI : 10.1109/TIE.2012.2188257
Timbus A.
,
Liserre M.
,
Teodorescu R.
,
Rodriguez P.
,
Blaabjerg F.
2009
“Evaluation of current controllers for distributed power generation systems,”
IEEE Trans. Power Electron.
24
(3)
654 
664
DOI : 10.1109/TPEL.2009.2012527
Cao L.
,
Loo K. H.
,
Lai Y. M.
2015
“Frequencyadaptive filtering of lowfrequency harmonic current in fuel cell power conditioning systems,”
IEEE Trans. Power Electron.
30
(4)
1966 
1978
DOI : 10.1109/TPEL.2014.2323398
Uphues A.
,
Notzold K.
,
Wegener R.
,
Soter S.
“Frequency adaptive PRcontroller for compensation of current harmonics,”
Industrial Electronics Society, IECON 201440th Annual Conference of the IEEE
2014
Freijedo F. D.
,
Yepes A. G.
,
Malvar J.
,
Lopez O.
,
FernandezComesana P.
,
Vidal A.
,
DovalGandoy J.
2011
“Frequency tracking of digital resonant filters for control of power converters connected to public distribution systems,”
IET Power Electron.
4
(4)
454 
462
DOI : 10.1049/ietpel.2010.0209
Yang L.Y.
,
Wang C.L.
,
Liu J.H.
,
Jia C.X.
2015
“A novel phase locked loop for gridconnected converters under nonideal grid conditions,”
Journal of Power Electronics
15
(1)
216 
226
DOI : 10.6113/JPE.2015.15.1.216
Lee K.J.
,
Lee J.P.
,
Shin D.
,
Yoo D.W.
,
K. H.J.
2014
“A novel grid synchronization PLL method based on adaptive lowpass notch filter for gridconnected PCS,”
IEEE Trans. Ind. Electron.
61
(1)
292 
301
DOI : 10.1109/TIE.2013.2245622
GonzalezEspin F.
,
Figueres E.
,
Garcera G.
2012
“An adaptive synchronousreferenceframe phaselocked loop for power quality improvement in a polluted utility grid,”
IEEE Trans. Ind. Electron.
59
(6)
2718 
2731
DOI : 10.1109/TIE.2011.2166236
Dong D.
,
Wen B.
,
Boroyevich D.
,
Mattavelli P.
,
Xue Y.
2015
“Analysis of phaselocked loop low frequency stability in threephase gridconnected power converters considering impedance interactions,”
IEEE Trans. Ind. Electron.
62
(1)
310 
321
DOI : 10.1109/TIE.2014.2334665
Yepes A.
,
Freijedo F.
,
DovalGandoy J.
,
Lopez O.
,
Malvar J.
,
FernandezComesana P.
2010
“Effects of discretization methods on the performance of resonant controllers,”
IEEE Trans. Power Electron.
25
(7)
1692 
1712
DOI : 10.1109/TPEL.2010.2041256