DC microgrids are considered as prospective systems because of their easy connection of distributed energy resources (DERs) and electric vehicles (EVs), reduction of conversion loss between dc output sources and loads, lack of reactive power issues, etc. These features make them very suitable for future industrial and commercial buildings’ power systems. In addition, the bipolar-type dc system structure is more popular, because it provides two voltage levels for different power converters and loads. To keep voltage balanced in such a dc system, a bidirectional dual buck-boost voltage balancer with direct coupling is introduced based on P-cell and N-cell concepts. This results in greatly enhanced system reliability thanks to no shoot-through problems and lower switching losses with the help of power MOSFETs. In order to increase system efficiency and reliability, a novel burst-mode control strategy is proposed for the dual buck-boost voltage balancer. The basic operating principle, the current relations, and a small-signal model of the voltage balancer are analyzed under the burst-mode control scheme in detail. Finally, simulation experiments are performed and a laboratory unit with a 5kW unbalanced ability is constructed to verify the viability of the bidirectional dual buck-boost voltage balancer under the proposed burst-mode control scheme in low-voltage bipolar-type dc microgrids.
I. INTRODUCTION
DC microgrids
[1]
-
[14]
, compared with conventional ac microgrids, have attracted a lot of attention in the pursuit of effective solutions to meet modern energy distribution challenges. They can provide a better connection for dc output type sources such as photovoltaic (PV) systems, fuel cells, and energy storage devices (Li-ion batteries and super-capacitors, etc.). Moreover, system efficiency becomes higher for the lower conversion losses of the inverters between sources and loads, when loads are directly supplied with dc power. Other advantages are as follows: (1) no frequency stability or reactive power issues; (2) no skin effect or ac losses; (3) no downtime related to voltage sags or blackouts. Thus, they are very suitable for future industrial and commercial buildings’ power systems, and for making our daily life efficient and secure.
Generally, there are two types of dc microgrids
[1]
,
[4]
: unipolar-type and bipolar-type. The first type has only one voltage level in a two-wire dc distribution system. This makes it impossible to supply some types of loads at half voltage. The other type has two voltage levels in a three-wire system. This can provide a grounded neutral line, which is favorable for the security of people in domestic and office places. Additionally, bipolar-type systems have higher reliability due to the possibility of using a power supply under one line failure. This can also decrease power loss for reducing current levels and increasing power transmission capability.
As shown in
Fig. 1
, a low-voltage bipolar-type dc microgrid
[1]
,
[11]
consists of a bidirectional rectifier, a voltage balancer, distributed energy sources (DERs) and dc/ac loads, where dc power is transmitted through a three-wire system. The bidirectional rectifier can construct a unipolar-type system, and then a voltage balancer with the voltage balancing function is introduced to build a three-wire bipolar-type system. The voltage balancer can make the power supply flexible and reliable with two voltage levels for different loads in a bipolar-type dc microgrid. Compared with the unipolar-type dc grid, a voltage balancer is needed and additional loss can be produced in a bipolar-type dc grid.
Low-voltage bipolar-type dc microgrid structure.
This paper will focus on the research of a voltage balancer. The conventional topologies of bridge-type converters can suffer from a shoot-through risk, which is a major drawback to the reliability of this type of voltage balancer
[4]
. In addition, MOSFETs with lower switching loss and conducting loss cannot be used directly in conventional bridge converters due to the poorer characteristic of the MOSFET body-diode. Thus, a bidirectional dual buck-boost voltage balancer based on the P-cell and N-cell concepts is adopted in this paper
[15]
-
[18]
. Compared with the traditional bridge-type converter, it exhibits the following distinct merits
[19]
-
[24]
: (1) there is no shoot-through issue due to the fact that there are no active power switches connected in series in each phase leg; (2) the reverse recovery dissipation of the power switch is greatly reduced because there is no freewheeling current flowing through the body diode of the power switches which improves the reliability; (3) using MOSFETs combined with optimized diodes permits a higher switching frequency to reduce weight and volume. However, the bidirectional dual buck-boost voltage balancer has the disadvantage that two separate inductors are needed resulting in increased volume and weight. However, this can be mitigated by using the directly coupled inductor technique.
Generally, a voltage balancer is always working under constant-voltage mode control, resulting in additional power loss, such as converters’ switching loss and conduction loss, especially under voltage balanced conditions. To increase system efficiency and reliability, a novel burst-mode control strategy is proposed for the dual buck-boost voltage balancer.
In this paper, a bidirectional dual buck-boost voltage balancer based on the P-cell and N-cell concepts is introduced in Section II, where a direct coupling inductor combined with a common inductor is presented to optimize the two separate inductors. The basic operation principle based on the continuous conduction mode (CCM) is also presented and analyzed in this section. In Section III, a novel burst-mode control strategy is proposed, where the operating principle and the current relations of the inductors, the capacitors and the unbalanced loads are analyzed in detail. In Section IV, an average small-signal model of the voltage balancer under the CCM condition is given to design the control system parameters. In Section V, a 10kW simulation experiment is carried out to validate the feasibility of the proposed burst-mode control strategy for the voltage balancer. In Section VI, a laboratory unit with a 5kW unbalanced ability is constructed to verify the viability of the proposed burst-mode control strategy for the dual buck-boost voltage balancer in low-voltage bipolar-type dc microgrids. Finally, some concluding remarks are drawn in Section VII.
II. BIDIRECTIONAL DUAL BUCK-BOOST VOLTAGE BALANCER WITH DIRECT COUPLING
The concept of a “low-voltage bipolar-type dc microgrid” with a higher power supply quality is shown in
Fig. 1
, where medium voltage is converted into dc voltage in a range from 360V to 400V through a step-down transformer and an active-front-end rectifier. The three-wire dc distribution consisting of a positive line, a neutral line and a negative line is constructed by the voltage balancer, which provides two different voltage levels for customers. The load-side dc-dc/dc-ac converters can be connected between the positive line and the negative line, the positive line and the neutral line, the negative line and the neutral line separately. Since the latter two connections may cause power and voltage imbalances between the positive-neutral and the negative-neutral lines, it is essential to adopt dc voltage balance control. The voltage balancer is placed near the bidirectional rectifier to balance the positive and negative voltage, which can also be placed near the load side.
- A. Bidirectional Dual Buck-Boost Voltage Balancer Based on P-cell and N-cell
Power electronics circuits can be constructed with two basic switching cells defined as P-cell and N-cell
[16]
[17]
, as shown in
Fig. 2
. Each cell consists of one switching device (a MOSFET, IGBT or any other switching device) and one diode constituting three terminals: (+) which is connected to the positive of a voltage-source or capacitor, (-) which is connected to the negative of a voltage-source or capacitor, and a common terminal which is shown as (→) or (←). For the P-cell, this common terminal is connected to the negative terminal of a current source or inductor. For the N-cell, the common terminal is connected to the positive of a current source or inductor.
Two basic switching cells: P-cell and N-cell.
Fig. 3
shows the buck-boost converters based on the basic switch cells. It can be seen that the P-cell buck-boost converter can only transfer power from upside to downside, and the N-cell buck-boost converter from downside to upside. Thus, by combing the former two converters, a bidirectional dual buck-boost converter can be obtained forming a voltage balancer, as shown in
Fig. 4
. The voltage balancer consists of the P-cell leg (
S
1
,
D
1
), the N-cell leg (
S
2
,
D
2
), separate inductors (
L
1
,
L
2
), and two split dc bus capacitors (
Cu
,
Cd
). MOSFETs are used as power switches here, and their body diodes never work. Thus, both the power switches and the power diodes can get an optimized design independently. This permits a higher switching frequency to reduce the weight and volume.
Buck-boost converters based on basic switching cells.
Bidirectional dual Buck-boost voltage balancer.
As shown in
Fig. 4
,
Vdc1
,
Vdc2
and
Vdc
stand for the positive-neutral, negative-neutral and positive-negative voltages, respectively. In the following analysis, it is assumed that
Vdc
is kept constant with the regulation by the bidirectional rectifier.
- B. Mathematical Model in the Rotor Reference Frame
To overcome the drawback of the bidirectional dual buck-boost converter, where two separate inductors are needed resulting in more volume and weight, the directly coupled inductor technique combined with a common inductor is adopted, as shown in
Fig. 5
. The equivalent inductance
Lpn
is four times each phase inductance (
Ld1
,
Ld2
) using the direct coupling technique. The inductor
Lpn
between
S
1
and
S
2
, and the stray inductance
LS
of the interconnections will limit the current
ipn
if there is any overlap in the switching of the P-cell and N-cell devices.
The directly coupled inductor technique combined with the common inductor.
It is assumed that the overlap time is limited to below some value Δ
i
limit
. Then,
L
pn
has the following relation:
Depending on the system requirements, the directly coupled inductor can be optimized using Eq. (1).
Based on the current ripple analysis, the total inductance value (
Ld1
+
Lcom
) can be obtained as:
where,
fs
is the switching frequency and
Vdc1
=
Vdc2
. From Eq. (1),
Ld1
(
Ld2
) can be derived, and
Lcom
can also be calculated under the condition that Δ
ILD
≤ 20%
I
L0
(
I
L0
-nominal operating current).
- C. Basic Operation Principle under the CCM Condition
To simplify the analysis of the operation principle, some assumptions are made as follows: (1) all of the power MOSFETs and diodes are ideal devices with no consideration of the switching time or conduction voltage drop; (2) all of the inductors and capacitors are ideal with
Ld1
=
Ld2
and
Cu
=
Cd
=
C
; (3) the output dc voltages (
Vdc1
,
Vdc2
) are constant during each switching process.
The reference direction of
iL
is from the p terminal to the common terminal o. It can be seen that
iL1
is as a positive current while
iL2
as a negative current.
Fig. 6
shows the four basic operation modes under the CCM condition.
Basic operation modes: (a) Positive current iL = iL1, S1 turned on; (b) Positive current iL = iL1, D1 free-wheeling; (c) Negative current iL = -iL2, S2 turned on; (d) Negative current iL = -iL2, D2 free-wheeling.
1) Mode 1:
When
R1
is bigger than
R2
, the voltage
Vdc1
of the capacitor
Cu
will increase combined with a decrease of the voltage
Vdc2
of the capacitor
Cd
. At this moment,
S
1
is turned on and the positive inductor current
iL1
increases linearly. In this mode, the P-cell leg starts to transfer additional power to
R2
through
L
1
, as shown in
Fig. 2
(a).
2) Mode 2:
When
S
1
is turned off,
i
L1
continues to run through the freewheeling diode
D
1
, as shown in
Fig. 2
(b). The process is not be terminated until
S
1
is turned on again.
3) Mode 3 and Mode 4:
Conversely, when
R1
is smaller than
R2
,
S
2
is turned on and the negative current
iL2
increases linearly. At this time, the N-cell leg starts to transfer the redundant power to
R1
through
L
2
, as shown in
Fig. 2
(c).
Fig. 2
(d) shows that
iL2
continues to run through the freewheeling diode
D
1
when
S
2
is turned off.
III. THE NOVEL BURST-MODE CONTROL SCHEME FOR A BIDIRECTIONAL DUAL BUCK-BOOST VOLTAGE BALANCER
Burst mode control has been widely used in PWM converters to achieve lower standby losses
[25]
,
[26]
. It is an operation mode using the cycle-skipping technique to reduce the switching loss in a switching regulator and to increase the operating efficiency at low power levels. During a burst cycle, each burst of switching can be started at the lowest output voltage value (which occurs just at the start of a burst) and stopped at the maximum voltage value (which occurs at the end of a burst), and this process is repeated. This operation mode can result in high efficiency at low power levels, because the MOSFETs converters can operate at a designed power level close to the optimum efficiency point during a switching period.
Based on the idea of burst mode, a novel adaptive burst mode control scheme is proposed for the bidirectional dual buck-boost voltage balancer in low-voltage bipolar-type dc microgrids.
Fig. 7
shows a simplified system control block diagram of this scheme. In the proposed adaptive burst mode control, there are three basic operation modes: P-cell mode (PCM), natural-balance-mode (NBM), and N-cell mode (NCM). The basic operational waveforms are shown in
Fig. 8
.
Simplified control block diagram of burst mode control based on the bidirectional dual buck-boost voltage balancer.
The basic operational waveforms of three operation modes in the bidirectional dual buck-boost voltage balancer.
- D. Three Operation Modes of the Proposed Burst Mode Control
1) P-cell mode (PCM):
When
R1
is bigger than
R2
,
Vdc1
increases and
Vdc2
decreases while
Vdc
is kept constant at the same time. After
Vdc2
touches the voltage lower limit
Vlower
, the P-cell leg switch
S
1
works under the current mode control with the preset
iL-ref
. Then,
Vdc2
begins to increase to the allowed voltage lower limit
V
lower-allowed
during a burst-mode switching period, in which the voltage difference should satisfy the condition of
Vupper-allowed
-
V
lower-allowed
˂
Vdc1
-
Vdc2
˂
Vupper
-
Vlower
. After that,
S
1
does not work until
V
dc2
reaches
Vlower
again. Operating in the P-cell mode, the positive inductor current
iL
transfers the redundant power from the upside to the downside, as shown in
Fig. 8
(a).
2) Natural-balance mode (NBM):
As shown in
Fig. 8
(b), when
Vdc1
and
Vdc2
are naturally maintained between the allowed voltage lower limit
Vlower-allowed
and upper limit
Vupper-allowed
without control, the voltage balancer does not work and
iL
is zero at this time.
3) N-cell mode (NCM):
When
R1
is smaller than
R2
,
Vdc1
decreases and
Vdc2
increases while
Vdc
is kept constant at the same time. After
Vdc2
touches the voltage upper limit
Vupper
, the N-cell leg switch
S2
works under the current mode control with the preset
iL-ref
. Then,
Vdc2
begins to decrease to the allowed voltage upper limit
Vupper-allowed
during a burst mode switching period, in which the voltage difference should satisfy the condition of
Vupper-allowed
-
Vlower-allowed
˂
Vdc2
-
Vdc1
˂
Vupper
-
Vlower
After that,
S2
does not work until
Vdc2
reaches
Vupper
again. Operating in the N-cell mode, the negative
iL
transfers redundant power from the downside to the upside as shown in
Fig. 8
(c).
Because
Vdc1
and
Vdc2
should not higher than
Vupper
or less than
Vlower
, the switches (
S
1
,
S
2
) will work only when the dc voltage values (
Vdc1
,
Vdc2
) do not meet predetermined values. Then, a positive or negative intermittent
iL
will exist to transfer the corresponding power between the two poles making the voltages balanced. Thus, the switching loss of the balancer will be effectively reduced and its efficiency will be improved. In addition, the switches of the P-cell leg and N-cell leg are controlled separately. This can avoid the power switches shoot-through problem in traditional bridge topological structures. In this case, high frequency MOSFETs switches can be used to reduce the system volume.
- E. Realization of the Proposed Burst Mode Control Scheme
The realization of the proposed burst mode control scheme is presented in
Fig. 9
.
Vref
is equal to half of the total dc voltage value
Vdc
. If
R1
is bigger than
R2
,
V
dc1
increases combined with the decrease of
Vdc2
. When
V
dc2
is less than
Vlower
, the following is true
Vref
-
Vdc2
>
Vref
-
Vlower
and
Vref
-
Vdc2
>
Vref
-
V
lower-allowed
. At this time, the outputs of the two comparators in the P-cell mode are 1 and 0, respectively, and the outputs of the flip-flop and the OR gate are 1. The PWM current control regulates
iL
tracking the reference current
iL-ref
, with the outputs of the comparator and the OR gate sent to the AND gate together. When the output of the AND gate connected with the comparator is 1, a trigger signal will be sent to switch
S
1
which will be turned on with a positive
iL
. Operating in the P-cell mode, the P-cell leg will transfer redundant power from the upside to the downside, and then
V
dc2
will increase. When
Vdc2
goes up to the value of
V
lower-allowed
, there will be
Vref
-
Vdc2
<
Vref
-
Vlower
and
Vref
-
Vdc2
˂
Vref
-
Vlower-allowed
. At this time, the outputs of the two comparators are 0 and 1, respectively. The output of the flip-flop is zero and the trigger signal of
S
1
disappears. Then,
S
1
is turned off and the voltage balancer stops working. As the operating procedures of
S
2
are the same as those of
S
1
, the analysis process of
S
2
is not given out.
Realization of the proposed burst mode control scheme.
- F. Main Current Relationships of the Bidirectional Dual Buck-Boost Voltage Balancer
If
R1
is bigger than
R2
,
Vdc1
goes up and
Vdc2
decreases at the same time. Since
Vdc
is kept constant through regulation by the bidirectional rectifier, the ripple voltage Δ
Vdc1
of
Vdc1
is also equal to the negative ripple voltage -Δ
Vdc2
of
Vdc2
.
If the two capacitors,
Cu
and
Cd
, are equal,
iCu
=
iCd
.
Since
iL
=
iCd
+
i
R
2
-
iCu
-
i
R
1
, the following can be obtained:
If (
iL
+
Vdc1
/
R
1
) ×
R
2
>
Vref
is satisfied, either the voltage balancer will work normally to balance
Vdc1
and
Vdc2
, or the balancer will fail to work properly to balance
Vdc1
and
Vdc2
. On the premise of the balancer working normally, the balancer does not work all the time if (
iL
+
Vupper-allowed
/
R
1
) ×
R
2
>
Vlower-allowed
is satisfied, and an intermittent inductor current
iL
will exist. However, the balancer will always at work with a sustained
iL
if (
iL
+
Vupper-allowed
/
R
1
) ×
R
2
=
Vlower-allowed
is satisfied. When
R
1
is infinity in extreme cases,
R
2
should not be less than
Vref
/
iL-ref
, or the balancer will not work.
IV. THE AVERAGE SMALL-SIGNAL MODEL FOR THE BIDIRECTIONAL DUAL BUCK-BOOST VOLTAGE BALANCER
In order to select the control system parameters, an average small-signal model of the voltage balancer under CCM is derived. The duty cycles of
S
1
and
S
2
are defined as
, respectively, where
D
1
,
D
2
,
are the stable duty ratios and the perturbations of
d
1
and
d
2
. Moreover, the voltage
vdc2
and the inductance current
iL1
are defined as
are the stable voltage values, the current values and the perturbations of
vdc2
and
iL1
.
From
Fig. 6
, it is possible to obtain (5) and (6) when the P-cell bridge leg operates under CCM.
(1)
S
1
turning on
(2)
S
1
turning off
According to the methods of building the average model, it can be derived from (5) and (6):
Thus, the transfer function of the inductance current
iL1
versus the duty cycle
d
1
is represented by:
From
Fig. 8
, (9) and (10) can be obtained when the N-cell bridge leg operates under CCM.
(1)
S
2
turning on
(2)
S
2
turning off
According to the methods of building the average model, (9) and (10) are rewritten by:
Thus, the transfer function of the inductance current
iL2
versus the duty cycle
d
2
is represented by:
Comparing (8) with (12), the open-loop transfer functions of the P-cell and N-cell bridge legs are the same. Using the following equation
G
2
(
s
) =
G
1
(
s
)/[1 +
G
1
(
s
)], the closed-loop transfer functions
G2
(
s
) can also be achieved. The control system diagram of the voltage balancer can be illustrated by
Fig. 10
.
Control system based on the current mode control.
V. SIMULATION RESULTS FOR THE BIDIRECTIONAL DUAL BUCK-BOOST VOLTAGE BALANCER
To validate the aforementioned analysis, computer simulations of the output voltages and inductance currents are carried out in PISM software. The total power of the voltage balancer is 10kW and the switching frequency is 30 kHz. The other main simulation parameters are listed as follows:
Vdc
= 400V,
Vref
= 200V,
L
1
=
L
2
= 0.2mH,
iL-ref
= 50A,
Cu
=
Cd
= 10mF,
Vupper
= 202.2V,
Vlower
= 197.8V,
Vupper-allowed
= 201.8V, and
V
lower-allowed
= 198.2V.
Rdc1
and
Rdc2
will be given according to the simulation requirements in the following.
- G. Analysis of the Control System Parameters
The PI parameters of the control system in
Fig. 10
are
Kp
= 3.7 and
Ki
= 0.001. With the above simulation parameters, a Bode diagram of the control system is shown in
Fig.1 1
, where
G
1
and
G
2
represent the open-loop and closed-loop transfer functions, respectively. When the unbalanced loads are
R
1
= 5Ω and
R
2
= 50MΩ, that is to say,
R
2
is infinite relative to
R
1
, the open-loop transfer function
G
1
(
s
) and the closed-loop transfer function
G
2
(
s
) are described in (13) and (14), respectively. In this case, a Bode diagram of the control system is shown in
Fig. 11
(a). When the unbalanced loads are
R
1
= 500Ω and
R
2
= 50MΩ, the open-loop transfer function
G
1
(
s
) and the closed-loop transfer function
G
2
(
s
) are described in (15) and (16), respectively. In this case, a Bode diagram of the control system is shown in
Fig. 11
(b). By analyzing the amplitude-frequency characteristic and phase-frequency response curves in the Bode diagram, where G
m
= inf and P
m
= inf indicate that the gain margin and phase margin are infinite, it can be seen that the given control system is stable.
Bode diagram of the open-loop and closed-loop system transfer function: (a) R1 = 5Ω, R2 = 50MΩ; (b) R1 = 500Ω, R2 = 50MΩ.
- H. Simulation Results
The simulation waveforms of the output voltages (
Vdc1
,
Vdc2
) and inductor current
i
L
are given in
Fig. 12
. As in the above analysis, the simulations are carried out in three different operation modes.
Simulation results of the voltage and current relationships: (a) P-cell mode; (b) Natural-balance mode; (c) N-cell mode.
P-cell mode: When
R1
is bigger than
R
2
(
R1
= 50MΩ,
R2
= 5Ω),
Vdc1
will be higher than
Vdc2
. The P-cell leg switch
S
1
works under the current control mode with a preset
iL-ref
of 50A and it generates an intermittent positive current
iL
to transfer the redundant power from the upside to the downside. With a decrease of
Vdc1
and an increase of
Vdc2
, both
Vdc1
and
Vdc2
come back to allowable values during a burst mode switching period. Then, the voltage balancer stops working and the inductor current
iL
disappears. Waveforms of the voltages and inductor current are shown in
Fig. 12
(a). To get a clear view of the voltages and current,
Fig. 12
(a) is partially enlarged, as shown in
Fig. 13
.
Detailed simulation results of the voltage and current relationships in P-cell mode.
Natural-balance mode: When
R
1
is equal to
R2
(
R1
=
R2
= 5Ω),
Vdc1
and
Vdc2
automatically tend to become balanced without control, and ultimately they are kept equal as in
Fig. 12
(b). Because
Vdc1
and
Vdc2
naturally keep between
Vlower-allowed
and
Vupper-allowed
, the balancer does not work and the inductor current maintains a constant of zero in this case.
N-cell mode: When
R1
is smaller than
R2
(
R1
= 5Ω,
R2
= 50MΩ),
Vdc1
is lower than
Vdc2
. Thus, the curve of
Vdc1
has a downward trend when comparing with
Fig. 12
(a) and
Fig. 12
(b). Similarly, the N-cell leg switch
S
2
works under the current control mode with a preset
iL-ref
of 50A and it generates a negative intermittent current
iL
to transfer redundant power from the downside to the upside. With an increase of
Vdc1
and a decrease of
Vdc2
, both
Vdc1
and
Vdc2
come back to allowable values, and the voltage balancer stops working and the inductor current disappears. The waveforms of the voltages and current are shown in
Fig. 12
(c).
VI. EXPERIMENTAL RESULTS
To demonstrate the viability of the proposed voltage balancer and the novel burst-mode control scheme, a 5-kW experiment system, shown in
Fig. 14
, was designed and tested. The whole system includes a 400V ac input, voltage balancer, dual-outputs full bridge inverter and loads which can be divided into dc loads and ac loads. Additionally, the ac loads include an ac resistive load and a half-bridge-rectifier ac load (such as a residential heater) which will lead to an unbalance between
Vdc1
and
Vdc2
. Thus, the experiment consists of two parts: the first part is a dc load test which is emulated by two pure resistors; and the second part is an ac load test including the balanced resistive load and unbalanced load of the half-bridge resistive heater. The simulation parameters are listed as follows:
Cu
=
Cd
= 10mF,
L
1
=
L
2
= 0.2mH,
C1
=
C2
= 40uF,
Rac1
=
Rac2
= 25Ω, and
iL-ref
= 30A. A directly coupled inductor is used in the voltage balancer to reduce its volume and weight, and
Ld1
=
Ld2
= 50uH,
Lcom
= 150uH. The resistance of the half-bridge-rectifier load is 11Ω.
Rdc1
and
Rdc2
will be given according to the experimental requirements in the following.
The experiment system structure.
- I. Experimental Results Analysis of the dc Load
The first experiment is conducted with unbalanced dc loads so that
Rdc1
= ∞ and
Rdc2
= 9Ω, 18Ω. The steady-state experimental waveforms of the inductor current
iL
and load current
idc2
, which is the current through
Rdc2
, are shown in
Fig. 15
. As shown in
Fig. 15
, the switch duty cycle is reduced with the increase of
Rdc2
, and the duration of
iL
becomes shorter. Even in this extreme condition, the novel burst-mode control scheme and voltage balancer work well to provide an appropriate voltage for
Rdc2
.
The experimental waveforms of the inductor current and load current. (a) Rdc1 = ∞, Rdc2 = 9Ω; (b) Rdc1 = ∞, Rdc2 = 18Ω.
- J. Experimental Results Analysis of the ac Load
The second experiment is conducted with unbalanced ac loads which are simulated by a half-bridge-rectifier load and a resistive load. For security reasons, a small
Vdc
is applied to observe the system performance when the voltage balancer is first disconnected.
Fig. 16
shows the experimental waveforms of the ac voltage
vout2
and the half-bridge-rectifier load current
iout1
. It can be seen that the half-bridge-rectifier load leads to a serious asymmetric output ac voltage
vout2
without the balancer.
The experimental waveforms without the voltage balancer when connected to unbalanced ac load.
Fig. 17
shows the steady-state output ac voltages (
vout1
,
vout2
), and the half-bridge heater current
iout1
when the voltage balancer is connected. It can be seen that the dual-output voltages have almost the same RMS values,
vout1
= 118.90V and
vout2
= 117.52V, though the current of the half-bridge heater is obviously unsymmetrical.
The experimental waveforms of the voltage and current with the voltage balancer when connected the unbalanced ac load.
Fig. 18
and
19
show the experimental transition waveforms of the dual-output ac voltages, and the load currents between the balanced and unbalanced loads. No impact voltages or currents appear in the system with a smooth transition, and the output voltages are balanced and almost the same before and after the loads change.
The experimental transition waveforms of the ac voltage and current from balanced load to unbalanced load.
The experimental transition waveforms of the ac voltage and current from unbalanced load to balanced load.
Fig. 20
and
21
show the experimental waveforms of the dual-outputs ac voltages (
vout1
,
vout2
), the inductor current
iL
and the half-bridge heater current
iout1
. The inductor current is zero when the ac loads are balanced. However, it becomes an intermittent negative current to balance the two voltages when the ac loads are unbalanced. Similarly, there are no impact voltages or currents in the system, and the output voltages are kept balanced before and after the loads change with a smooth transition.
The experimental waveforms of voltage and current with the voltage balancer from balanced load to unbalanced load.
The experimental waveforms with voltage balancer from unbalanced load to balanced load.
According to the above experimental results, the output ac voltages (
vout1
,
vout2
) have almost the same values with the control of the voltage balancer, whether balanced loads or unbalanced loads are connected. Thus, the bidirectional dual buck-boost voltage balancer with the burst-mode control scheme is shown to be correct.
VII. CONCLUSION
In this paper, a bidirectional dual buck-boost voltage balancer and a burst-mode control scheme are proposed for low-voltage bipolar-type DC microgrids. The structure of the voltage balancer will enhance the system reliability thanks to the fact that it does not have any shoot-through problems. Under the proposed novel burst-mode control scheme, the balancer works and generates an intermittent inductor current with lower power losses to balance the two output DC voltages when the two voltages do not satisfy predetermined values. At last, simulation and experimental results have verified that the bidirectional dual buck-boost voltage balancer based on the burst-mode control scheme has a good ability to balance the output voltages with balanced or unbalanced DC/AC loads. Moreover, the system has a smooth transition with no impact voltages or currents when the loads change.
BIO
Chuang Liu received his M.S. degree in Electrical Engineering from Northeast Dianli University, Jilin, China, in 2009, and his Ph.D. degree from the Harbin Institute of Technology, Harbin, China, in 2013. From 2010 to 2012, he was with the Future Energy Electronics Center (FEEC), Virginia Tech, Blacksburg, VA, USA, as a Visiting PhD Student, supported by the Chinese Scholarship Council. Since 2013, he has been an Associate Professor in the School of Electrical Engineering of Northeast Dianli University, Jilin, China. His current research interests include intelligent universal transformers (IUT) for renewable energy systems, bus power flow controllers (BPFC) for hybrid AC/DC distribution, PHEV/PEV smart parking lot/building charging systems, battery energy storage systems and wireless power transfer.
Dawei Zhu received his B.S. degree from Northeast Dianli University, Jilin, China, in 2013, where he is presently working towards his M.S. degree in the Department of Electrical Engineering. His current research interests include distributed generation integration and smart power grids.
Jia Zhang received her B.S. and M.S. degrees, from Northeast Dianli University, Jilin, China, in 2012 and 2015, respectively. She is presently working for the State Grid, Jilin Electric Power Training Center, Jilin, China. Her current research interests include smart power grids and power electronics.
Haiyang Liu received his B.S. degree from the Huazhong University of Science and Technology, Wuhan, China, in 2012. He is presently working towards his M.S. degree in the Department of Electrical Engineering, Northeast Dianli University, Jilin, China. His current research interests include intelligent universal transformers (IUT) for renewable energy systems.
Guowei Cai received his B.S. and M.S. degrees from Northeast Dianli University, Jilin, China, in 1990 and 1993, respectively, and his Ph.D. degree from the Harbin Institute of Technology, Harbin, China, in 1999. Since 2004, he has been a Professor in the School of Electrical Engineering of Northeast Dianli University. His current research interests include power system transient stability analysis and electrical power markets.
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