In order to suppress the low frequency oscillation of the neutralpoint voltage for threelevel inverters, this paper proposes a new discontinuous pulse width modulation (DPWM) control method. The conventional sinusoidal pulse width modulation (SPWM) control has no effect on balancing the neutralpoint voltage. Based on the basic control principle of DPWM, the relationship between the reference space voltage vector and the neutralpoint current is analyzed. The proposed method suppresses the low frequency oscillation of the neutralpoint voltage by keeping the switches of a certain phase no switching in one carrier cycle. So the operating time of the positive and negative small vectors is equal. Comparing with the conventional SPWM control method, the proposed DPWM control method suppresses the low frequency oscillation of the neutralpoint voltage, decreases the output waveform harmonics, and increases both the output waveform quality and the system efficiency. An experiment has been realized by a neutralpoint clamped (NPC) threelevel inverter prototype based on STM32F407CPLD. The experimental results verify the correctness of the theoretical analysis and the effectiveness of the proposed DPWM method.
I. INTRODUCTION
The conventional control method for twolevel inverters is very simple and easily implemented. However, there are some drawbacks, such as high total harmonic distortion (THD) of the output waveforms, high voltage stress of the switching devices, low system efficiency and so on
[1]

[3]
. This is especially true in middle and high voltage, or high power conversions. Akira Nabae proposed a new neutralpoint clamped (NPC) PWM inverter in 1980, which is the basic threelevel inverter
[1]
. Comparing with the conventional twolevel inverter, the threelevel inverter has many advantages, such as low voltage stress on switching devices, high equivalent switching frequency, reduced output harmonics, etc.
[4]

[6]
. Therefore, it is widely used in middle and high voltage, or high power applications
[1]
,
[4]
.
In order to generate phase voltage with threelevels and line voltage with fivelevels, the NPC threelevel inverter circuit needs two DC bus capacitors connected in series between the positive and negative poles of the DC bus. Ideally, the voltage on each capacitor is half the DC bus voltage. However, due to capacitance errors of the capacitors, different parameters of the switching devices, unbalanced threephase operation, and other factors
[12]
, a DC bus neutralpoint voltage unbalancing problem appears, which influences the output waveforms quality
[2]
,
[6]
. In addition, this problem makes the output waveforms containing a lot of low frequency harmonics. When the neutralpoint voltage unbalancing problem becomes serious, it damages the switching devices and affects the system operation
[6]
. To solve this problem, many methods have been proposed
[2]

[13]
.
The neutralpoint voltage unbalancing problem contains two parts: the dc deviation and the low frequency oscillation of the neutralpoint voltage. The dc deviation of the neutralpoint voltage can be controlled by many solutions proposed in the literature. For example, zerosequence voltage injection methods have been proposed in
[2]
,
[7]
, Ref.
[3]
,
[5]
propose improved space vector modulation (SVM) methods to reduce the neutralpoint voltage unbalancing. In addition, they correctly select other vectors, which do not impact on the neutralpoint voltage, to replace the small vectors.
The low frequency oscillation of the neutralpoint voltage can lead to a lot of low frequency harmonics in the output waveforms, and the voltage stress of the switches is increased
[4]
,
[10]

[11]
. When the dc deviation of the neutralpoint voltage appears, the low frequency oscillation problem can also exacerbate the neutralpoint voltage unbalancing, especially in middle or high power applications. However, the lowfrequency oscillation problem of the neutralpoint voltage is commonly ignored.
Ref.
[9]
,
[11]
analyze the low frequency oscillation of the neutralpoint voltage. However, a solution for this problem is not presented. In
[10]
, a new modulation strategy using small vectors to compensate for the effects of all of the vectors in each carrier cycle is proposed to reduce the neutralpoint voltage ripple. Ref.
[4]
proposes a double modulation waves strategy based on SPWM to enable the average neutralpoint current to be zero. So the low frequency oscillation of the neutralpoint voltage is eliminated. However, it has a much higher switching frequency when compared with the conventional SPWM control method.
Based on the basic principle of discontinuous pulse width modulation (DPWM), this paper proposes a new DPWM control method to suppress the low frequency oscillation of the neutralpoint voltage. By distinguishing the odd and even carrier cycles, and the prior and latter half carrier cycles, the proposed method controls the switches of a certain phase so that there is no switching in each carrier cycle. In addition, in each carrier cycle, the operating time of the positive and negative small vectors in pairs is equal. Therefore, the average value of the neutralpoint current is zero in a carrier cycle, and a neuralpoint voltage without low frequency oscillation can be achieved. When compared with the conventional SPWM control, without adding complex hardware circuits or increasing the switching frequency, the new DPWM control method proposed in this paper can suppress the low frequency oscillation of the neutralpoint voltage effectively under different load conditions. This decreases the output waveforms harmonics and significantly increases the system efficiency. The proposed DPWM control method is easy to achieve with digital implementation. Experiments have been realized by a NPC threelevel inverter prototype based on STM32F407CPLD, and the experimental results verify the feasibility and effectiveness of the proposed method.
II. THE BASIC PRINCIPLE OF DPWM CONTROL
Fig. 1
shows the main circuit topology of a NPC threelevel inverter. The nodal point connected to the DC bus capacitors C
_{1}
and C
_{2}
is neutralpoint O for the NPC threelevel inverter.
Main circuit of NPC threelevel inverter.
Take phase a as an example, its output leg consists of four switches (S
_{a1}
, S
_{a2}
, S
_{a3}
, S
_{a4}
), four antiparallel freewheeling diodes (D
_{a1}
, D
_{a2}
, D
_{a3}
, D
_{a4}
), and two clamping diodes (D
_{1}
, D
_{2}
).
“P”, “0”, and “N” represent three working states corresponding to the three output levels of the NPC threelevel inverter. The neutralpoint “O” is defined as the reference point, and the corresponding output levels and switching states are shown in
Table I
. Where S
_{xn}
(x=a, b, c, and n=1, 2, 3, 4) represents the four switches of each phase leg for the NPC threelevel inverter in
Fig. 1
.
V
_{dc}
is the input DC bus voltage. “√” and “×” represents the switching on and switching off states, respectively.
OUTPUT LEVEL OF THREE LEGS AND SWITCHING STATES
OUTPUT LEVEL OF THREE LEGS AND SWITCHING STATES
The DPWM control method can keep switches no switching at specific areas in a line cycle, and its most significant advantage is reducing switching losses. Thus, the DPWM control method can improve the conversion efficiency of the inverter.
Three conventional control methods based on DPWM are the 120°DPWM, 60°DPWM, and 30°DPWM
[14]
[15]
. The 60°DPWM control method is shown in
Fig. 2
, where
v
_{a}
,
v
_{b}
,
v
_{c}
represents the threephase modulation waves for a NPC threelevel inverter with the conventional SPWM control. It can be seen that the line cycle has been divided into six equal regions.
The operating principle of 60°DPWM.
The regions are defined as follows:
I(0–
π
/3), II(
π
/3–2
π
/3), III(2
π
/3–
π
), IV(
π
–4
π
/3), V(4
π
/3–5
π
/3), and VI(5
π
/3–2
π
).
In each region, the switches of one certain phase keep no switching. So the corresponding output level is in the “P” or “N” state, the details are as follows:
(1) In regions I(0–
π
/3), III(2
π
/3–
π
), and V(4
π
/3–5
π
/3), for the phase modulation wave with the lowest voltage value, the corresponding switches S
_{x3}
, S
_{x4}
of this phase are kept in the onstate, and the switches S
_{x1}
, S
_{x2}
of this phase are kept in the offstate. Therefore, the output phase leg is in the “N” state,
(2) In regions II(
π
/3–2
π
/3), IV(
π
–4
π
/3), and VI(5
π
/3–2
π
), for the phase modulation wave with the highest voltage value, the corresponding switches S
_{x1}
, S
_{x2}
of this phase are kept in the onstate, and the switches S
_{x3}
, S
_{x4}
of this phase are kept in the offstate. Therefore, the output phase leg is in the “P” state.
When compared with the conventional SPWM control method, the 60°DPWM control method reduces the equivalent switching frequency by about 33% under resistive load conditions. As a result, it can reduce the switching losses and improve the conversion efficiency of the inverter. However, reducing the equivalent switching frequency causes some problems, which cannot be ignored, such as increasing the output harmonics and decreasing the quality of the output waveforms.
The three conventional DPWM control methods reduce the switching losses by controlling the switches no switching in certain regions
[15]
. However, they are commonly ineffective for the neutralpoint voltage unbalancing control, especially for the lowfrequency oscillation problem.
III. THE INFLUENCE OF THE REFERENCE SPACE VOLTAGE VECTOR ON THE NEUTRALPOINT CURRENT
As shown in
Table I
, each phase of a NPC threelevel inverter has three working states (P, 0, N). Therefore, the NPC threelevel inverter has a total of 27(3
^{3}
) kinds of working states. Each working state corresponds to one reference space voltage vector. Thus, there are 27 reference space voltage vectors including 6 big vectors, 6 medium vectors, 12 small vectors, and 3 zero vectors.
When the zero vectors operate, the neutralpoint current is zero. As a result, the zero vector has no effect on the neutralpoint current. When the big, medium and small vectors operate, the flowing direction of the neutralpoint current can be obtained.
The impact on the neutralpoint voltage of the load currents is shown in
Fig. 3
when the big vector [PPN], medium vector [P0N], positive small vector [PP0], and negative small vector [00N] operates, respectively. Where
i
_{a}
,
i
_{b}
,
i
_{c}
represents the threephase load currents,
v
_{o}
represents the neutralpoint voltage, and
i
_{o}
represents the neutralpoint current.
The impact on the neutralpoint voltage of load currents.
Suppose the threephase loads are symmetrical, as shown in
Fig. 3
(a). When the big vector [PPN] operates, the threephase loads are not connected with the neutralpoint O. Thus,
i
_{o}
is zero in this state, and the load currents have no effect on the neutralpoint current. From
Fig. 3
(b), it can be seen that the flowing direction of
i
_{b}
cannot be determined when the medium vector [PON] operates. It can also be seen that the flowing direction of
i
_{o}
is uncertain. Therefore, its influence on the neutralpoint voltage cannot be determined. From
Fig. 3
(c), it can be seen that when the positive small vector [PP0] operates,
i
_{o}
is equal to
i
_{c}
, and
i
_{o}
flows into the neutralpoint O. As a result,
v
_{o}
increases. When the negative small vectors operates in
Fig. 3
(d), it can be seen that
i
_{o}
flows out of the neutralpoint O. Therefore,
v
_{o}
decreases.
Comparing
Fig. 3
(c) with
Fig. 3
(d), it can be seen that when the positive small vector [PP0] and the negative small vector [00N] operates respectively, the flowing directions of
i
_{o}
are opposite. As a result, their impact on
v
_{o}
is opposite. In addition, the neutralpoint voltage unbalancing problem can be solved by properly selecting the operating time of the positive and negative small vectors.
IV. METHODS FOR SUPPRESSING THE LOW FREQUENCY OSCILLATION OF THE NEUTRALPOINT VOLTAGE
 A. Comparing the Conventional SPWM with the Proposed DPWM
The corresponding relationship between the threephase modulation waves and the space vector distribution is shown in
Fig. 4
. When the modulation ratio is low, suppose that the threephase modulation waves are in region I in
Fig. 4
(a). Thus, the reference voltage vector
V
_{ref}
falls in the small triangle area 1 of sector I as shown in
Fig. 4
(b).
The relationship between the space vector and the threephase modulation waves distribution.
Taking area 1 of sector I as an example, suppose the amplitude and period of the carrier wave are normalized using the conventional SPWM and the proposed DPWM controls. A detailed analysis is shown in
Fig.5
, which concerns the operating of the space vectors, and the corresponding neutralpoint current.
Space vector and neutralpoint current.
From
Fig. 5
, it can be seen that the reference voltage vector is composed of three voltage vectors: V
_{1}
[P00, 0NN], V
_{2}
[PP0, 00N], and V
_{3}
[000]. The vectors [P00] and [0NN] are a pair of positive and negative small vectors, so are the vectors [PP0] and [00N].
When using the conventional SPWM control method, as shown in
Fig. 5
(a), in a carrier cycle, the three voltage vectors above meet:
Where
d
_{s1}
^{+}
,
d
_{s1}
^{}
,
d
_{s2}
^{}
,
d
_{s3}
is the operating time of vectors [P00], [0NN], [00N], and [000], respectively.
The modulation process of the proposed DPWM control method is shown in
Fig. 5
(b). Define the prior carrier cycle as an odd carrier cycle, and the next adjacent carrier cycle becomes an even carrier cycle. The details of the proposed DPWM control method are as follows:
(1) In the odd carrier cycle, the carrier cycle is divided into two equal parts: the prior and the latter half cycle. In the prior half cycle, the threephase modulation waves
v_{a}
,
v_{b}
,
v_{c}
are all superimposed by an offset value
V
_{offset}
, where
V
_{offset}
= 
V
_{max}
, (
V
_{max}
> 0), and
V
_{max}
=max{
v
_{a}
,
v
_{b}
,
v
_{c}
}. As a result,
v
_{a}
’=
v
_{a}
+
V
_{offset}
,
v
_{b}
’=
v
_{v}
+
V
_{offset}
, and
v
_{c}
’=
v
_{c}
+
V
_{offset}
, where
v
_{a}
’,
v
_{b}
’,
v
_{c}
’ represent the modulation waves with the proposed DPWM control. For the phase with the maximum instantaneous output voltage, its output leg voltage is clamped at the “0” level. In the latter half cycle,
v
_{a}
,
v
_{b}
,
v
_{c}
are all superimposed by an offset value
V
_{offset}
, where
V
_{offset}
= 
V
_{min}
, (
V
_{min}
< 0), and
V
_{min}
=min{
v
_{a}
,
v
_{b}
,
v
_{c}
}. Thus, for the phase with the minimum instantaneous output voltage, its output leg voltage is clamped at “0” level.
(2) In the even carrier cycle, the carrier cycle is also divided into two equal parts: the prior and the latter half cycle. In the prior half cycle,
v
_{a}
,
v
_{b}
,
v
_{c}
are all superimposed by an offset value
V
_{offset}
, where
V
_{offset}
= 
V
_{min}
. Therefore, for the phase with the minimum instantaneous output voltage, its output leg voltage is clamped at the “0” level. In the latter half cycle,
v
_{a}
,
v
_{b}
,
v
_{c}
are all superimposed by an offset value
V
_{offset}
, where
V
_{offset}
= 
V
_{max}
. Thus, for the phase with the maximum instantaneous output voltage, its output leg voltage is clamped at the “0” level.
Where
v
_{a}
,
v
_{b}
,
v
_{c}
represent the modulation waves with the conventional SPWM control, and
v
_{a}
’,
v
_{b}
’,
v
_{c}
’ represent the modulation waves with the proposed DPWM control. In addition,
d
_{s1}
^{+}
,
d
_{s1}
^{}
,
d
_{s2}
^{}
,
d
_{s3}
is the operating time of vectors [P00], [0NN], [00N], [000], respectively, when using the conventional SPWM control.
From
Fig. 5
(a) and
5
(b), the operating time of the positive and negative small vectors in the proposed DPWM and conventional SPWM control methods can be seen clearly. A performance comparison of the two methods is shown in
Table II
.
PERFORMANCE COMPARISON BETWEEN THE PROPOSED DPWM AND THE SPWM METHOD
PERFORMANCE COMPARISON BETWEEN THE PROPOSED DPWM AND THE SPWM METHOD
From
Table II
, it can be seen that when using the conventional SPWM control method, the operating time of the vectors [PP0] and [00N] is 0 and
d
_{s2}
^{}
, respectively, and that the operating time of vectors [P00] and [0NN] is
d
_{s1}
^{+}
and
d
_{s1}
^{}
respectively. The operating time of the positive and negative small vectors in pairs is not equal in a carrier cycle, and the neutralpoint voltage unbalancing problem exists. When using the proposed DPWM control method proposed in this paper, it can be seen that the operating time of the vectors [PP0] and [00N] are both
d
_{s2}
^{}
/2, and that the operating time of the vectors [P00] and [0NN] are both (
d
_{s1}
^{+}
+
d
_{s1}
^{}
)/2. Therefore, the operating time of the positive small vectors is equal to that of the negative small vectors in a carrier cycle.
According to the analysis above, the proposed DPWM control method distinguishes the odd and even carrier cycles. In addition, one carrier cycle is divided into two parts, which are controlled respectively. The operating time of the positive (or negative) small vector in the prior half cycle is equal to that of the negative (or positive) small vector in the latter half cycle. The average value of the neutralpoint current is zero in a carrier cycle, and the neuralpoint voltage balance without a low frequency oscillation can be achieved.
 B. Suppressing the Low Frequency Oscillation of the NeutralPoint Voltage
As shown in
Fig. 1
, when the neutralpoint voltage is balancing, the voltages of C
_{1}
and C
_{2}
are both half the DC bus voltage. Under this condition, the neutralpoint O is defined as the reference zero potential.
ΔV
_{NP}
is the voltage variation of the neutralpoint O, which is relative to the reference zero potential, which is simply the neutralpoint voltage variation. Thererore, the neutralpoint voltage variation
ΔV
_{NP}
can be expressed as:
Where
v
_{c1}
and
v
_{c2}
represent the voltage of the capacitors C
_{1}
and C
_{2}
,
C
is the capacitance of C
_{1}
and C
_{2}
, and
i
_{1}
and
i
_{2}
represents the currents flowing through C
_{1}
and C
_{2}
, respectively.
As a result, when the neutralpoint voltage is balancing,
ΔV
_{NP}
is zero. Conversely, the voltages of C
_{1}
and C
_{2}
are not equal, and
ΔV
_{NP}
cannot be zero.
Suppose that the average value of the neutralpoint current is equal to its instantaneous value in a carrier cycle. Then, the instantaneous value of the neutralpoint current
i
_{o}
(t) can be approximately expressed as:
Where
i
_{o}
is the average value of the neutralpoint current in a carrier cycle.
According to (2) and (3), in a carrier cycle, the relationship between
ΔV
_{NP}
and
i
_{o}
can be derived as:
Where
T
_{s}
is the period of a carrier cycle.
Using the conventional SPWM control, the neutralpoint voltage fluctuates in a low frequency, which is mainly three times the line frequency. This has been analyzed in many literatures
[9]
,
[10]
.
In order to analyze the detailed realization of the proposed DPWM control method in this paper, which can suppress the low frequency oscillation of the neutralpoint voltage, a line cycle is discretized to 400 carrier cycles, and the carrier frequency
f
_{s}
is 20kHZ. Since the proposed DPWM control method distinguishes the odd and even carrier cycles, and the prior and the latter half cycle in one carrier cycle, define half a carrier cycle as a unit, and
k
as an integer variable,
k
=0,1…799, so that the number of units in a line cycle is 800.
In a line cycle, the range is [0, 2
π
], and max(
ωt
) and min(
ωt
) and are defined as maximum and minimum instantaneous value of the threephase sinusoidal waves, which are normalized. The envelop curve can be expressed as:
In order to ensure that the amplitude of the threephase modulation waves with the proposed DPWM control method cannot exceed the amplitude of the triangular carrier wave, the following equation must be satisfied:
Derived from the above equation,
m
is expressed as:
Where
m
is the modulation ratio.
Thus, the proposed DPWM control method is applied to the threelevel inverter at a low modulation ratio. In addition, its reference space voltage vector is only composed of positive small vectors, negative small vectors and the zero vector. Therefore, it is more effective to control the operating time of the positive and negative small vectors to be equal in a carrier cycle to suppress the low frequency oscillation and control the neutralpoint voltage balancing.
When
ωt
is discretized,
ωt_{k}
is used instead of
ωt
. Therefore,
ωt
_{k}
is defined as:
According to
Fig. 5
(b), the threephase duty cycles are:
Supposing that
m
=0.3, the angular frequency
ω
=100
π
, and the load are purely resistive loads (cos(
φ
)=1). Therefore, the threephase ideal duty cycles are shown in
Fig. 6
.
Ideal duty cycles of proposed DPWM control.
The output currents of the NPC threelevel inverter are:
Where
φ
is the load power factor angle, and
I
_{m}
is the amplitude of the threephase output current.
From the analysis in section III, it can be seen that in a carrier cycle, the average value of the neutralpoint current
i
_{o}
can be expressed as:
Where
i
_{a}
(
ωt_{k}
),
i
_{b}
(
ωt_{k}
), and
i
_{c}
(
ωt_{k}
) are the output currents of the NPC threephase inverter, and
d
_{a}
(
ωt_{k}
),
d
_{b}
(
ωt_{k}
), and
d
_{c}
(
ωt_{k}
) are the control duty cycles of the inverter.
Define the variable so that
n
= 0, 1 ... 399, and
n
is an integer, and the number of carrier cycles in a line cycle is 400. Therefore, supposing
k
= 2
n
, from (17), the neutralpoint current of the prior and latter half cycles in a carrier cycle can be derived. Thus, the average value of the neutralpoint current in a carrier cycle is as follows:
Where
i
_{o(2n)}
and
i
_{o(2n+1)}
are expressed as:
By substituting (18) into (4)，the expression of
ΔV
_{NP}
can be obtained as:
To compare with the conventional SPWM control, supposing
m
=0.3,
φ
=0 (under resistive load conditions), and when
I
_{m}
,
C
and
T
_{s}
are normalized, the variation trend of
i
_{o}
and
ΔV
_{NP}
with the conventional SPWM and proposed DPWM control methods are shown in
Fig. 7
.
Curves of i_{o} and ΔV_{NP}.
From
Fig. 7
(a), it can be seen that when using the conventional SPWM control method,
i
_{o}
and
ΔV
_{NP}
both fluctuate at three times the line frequency.
In
Fig. 7
(b),
i
_{o}
and
ΔV
_{NP}
are both zero in any carrier cycle with the proposed DPWM control method.
According to (4), (21) and
m
= 0.3, with the conventional SPWM and proposed DPWM control methods, the surface of
ΔV
_{NP}
as the function of
φ
and
ωt
is plotted as shown in
Fig. 8
. It can be seen that when
φ
varies from –
π
to
π
, or when
ωt
varies from 0 to 2
π
, using the conventional SPWM control method in
Fig. 8
(a),
ΔV
_{NP}
fluctuates, so that the neutralpoint voltage has a low frequency oscillation.
Surface of ΔV_{NP} as the function with φ and ωt.
From
Fig. 8
(b), it can be seen that when using the proposed DPWM control method,
ΔV
_{NP}
is not varied respect to
φ
and
ωt
. It can also be seen that
ΔV
_{NP}
=0 in a line cycle.
From the above comparison, it can be seen that at different load power factor conditions, the proposed DPWM control method achieves the neutralpoint voltage balancing without a low frequency oscillation.
V. EXPERIMENTAL VERIFICATION
In order to verify the validity of the proposed DPWM control method, which suppresses the low frequency oscillation of the neutralpoint voltage, a NPC threelevel inverter prototype has been built and tested in the lab.
The specification of the prototype are as follows:

Input DC bus voltage:Vdc=200V

Input power:Pin=50230W

DC bus capacitors: C1=C2=150uF

Switching frequency:fs=20kHZ

Control processor: STM32F407

Logical drive processing unit: EPM1270T (CPLD)

Power switches module: IGBT FZ06NPA070FP

Output phase filter: L=1.5mH, C=10uF
When
V
_{dc}
=200V, and
P
_{in}
=200W, the experimental waveforms of
ΔV
_{NP}
,
V
_{A}
,
v
_{ao}
, and
i
_{ao}
with the conventional SPWM control and proposed DPWM control methods are shown in
Fig. 9
, where
ΔV
_{NP}
represents the input DC bus neutralpoint voltage variation,
V
_{A}
represents the leg voltage of phase a,
v
_{ao}
represents the output phase voltage of phase a, and
i
_{ao}
represents the output current of phase a.
Experimental waveforms.
From
Fig. 9
, it can be seen that when compared with the conventional SPWM control method under different load power factor conditions, the ripple value of
ΔV
_{NP}
is obviously decreased with the proposed DPWM control method.
Fig. 10

11
show the THD analysis results of
v
_{ao}
and
i
_{ao}
with the conventional SPWM control and the proposed DPWM method in this paper, respectively. Where
u
_{rms}
and
i
_{rms}
represents the RootMeanSquare(RMS) value of the output voltage and current respectively. By using the proposed DPWM method in this paper, the THD value of
i
_{ao}
decreases from 3.20% to 2.26% at cos(
φ
)=1, as shown in
Fig 10
(b) and
Fig 11
(b). At cos(
φ
)=0.866, as shown in
Fig 10
(d) and
Fig 11
(d), the THD value of
i
_{ao}
decreases from 2.89% to 2.41%. In addition, the THD value of
v
_{ao}
is decreased at different load power factor conditions. Therefore, using the proposed DPWM control method in this paper, the output waveforms show obvious advantages in terms of the THD at different load power factor conditions when compared with the conventional SPWM methods.
THD analysis with conventional SPWM control.
THD analysis with proposed DPWM control.
At different resistive load conditions, when the input power varies, the ripple value of
ΔV
_{NP}
, the THD value of the output current and the efficiency curves are shown in
Fig. 12

14
. It can be seen that at various input powers, the proposed DPWM control method proposed in this paper achieves the low frequency oscillation suppression for the neutralpoint voltage. When compared with the conventional SPWM, the quality of the output waveforms and the system efficiency are improved with the proposed DPWM control method.
Measured THD.
Measured neutralpoint voltage ripple.
Measured efficiency.
VI. CONCLUSION
Threelevel inverters have many advantages, such as low voltage stress on the switching devices and low output harmonics. As a result, they are suitable for high voltage, and medium or high power applications. When using the conventional SPWM control method, the DC bus neutralpoint voltage has a low frequency oscillation, the output current contains a lot of harmonics, and the efficiency of the inverter is relatively low, especially when the input voltage or the input power is higher. To solve this problem, a new DPWM control method is proposed in this paper, which suppresses the low frequency oscillation of the neutralpoint voltage, reduces the output current harmonics, improves the quality of the output waveforms, and increases the system efficiency. In order to verify the validity of the proposed DPWM control method, experimental results are obtained based on a NPC threelevel inverter prototype. The experimental results verify the correctness of the theoretical analysis and the effectiveness of the proposed method.
Acknowledgements
This work was supported by Science and Technology Support Program of Jiangsu Province (BE2013125), Innovation Foundation of Science and Technology Department of Jiangsu Province(BY201300401).
BIO
Jianguo Lyu was born in Jiangsu province, China, in 1987. He is presently pursuing his Ph.D. degree in Control Science and Engineering at the Nanjing University of Science and Technology (NUST), Nanjing, China. His current research interests include the modeling and control of power converters, power factor correction converters, renewable energy generation systems and motor driving control.
Wenbin Hu was born in Jiangsu province, China, in 1970. He received his B.S. degree in Electrical Engineering and Automation from the Nanjing University of Aeronautics and Astronautics (NUAA), Nanjing, China, in 1992; his M.S. degree in Control Theory and Control Engineering from the Nanjing University of Science and Technology (NUST), Nanjing, China, in 1999; and his Ph.D. degree in Electrical Engineering from the Nanjing University of Aeronautics and Astronautics, in 2003. In 2004, he joined the Faculty of Electrical Engineering, School of Automation, Nanjing University of Science and Technology. In 2010, he became an Associate Professor at NUST, where he has been engaged in teaching and research in the field of power electronics. His current research interests include power factor correction converters, renewable energy generation systems and electric traction systems for rail vehicles.
Fuyun Wu was born in Jiangsu province, China, in 1988. She received her B.S. and M.S. degrees in Electrical Engineering and Automation from the Nanjing University of Science and Technology (NUST), Nanjing, China, in 2012 and 2015 respectively. In 2015, she joined the College of Electrical and Automatic Engineering, Sanjiang University, Nanjing, China, where she has been engaged in teaching and research in the field of power electronics. Her current research interests include the modeling and control of power converters, and renewable energy generation systems.
Kai Yao was born in Jiangsu province, China, in 1980. He received his B.S. degree in Industrial Automation from Nantong University, Nantong, China, in 2002; his M.S. degree in Mechanical Design and Theory, and his Ph.D. degree in Electrical Engineering from the Nanjing University of Aeronautics and Astronautics (NUAA), Nanjing, China, in 2005 and 2010, respectively. In 2011, he joined the Faculty of Electrical Engineering, School of Automation, Nanjing University of Science and Technology (NJUST), Nanjing, China, where he has been engaged in teaching and research in the field of power electronics. His current research interests include power factor correction converters, renewable energy generation systems and power supplies for LEDs.
Junji Wu was born in Henan Province, China, in 1955. He received his M.S. degree from the Nanjing University of Science and Technology (NUST), Nanjing, China, in 1990. In 1970, he joined in Nanjing University of Science and Technology. He became a professor at NUST, in 2000, where he has been engaged in teaching and research in the field of control science and engineering. His current research interests include the modeling and control of electrical systems, modern data acquisition technology, renewable energy generation systems and electric traction systems for rail vehicles.
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