This paper presents a novel power control strategy for PWM currentsource rectifiers (CSRs) in the stationary frame based on the instantaneous power theory. In the proposed control strategy, a virtual resistance based on the capacitor voltage feedback is used to realize the active damping. In addition, the proportional resonant (PR) controller under the twophase stationary coordinate is designed to track the ac reference current and to avoid the strong coupling brought about by the coordinate transformation. The limitations on improving steadystate performance of the PR controller is investigated and mitigated using a cascaded leadlag compensator. In the zdomain, a straightforward procedure is developed to analyze and design the controlloop with the help of MATLAB/SISO software tools. In addition, robustness against parameter variations is analyzed. Finally, simulation and experimental results verify the proposed control scheme and design method.
I. INTRODUCTION
Although the threephase pulsewidth modulated (PWM) voltagesource rectifier (VSR) is widely used as the main topology for power electronic conversion, the currentsource rectifier (CSR) has the following particular advantages
[1]

[4]
: 1) ability to tolerate phase leg shootthrough; 2) sinusoidal input current and adjustable power factor; 3) direct current control; 4) a wide outputvoltage control range, etc. These features make the CSR an attractive solution in many industrial applications, such as active frontend rectifiers
[5]
; SMES
[6]
; battery chargers for EVs
[7]
; STATCOMs
[8]
, etc. Furthermore, the recent advances in semiconductor devices and magnetic component technology may help to overcome the obvious fundamental disadvantage of conduction losses and dc series inductor losses
[9]
.
Since the topologies of the CSR and VSR are functional duals, it can be expected that the advanced control strategies that have been developed for the VSR, such as direct power control
[10]
, repetitive control
[11]
, synchronous frame with decoupled proportionalintegral (PI) control
[12]
, and slidingmode control
[13]
, can be directly applied to the CSR to achieve a similar performance.
To suppress the pollution of a utility by highfrequency current harmonics, an inductorcapacitor (
LC
) filter is always required at the acside of the CSR. From a control perspective, the VSR is a firstorder system, while the CSR is a secondorder system. Hence, strategies used to set the controller gains for the VSR are not necessarily directly applicable to the CSR. Due to the
LC
filter, the CSR system has an inherent resonance problem, which will introduce transient distortions and steadystate harmonics around the
LC
resonant frequency or even affect the overall system stability
[14]
. A direct method to damp the
LC
resonance is to insert a resistor in series or in parallel with the filter. However, this solution results in additional power dissipation, especially in highpower applications. To overcome this drawback, many kinds of active damping control strategies have been reported in recent years
[15]

[19]
. Therefore, optimizing the gains of a system with this kind of additional feedback path is more complex than the optimization of a simple firstorder VSR closedloop regulator. As a result, it and needs additional investigation.
In recent literatures, several control strategies have been proposed for the threephase CSR. Most of these stratagies use transformations to a rotational coordinate frame and PI controllers. In
[20]
, a feedforward signal compensation method using the
LC
filer model is presented to damp supply current oscillations. Nevertheless, only a dc current controller is used to produce the modulation signal resulting in nonaccurate active and reactive power control. In
[21]
, the authors use capacitorvoltage feedback to mitigate the resonance in the threephase CSR. Meanwhile, the derivative feedback control of the inductor current is adopted to damp the input filter resonance in
[22]
. However, like
[20]
, these control structures are based on dc current control in one stage without inner ac current controllers. In order to maintain controlloop stability, it is beneficial for the controller to have information on as many control variables as possible. In
[23]
, the paper employs cascaded controllers with an outer dc current controller and an inner gridside ac current controller. However, it does do not consider the coupling effect or the mitigation of the input
LC
filter resonance. All of the aforementioned control schemes use synchronous rotating frame PI controllers to obtain a zero steadystate error. Therefore, they are limited by a significant computational burden arising from the need for coordinate transformations and phase detection of the input voltages.
Recently, proportionalresonant (PR) controllers have been shown to be a good choice in current control loops
[24]

[26]
. With this method, the rotational transformation and PLL strategy are both avoided in the twophase stationary frame, and the PR controllers are capable of tracking ac signals with a zero steadystate error. As a result, the control process can be simplified. However, the PR controller is one multiorder system. Thus, it is rather difficult to design the controller parameters and keep the control system stable. In
[19]
, a PR regulator design method that combines the design rules of the technical optimum (TO) and the symmetrical optimum (SO) is proposed. However, this empirical formula design method is more sensitive to variations of the circuit parameters, which affects the system stability and dynamic response.
This paper is structured as follows. In Section II, the averaged switch model of the threephase CSR in the stationary frame is derived by analyzing the working principle and operational conditions. Then, in Section III, a voltageoriented power control strategy based on the instantaneous power theory is proposed. To reduce gridside current distortion or even system instability, an active damping method with capacitorvoltage feedback is embedded into the control loop to weaken the
LC
resonance. Based on innercurrent loop Bode diagrams, deep insights into the limitations on the dynamic performance of PR controllers are provided in Section IV. In this section, a new cascaded leadlag compensation method is presented, which makes the inner loop equivalent to a simple firstorder system. A zeropole placement technique can be utilized to design the inner and outer loop gains. Finally, simulation and experimental results are presented in Section V and VI to verify the feasibility and effectiveness of the proposed control strategy.
II. AVERAGED MODEL OF THE THREEPHASE CSR
The topology of a threephase gridconnected CSR is shown in
Fig. 1
. The switching element
S_{x}
(
x
=1, 2,…, 6) consists of an insulated gate bipolar transistor (IGBT) and an ultrafast recovery diode in series, which results in the reverse voltage blocking capability. An
LC
filter is required at the input side of the threephase CSR to filter out the switching frequency harmonic components and to assist in the switching devices commutation. At the dclink, the inductor
L
_{dc}
is employed to smooth the load current. To reduce the devices conduction losses and control logic, an additional freewheeling diode
D_{w}
is connected in parallel on the dclink.
Schematic diagram of the threephase PWM CSR.
Based on the system in
Fig. 1
, the mathematical model of the CSR in the
a

b

c
reference frame is described as:
Where
i
_{dc}
stands for the dclink current; [
i_{abc}
]=[
i_{a} i_{b} i_{c}
]
^{T}
, [
e_{abc}
]=[
e_{a} e_{b} e_{c}
]
^{T}
, [
v_{abc}
]=[
v_{a} v_{b} v_{c}
]
^{T}
, and [
m_{abc}
]=[
m_{a} m_{b} m_{c}
]
^{T}
denote the gridside currents, the gridside voltages, the voltages across the input filter capacitors, and the modulating signals of the CSR, respectively.
L
,
C
and
R
_{g}
represent the filter inductance, the filter capacitor and its equivalent series resistance for each phase.
For a threewire threephase gridconnected converter, there is no zerosequence injected grid current. Meanwhile, in order to simplify the analysis, suppose the threephase voltage works in the balanced state. The transformation matrix from the
a

b

c
frame to the
α

β
frame is as follows:
Thus, the mathematical model in the stationary
α

β
reference frame can be expressed as:
Where [
i_{αβ}
]=[
i_{α} i_{β}
]
^{T}
, [
e_{αβ}
]=[
e_{α} e_{β}
]
^{T}
, [
v_{αβ}
]=[
v_{α} v_{β}
]
^{T}
, and [
m_{αβ}
]=[
m_{α} m_{β}
]
^{T}
.
According to (5)(7), the
s
domain average model of the CSR in the stationary
α

β
frame is shown in
Fig. 2
. Obviously, there is no rotating transformation and no coupling relationship.
Average model of CSR in the Laplace domain.
III. PROPOSED CONTROL STRATEGY
 A. PR Control Based on the Instantaneous Power Theory
By applying the
p

q
theory
[27]
, the inputs instantaneous active
p
and reactive
q
powers of the CSR can be defined in the stationary
α

β
frame as:
Set the reference values of the instantaneous active and reactive powers as
p
* and
q
*, respectively. Then, the reference gridside currents can be expressed as:
In general, threephase PWM rectifiers should operate at a unity power factor. Therefore, the reactive power
q
* is controlled to be zero (
q
*=0), and the expressions of (9) can be simplified as:
According to the power balance principle, the dclink active power is equal to the gridside instantaneous active power, namely:
By considering the smallsignal perturbations
around the steadystate operating points
equation (11) can be written as:
Since by definition
î
_{dc}
is a smallsignal perturbation,
î
_{dc}
/
<<1, the transfer function from the dclink current to the gridside instantaneous active power in the
s
domain can be obtained as:
From (13), the systematic instantaneous active power can be controlled by adjusting the reference dclink current
. Then, the reference currents will be obtained to achieve input current control of the inner loop. At the same time,
G_{pd}
(
s
) is a firstorder plant to maintain dclink current in the reference value. Thus, a proportional integral (PI) controller is used in the outer current loop, with the transfer function shown below:
According to the aforementioned analysis, the overall control diagram of the proposed PQ control, based on the stationary
α

β
frame, is illustrated in
Fig. 3
. There are three feedback control loops in this system: 1) two inner current loops that control the gridside currents
i_{α}
and
i_{β}
; and 2) one outer dc current feedback loop that controls the dclink current
i
_{dc}
. Assuming that the losses in the filter and rectifier are ignored, the instantaneous active power reference
p
^{∗}
is generated by the dclink current PI regulator, and the instantaneous reactive power reference
q
^{∗}
is directly set to zero. Under the steady state, the
α

β
axis current references
can then be obtained from (10). Unfortunately, for the ac reference, e.g., the current control in a threephase converter in the stationary frame, applying conventional PI controllers lead to steadystate errors due to the finite gain at the fundamental frequency
[28]
. To track the reference current precisely, a proportional resonant (PR) controller is adopted as the controller of the inner current loop.
Block diagram of the CSR system and its controls based on the stationary αβ frame.
 B. Active Damping Control
The basic CSR input filter transfer function can be expressed as:
Thus, the resonance frequency
ω_{n}
and the damping ratio
ζ
of the system can be readily derived as:
Due to the fact that the series resistance
R
_{g}
of the filter inductor is so small, the system will suffer from a severe resonance problem. In order to reduce the resonant effect of the CSR system, an additional physical resistor can be inserted in series or parallel with the
LC
filter circuit, as shown in
Fig. 4
. This passive damping method is simple and reliable. However, these additional resistors result in energy losses, especially in high power applications. To overcome this drawback, several active damping methods have been proposed in recent years. Among them, the capacitorvoltage feedback (CVF) active damping method is applied in this paper due to its effectiveness and simple implementation
[17]

[19]
. Since the feedback loop of the capacitorvoltage active damping is incorporated into the system, the new input filter transfer function can be obtained as:
Four possible locations of damping resistor.
According to (17), its resonance frequency and the damping ratio with the CVF are changeable, then:
It can be observed from (18) that the damping ratio
ζ
^{∗}
can be easily adjusted by changing the feedback gain
K_{v}
. A Bode diagram of
is plotted in
Fig. 5
. It shows that when the feedback gain increases from 0 to 0.4, the
LC
resonant peak is gradually damped. A bigger feedback gain is expected to provide a better damping effect. However, when
K_{v}
is too large, the rectifier system may become unstable. Furthermore:
Bode diagram of the filter transfer function G_{plant}(s).
the selection of
K_{v}
is constrained by the dclink current and modulation index
[22]
. Ultimately, according to
Fig. 5
,
K_{v}
=0.2 is chosen for the CVF active damping method.
IV. CONTROLLER DESIGN
 A. Proposed MultiLoop Controller
The general form of a PR controller is given by:
Which gives an infinite gain at a frequency of
ω
_{0}
and a 180° phase shift. However, the PR controller defined by (19) can be challenging to physically realize. This is especially true when using a digital control system. Therefore, the quasiPR controller in (20) is employed in the control scheme to avoid instability.
Where
K_{rp}
is the proportional gain;
K_{r}
is the resonant controller gain;
ω
_{0}
is set as the line frequency,
ω
_{0}
=2π·50; and
ω_{c}
is the cutoff frequency, which determines the width of the resonant peak.
According to the previous analysis, the control model of the inner current loop for each phase can be shown in
Fig. 6
. When the feedforward compensation term of the gridside voltages is not considered, by using Mason’s signalflow gain formula, the openloop transfer function of the inner loop can be obtained as:
Control model diagram of the inner current loop.
Where
G
_{d}
(
s
)=1/(
T
_{d}
+1) is a firstorder inertia plant that represents the delay caused by the sampling, program calculation and PWM control, and
T
_{d}
is the delay time.
For further analysis, (21) needs to be rearranged as:
Where
a
_{2}
=
K_{rp}
;
a
_{1}
= 2
ω_{c}
(
K_{rp}
+
K_{r}
);
a
_{0}
=
K_{rp}
;
b
_{5}
=
T
_{d}
LC
；
b
_{4}
=
C
(
L
+
T
_{d}
R
_{g}
+ 2
ω_{c}
T
_{d}
L
);
b
_{3}
=
T
_{d}
+
R_{g}
C
+
K_{v} L
+ 2
ω_{c}
T
_{d}
R_{g}
C
+2
ω_{c}
LC
+
T
_{d}
LC
;
b
_{2}
= 1 +
K_{v} R
_{g}
+ 2
ω_{c}
(
T
_{d}
+
R_{g}
C
+
K_{v} L
) +
C
(
L
+
R_{g}T
_{d}
); and
b
_{1}
= 2
ω_{c}
(
K_{v} R
_{g}
+ 1) +
(
T
_{d}
+
R_{g}
C
+
K_{v} L
);
b
_{0}
=
(
K_{v} R
_{g}
+ 1).
From (20), the gain of the quasiPR controller at
ω
_{0}
is
K_{rp}
+
K_{r}
, which is still a large gain when compared to the PI controller at the same frequency. Hence, the accuracy in regulating the input ac signal can be guaranteed by adjusting the parameter
K_{r}
. In this paper, the gain of the
G_{PR}
(
s
) at
ω
_{0}
is set to 60 dB, namely:
Since
K_{rp}
<<
K_{r}
, according to (23), the gain is approximately
K_{r}
≈ 1000. When compared with the PR controller,
ω_{c}
can be set appropriately to expand the controller bandwidth so as to deal with a typical ±1% variation of the grid fundamental frequency
[29]
. This improves the robustness of the control system. However, in practice,
ω_{c}
needs to be set as small as possible because a large
ω_{c}
introduces a phase lag toward the crossover frequency which reduces the phase margin. Finally,
ω_{c}
=2 rad/s is chosen.
A stability analysis of the inner current loop using RouthHurwitz criterion involves very complicated mathematical calculations. For simplicity of analysis, the Frequency Response Method is used to select the proper controller parameter
K_{rp}
. A Bode diagram of the open loop transfer function is presented in
Fig. 7
, where the parameters of the threephase CSR system are configured as in
Table I
. As illustrated in
Fig. 7
,
K_{rp}
has an important impact on the phase margin and bandwidth of the system. With an increase of
K_{rp}
(from 0.1 to 3) at the beginning, the phase margin tends to increase. After that, it gradually drops. Finally, for
K_{rp}
=3 the system becomes unstable (phase margin=2.5°).
Bode diagram of the innercurrent openloop with differing K_{rp}
PARAMETERS OF THE CSR SYSTEM
PARAMETERS OF THE CSR SYSTEM
Generally, the bandwidth of the transfer function can be defined as the cutoff frequency where has an attenuated gain of 3 dB with respect to the dc gain
[30]
. In order to improve the dynamic performance of the inner current loop,
K_{rp}
should be as large as possible to achieve a proper bandwidth as long as the system has enough of a stability margin. Based on the principle discussed above,
K_{rp}
=0.2 is determined.
It is clear from
Fig. 7
that the lowfrequency gain of the inner current loop is very small. Therefore, it fails to achieve a fast dynamic response performance. In order to mitigate this problem, the control structure needs to be modified. In this paper, a new cascaded leadlag compensator for the inner current loop is proposed as:
In the lowfrequency region, if
ω
<
ω_{a}
<
ω_{b}
, the amplitude of (24) is equal to:
By selecting an appropriate parameter
K_{L}
, let equation (25) be much more than 1 so that the proposed compensator is able to increase the lowfrequency loop gain. Moreover, the bandwidth of the inner current controller should be chosen so that it is between 10 times the fundamental frequency and 1/10 the switching frequency to ensure both a fast response and switching noise rejection in practical applications. For simplicity of the design process, the singleinput singleoutput (SISO) tool in MATLAB is used here to determine the parameters
ω_{a}
and
ω_{b}
while considering the stability margin and the lowfrequency loop gain.
 B. Inner Loop Design in the zDomain
To further simplify the block diagram and to convert the model to a discretetime, the digital implementation of the inner current loop is shown in
Fig. 8
. ZOH stands for a zeroorder holder, and
z
^{1}
represents the sampling and PWM updating delay.
Block diagram of the inner current loop in discretetime domain.
The inner current loop is analyzed in the discretetime domain, and it can be noted that the control plant includes two parts: the transform functions from the filter capacitor voltage to the acside current (G
_{v2i}
(
s
)), and the gridside current to the filter capacitor voltage (G
_{g2v}
(
s
)) which can be expressed as:
By applying the ZOH transformation, the discretetime domain transfer function of (26) is obtained as:
Where
and
Since the gridside current and capacitor voltage are sampled simultaneously, there is no additional delay in the control plant
[31]
. Therefore, by using an impulse invariant transformation, the discretetime domain transfer function of (27) is derived as:
Obviously,
R
_{g}
T
_{s}
/
L
<<1, and (29) can be approximated as:
In addition, for digital implementation, the PR controller is typically decomposed into two simple integrators, where the direct integrator is discretized with forward difference, and the feedback integrator is discretized with backward difference
[32]
[33]
. Utilizing this method, the corresponding discretetime domain transfer function of (20) is obtained as:
By using a bilinear transformation and substituting (32) into (24), a discrete transfer function of the leadlag compensator can be given by:
By the aforementioned process, and considering the active damping feedback loop, the openloop and closedloop transfer functions of the inner current loop in the discretetime domain are established as:
Finally, using digital implementation of the openloop transfer function in (34), the parameters of (24) are designed as
K_{L}
=0.82,
ω_{a}
=416.7 and
ω_{b}
=5.3. A Bode plot of the openloop transfer functions with/without the cascaded compensator is shown in
Fig. 9
. After compensation, the crossover frequency is about 511 Hz with a phase margin of 57.2°, and the loop gain at the low frequency band is increased to 25 dB. As a result, the corresponding response speed and stability of the overall system are improved.
Bode diagram of the innercurrent openloop.
Fig. 10
gives a bode plot of the innercurrent closedloop, which has a closed loop unity gain with zero phase angle in the lowfrequency region. As a result, the closedloop transfer function of the ac current controller
T_{ci}
(
z
) can be simplified to a firstorder inertia link 1/(1+
T_{cs}
) in the bandwidth region of the dc current control, where
T
_{c}
represent the equivalent time constant.
Bode diagram of the innercurrent closedloop.
 C. Outer Current Controller Design
For the multiloop control system, the outer controller gains are tuned with a limited bandwidth, which avoids the interference between the outer current control and the inner current control loops. Like the design procedure of the inner loop, the outer loop design can also use the MATLAB/SISO tools. A digital control block diagram model of the outer current loop is shown in
Fig. 11
, and the openloop transfer function (
T_{oo}
(
z
)) is given by:
Block diagram of the outer current loop in discretetime domain.
When the outer current controller parameters are chosen as
K_{p}
=0.57 and
K_{i}
=4350, Bode plots of the openloop and closedloop systems with the compensation are depicted in
Fig. 12
. It is clear that the openloop response is stable with a phase margin of 57.9º. Meanwhile, the closedloop response meets the design requirements (Bandwidth=147 Hz).
Bode diagram of the open and closedloop system with compensation.
Fig. 13
shows the step response of the proposed controller against the uncompensated controller. The two controllers have similar dynamic performances. However, the proposed controller exhibits a smaller steadystate error than that of the uncompensated controller.
Step response of the proposed controller and the uncompensated controller.
 D. Impact of the System Parameters
In particular, the parameters of the CSR system may vary due to changes in the ambient temperature and load. Therefore, it is necessary to consider system stability relating to changes in the parameters of the
LC
filter and load resistance.
Figs. 14
(a) and
14
(b) show the migration of the poles and zeros of the closedloop system when
C
and
L
_{g}
change by ±50%, respectively. As shown in
Fig. 14
(a), the two dominant poles approach to the boundary of the unit circle as
C
increases, which may result in an unstable system. As shown in
Fig. 14
(b), all of the poles and zeros lie inside of the unit circle regardless of the increase of
L
_{g}
. As a result, the system is far from instability.
Polozero map of the digital control system corresponding to the change of the parameters of (a) C, (b) L_{g} and (C) R_{L}.
When the load resistance (
R_{L}
) changes by ±50%,
Fig. 14
(c) shows the migration of the poles and zeros of the closedloop system. With an increase in
R_{L}
, the domain poles tend toward the outside of the unit circle, which makes the overshoot of the system becomes higher (less damping of the dominant poles). When
R_{L}
=0.65, the resulting overshoot is 12.2%, which is more than the expected 4%. If this is not allowable,
K_{p}
and
K_{i}
should be optimized.
V. SIMULATION RESULTS
To validate the performance of the proposed control scheme, the simulation of a threephase CSR has been established using MATLAB/Simulink software. The circuit parameters for the simulation are listed in
Table I
.
Fig. 15
presents the steady state waveforms of the threephase CSR system. The dclink current reference value
is set to 30A and the reactive power reference value
q
^{∗}
is zero. From top to bottom, the curves in
Fig. 15
are the gridside current and dclink current, the harmonic spectrum, the active power, the reactive power, and the power factor. It can be clearly seen that the instantaneous active power and instantaneous reactive power are kept constant, and that the dclink current tracks its reference with good accuracy. The gridside currents have nearly sinusoidal waveforms (THD=2.46%) and are in phase with the line voltages. Therefore, the unity power factor operation of the rectifier is successfully achieved.
Simulation results in steady state for = 30A and q^{∗} = 0.
Fig. 16
shows the transient behavior of the gridside current, the dclink current, the instantaneous active and reactive power, and the power factor in the case of a sudden change from
=0A to
=60A. After a very short transient, the dclink current tracks its reference with high rapidity and stability. In addition, the active power is kept constant, the reactive power is successfully reduced and kept close to zero, and the gridside currents have nearly sinusoidal waveforms.
Simulation results of transient change from = 0A to = 60A.
VI. EXPERIMENTAL VALIDATION
A prototype of the threephase CSR, as shown in
Fig. 17
, has been built and tested in the laboratory. The control board is mainly composed of a digital signal processor (DSP) (TMS320F2808) and a preprocessing circuit. The IGBT modules used in the main circuit are PM400HSA120s, and the fast recovery diodes are RM300HA24Fs. The gridside voltage and filter capacitor voltage are sensed by a voltage Hall sensor (LV28P). The gridside current and dclink current are separately measured by current Hall sensors (LA200P and LT508S). The parameters of the experimental system are the same as those used in the simulation model.
Hardware prototype of the threephase CSR system.
The Real Time Workshop (RTW) in Simulink is one of the DSP development tools, which has the capability to design a rapid prototyping system and to generate code directly from the Simulink models, and the entire running process is done automatically by using MATLAB/Simulink and Code Composer Studio (CCS V3.3)
[34]
[35]
. In this study, the control strategy that was mentioned earlier in Section III is implemented using the TI C2000 package and TMS320F2808 toolbox, as shown in
Fig. 18
. The ADC block samples the gridside voltage, the capacitance voltage, the gridside current and the dclink current sequentially. Then, these signals are scaled and transformed to obtain the actual variables in the
α

β
reference frame. The PQ block is built based on equation (10), and it produces the gridside reference current values. After that, the PR controllers generate the control signal by comparing the actual and the reference values of the gridside current.
Simulink model for control algorithms rapid implementation.
The experimental results with and without the active damping control are shown in
Fig. 19
. It can be seen that when
K_{v}
is initially zero, the gridside current is highly distorted because of the input
LC
filter resonance. After the proposed method is enabled, the high frequency resonance is effectively suppressed and the THD value is reduced from 7.49% to 3.12%. Therefore, the performance of the CSR system meets the requirements of the grid code.
Harmonic spectrum of gridside current for (a) without the active damping method and (b) with the active damping method.
Fig. 20
(a)(d) shows the steadystate waveforms of the input voltage
e
_{a}
, gridside current
i_{a}
and dclink current
i
_{dc}
at different resistive loads. As can be seen, the gridside current is nearly sinusoidal and in phase with the input voltage. This indicates that the proposed control strategy can provide a unity power factor and a low THD. It also indicates that the dclink current can track its reference well with a small ripple.
Experimental waveforms in steady state: (a) i_{dc}=20A, R_{L}=0.5Ω; (b) i_{dc}=40A, R_{L}=0.35Ω; (c) i_{dc}=40A, R_{L}=0.5Ω; and (d) i_{dc}=40A, R_{L}=0.6Ω.
To test the dynamic performance of the CSR system, the reference current command
is changed from 0 to 60A. As shown in
Fig. 21
, the experimental results show that the dclink current reaches a new stable state in approximately 32ms. They also show that the gridside current tracks its reference phase within several switching cycles, exhibiting excellent dynamic performance.
Experimental waveforms of transient response for the proposed strategy.
VII. CONCLUSIONS
In this paper, based on the instantaneous power theory, a novel control scheme for threephase CSRs is proposed. The rotating transformation and phase detection of the input voltages are both eliminated. In order to suppress the
LC
resonances caused by the power source and the converter itself, the active damping method with capacitor voltage feedback is embedded into the control loop. However, a stability analysis is carried out to show that there is a limitation on the low frequency loop gain from the point of view of stability if a PR controller is used as the inner loop controller. Then, a dc steadystate error for the outer current loop is induced. A leadlag cascaded compensator is proposed in this paper to solve this problem. Moreover, all of the controllers are designed based on the required phase margin and steadystate error using a bode diagram of the discretetime domain of the system. Finally, the control algorithm is implemented using a DSP linked with MATLAB for automatic code generation. The results of the simulation and experiment demonstrate that the proposed strategy can achieve better steady state and transient performances.
Acknowledgements
This research work was supported by Project Supported by Scientific Research Foundation of State Key Lab of Power Transmission Equipment and System Security under Project 2007DA10512713302.
BIO
Qiang Guo was born in Tianjin, China, in 1984. He received his B.S. and M.S. degrees in Electronic Engineering from Southwest University, Chongqing, China, in 2007 and 2010, respectively. He is presently working toward his Ph.D. degree in Electrical Engineering at Chongqing University, Chongqing, China. His current research interests include PWM rectifiers, Zsource inverters, and motor drives.
Heping Liu was born in Chongqing, China, in 1957. He received his B.S., M.S., and Ph.D. degrees in Electrical Engineering from Chongqing University, Chongqing, China, in 1982, 1987, and 2004, respectively. Since 2005, he has been a Professor in the School of Electrical Engineering, Chongqing University. His current research interests include motor drives and power converters.
Yi Zhang was born in Chongqing, China, in 1981. He received his B.S. and M.S. degrees in Computer Science, and his Ph.D. degree in Electrical Engineering from Chongqing University, Chongqing, China, in 2005, 2008, and 2014, respectively. His current research interests include the dynamic control and optimization of automotive systems.
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