This study investigates the inherent influence of a DClink voltage controller on both DClink voltage control and the compensation performance of a threephase, fourwire shunt active power filter (APF). A nonlinear variableparameter DClink voltage controller is proposed to satisfy both the dynamic characteristic of DClink voltage control and steadystate compensation performance. Unlike in the conventional fixedparameter controller, the parameters in the proposed controller vary according to the difference between the actual and the reference DClink voltages. The design procedures for the nonlinear voltage controller with variable parameters are determined and analyzed so that the proposed voltage controller can be designed accordingly. Representative simulation and experimental results for the threephase, fourwire, centerspilt shunt APF verify the analysis findings, as well as the feasibility and effectiveness of the proposed DClink voltage controller.
I. INTRODUCTION
Power electronic devices have been widely utilized with the rapid development of power electronics technology. Therefore, much harmonic current is injected into grids, thus deteriorating power quality and severely damaging the power system further
[1]
. As a result, harmonic control is a hot issue and has been studied extensively
[2]
. Active power filters (APFs) can detect and compensate system harmonics and reactive power in real time, thereby reducing the harmonic effect on the grid and ensuring operations
[3]
. APF exhibits a dynamic response, realtime characteristic, and controllability that are superior to those of the passive filter. Thus, APF is an ideal device with which to compensate harmonics and improve power quality
[4]
.
DClink voltage must be sufficiently constant in value so that APF can function properly. This process ensures that the compensating current produced by APF strictly follows the control requirement and generates the desired compensation effect
[5]
. Therefore, the design of DClink voltage controllers is important; it requires detailed quantitative analysis and specification. Studies have been conducted on the APF control algorithm and on DClink voltage control strategy
[6]

[11]
. Nonetheless, few studies investigate APF DClink voltage control specifically. Existing literature mainly focuses on DClink capacitor minimization
[12]
,
[13]
, DClink voltage control strategy
[14]
,
[15]
, minimum DClink voltage design
[16]

[18]
, and adaptive strategies for DClink voltage reference value
[19]

[22]
. Such studies seldom emphasize the inherent relationship between DClink voltage controllers and the steadystate compensation performance of APF. Furthermore, the design procedures for the DClink voltage controller are not considered and analyzed, including dynamic and steadystate performance. Given the limitations in literature, the current study investigates the inherent influence of the DClink voltage controller not only on DClink voltage control but also on the steadystate compensation performance of APF. The design procedures for the DClink voltage controller are discussed as well.
A nonlinear, proportional—integral (PI) DClink voltage controller with variable parameters is proposed to overcome the shortcoming of the conventional fixedparameter PI DClink voltage controller. The proposed controller satisfies both the dynamic characteristic of DClink voltage control and the steadystate compensation performance of APF. DClink voltage is determined by the P/PI voltage controller in the majority of previous studies. The PI controller is generally applied
[6]

[17]
, and the controller parameters are fixed. P/PI DClink voltage control is thus improved. A fastacting DClink voltage controller that is based on the energy of the DClink capacitor was proposed in
[23]
. Overshoot and settling time are reduced for DClink voltage when the load changes suddenly. A new strategy was presented in
[24]
to control the square of the DClink voltage, rather than the DClink voltage itself. DClink voltage command was fasttracked with zero steadystate error. Appropriate parameters were determined through mathematical derivation and design experience for the proposed controllers that can reduce settling time and can avoid overshoot and saturation in line currents. The precision and reliability of the controller parameters were uncertain due to modeling error and to the uncertain and varied system parameters. Moreover, the proposed controllers were still fixedparameter PI controllers; thus, their values could not be adjusted adaptively according to varying system parameters and control requirements in different control stages.
In the current study, a nonlinear PI controller is proposed and applied to the APF DClink voltage controller to overcome the shortcoming of conventional fixedparameter DClink voltage control. The parameters of the PI controller vary according to the difference between the actual and the reference DClink voltages. Unlike in the conventional fixedparameter PI controller, the parameters in the proposed controller are adjusted adaptively on the basis of the difference between the actual and the reference DClink voltages. The control requirements in different control stages are adopted to satisfy both the dynamic characteristic of DClink voltage control and the steadystate compensation performance of APF. These requirements include startup, load fluctuation, and APF steadystate operation period.
The rest of the paper is organized as follows: a threephase, fourwire, centersplit shunt APF is illustrated in Section II. The influence of the DClink voltage controller on DClink voltage control and APF compensation performance is analyzed in Section III through control strategy analysis and mathematical deduction. The design procedures for the DClink voltage controller are considered and analyzed as well in this section. A nonlinear DClink voltage controller with variable parameters is described in Section IV to overcome the shortcoming of the conventional fixedparameter DClink voltage controller and to satisfy the dynamic characteristic of DClink voltage control and steadystate compensation performance. The simulation and experimental verifications of the analysis of DClink voltage control, as well as of the proposed voltage controller, are presented in Sections V and VI, respectively. Finally, the conclusions are provided in Section VII.
II. THREEPHASE FOURWIRE CENTERSPLIT SHUNT APF
The circuit of the threephase, fourwire, centersplit shunt APF is shown in
Fig. 1
.
U_{sx}
is the grid voltage, and
U_{cx}
is the inverter voltage.
i_{sx}
,
i_{lx}
, and
i_{cx}
are the grid, load, and compensating currents for each phase, respectively. Subscript
x
denotes phases a, b, c, and n.
C_{dc}
and
U_{dc}
denote the DClink capacitor and the DClink voltages, respectively. The upper and lower DClink capacitor voltages are
U_{dcU}
=
U_{dcL}
= 0.5
U_{dc}
.
L_{s}
is the grid inductor and is normally neglected due to its low value. The nonlinear load is composed of a threephase, fullbridge rectifier and a resistance
R_{L}
that acts as a harmonicproducing load. The LCL filter that consists of
L_{C}
,
L_{G}
, and
C_{F}
is used to filter out the harmonics at switching frequencies.
R_{d}
is used to suppress the resonance peak of this filter at resonance frequency and to maintain system stability. Given that the LCL filter behaves as an inductor at the frequency range below 2.5 kHz and that the common requirement of the APF output current involves the 50th harmonic, only the frequency range below 2.5 kHz should be considered in control system design. As a result, the LCL filter can be reasonably simplified as an inductor in a lowfrequency range. The inductance value of this inductor is determined by
L
=
L_{C}
+
L_{G}
.
R
is the equivalent resistance of the inductor
[25]
.
Circuit of the threephase, fourwire, centersplit shunt APF.
III. ANALYSIS OF DCLINK VOLTAGE CONTROL
With the aid of the harmonic detection algorithm based on instantaneous reactive power theory, DClink voltage can be effectively controlled by feedback from the DClinkvoltageregulated signal as a positive, fundamental, active current component of this algorithm. The difference between the reference and the actual DClink voltages is regulated by the voltage controller, and the postregulation signal is added to the aforementioned current component. Therefore, the reference currents contain the fundamental, active current component that ensures energy exchange between the DC and AC links of APF and maintains DClink voltage at a reference level. The id–iq harmonic detection method based on instantaneous reactive power theory is typically applied to detect load harmonics accurately. The harmonic detection module with DClink voltage control is presented in
Fig. 2
, where
T_{abcdq0}
is the transformation matrix from the abc coordinate to the dq0 coordinate;
T_{dq0abc}
is the transformation matrix from the dq0 coordinate to the abc coordinate;
U
_{dc}
is the actual DClink voltage;
U
_{dc}
* is the reference DClink voltage; and Δ
I
_{d}
is the signal regulated by DClink voltage.
i_{L}
_{a}
,
i_{L}
_{b}
, and
i_{L}
_{c}
are load currents.
i_{c}
_{a}
*,
i_{c}
_{b}
*,
i_{c}
_{c}
* and
i_{c}
_{d}
*,
i_{c}
_{q}
*,
i_{c}
_{0}
* are reference compensation currents in the abc and dq0 coordinates, respectively.
Harmonic detection module with DClink voltage control.
 A. Influence of DClink Voltage Controllers on DCLink Voltage Control
In the majority of existing studies, DClink voltage is effectively controlled by the P/PI voltage controller. The PI controller is generally used
[6]

[17]
to feed back the controlled signal as an active current component or a reactive current component, thus maintaining DClink voltage at a sufficient reference level.
The influence of the DClink controller on DClink voltage control is determined in conditions wherein the PI controller is applied. When
K_{i}
is fixed at
K_{i}
= 50, the effect of different
K_{p}
values on step response is shown in
Fig. 3
. When K
_{i}
is fixed, a large
K_{p}
value results in short rise and settling times, as well as a small overshoot. When
K_{p}
is fixed at
K_{p}
= 5, the effect of different
K_{i}
values on step response is depicted in
Fig. 4
. When
K_{p}
is fixed, a large
K_{i}
value yields a short rise time, but a large overshoot and a long settling time for DClink voltage.
Step response simulation for the PI controller when K_{i} = 50 and when K_{p} varies from 5 to 25.
Step response simulation for the PI controller when K_{p} = 5 and when K_{i} varies from 5 to 25.
The effect of
K_{p}
on step response when the P controller is employed is displayed in
Fig. 5
. When
K_{p}
value varies from 5 to 25, a large
K_{p}
yields a short rise time for DClink voltage. Overshoot does not occur when the P controller is used. However, this controller generates more steadystate errors than the PI controller does.
Step response simulation for the P controller when K_{p} varies from 5 to 25.
If the steadystate error in DClink voltage is considered, then the PI controller is preferred. However, overshoot occurs when this controller is used. Moreover, the PI controller may protect APF from overvoltage and overcurrent situations. This process poses risks to devices such as insulatedgate bipolar transistors. Although overshoot can be suppressed by increasing
K_{p}
, this adjustment may enhance steadystate error. As a result, the voltage control loop exceeds the stability range. A large
K_{i}
value also yields a short rise time but a large overshoot for DClink voltage. Furthermore,
K_{i}
appears to be a contradictory parameter for measuring performance. The analysis and design processes for control systems are more complex for the PI controller than for the P controller. The overshoot problem can also be solved by considering the critical damping of DClink voltage control. When this critical damping is applied, the phase margin of the DClink voltage control system is small and system stability worsens. Moreover, system parameters vary during operation. Thus, the critical damping of the DClink voltage control cannot be set accurately. This scenario poses a risk to DClink voltage control. Therefore, the P controller is preferable for the DClink voltage controller in APF even though the P controller generates steadystate error. The P controller is advantageous because it does not induce overshoot in the process of increasing DClink voltage. In the process, the system is protected. Moreover, this controller is simple and saves memory resources in the digital signal processor.
 B. Influence of DCLink Voltage Controllers on APF SteadyState Compensation Performance
APF can produce the compensation currents to adhere strictly to the reference currents that are equal to the load harmonic component. The harmonic component is compensated to avoid harmonic pollution in the power grid. APF compensation performance is mainly determined by two factors: whether or not the reference currents are equal to the load harmonic currents and whether or not the compensation currents track the reference currents effectively. Numerous studies verify that the harmonic detection module determines the accuracy of reference currents with respect to the load harmonic component. Furthermore, the performance of the compensation current controller determines the capability of compensation currents to follow the reference currents. The influence of DClink voltage controllers on APF compensation performance is analyzed on this basis.
As per the harmonic detection algorithm for DClink voltage control (presented in
Fig. 2
), the final reference currents
i_{cd}
*,
i_{cq}
*, and
i_{c0}
* in the dq0 coordinate are composed of two parts: the original reference current
i
_{c}
* that is equal to the load harmonic component and the DClink voltage control signal Δ
I
_{d}
that is incorporated into the active current component of the reference current. Therefore, these final reference currents can be written as follows:
According to Eq. (1), the final reference currents
i_{ca}
*,
i_{cb}
*, and
i_{cc}
* in the abc coordinate can be obtained as follows:
where
T_{dq0abc}
is the matrix of transformation from the dq0 coordinate to the abc coordinate:
By integrating Eq. (1) into Eq. (2), the final reference currents in the abc coordinate can be written as follows:
As per Eqs. (1) and (4), the final reference currents in both the abc and dq0 coordinates are divided into two parts: the detected harmonic currents and the DClink voltage control signal. Assuming that the harmonic detection module constructed with the id–iq method can detect the harmonic currents accurately, the first part of the final reference currents represents the specific harmonic currents that must be compensated. However, the other part of the final reference currents, that is, DClink voltage control, may influence the accuracy of the final reference currents. Consequently, APF compensation performance is affected as well.
The DClink voltage control signal in Eq. (4) can be expressed as follows:
According to Eq. (5), the
n^{th}
(
n
> 0,
n
= 1,2,3,…) component of the DClink voltage control signal Δ
I
_{d}
in the dq0 coordinate reduces the (
n
1)
^{th}
component and increases the value of the (
n
+1)
^{th}
component in the abc coordinate. This scenario is observed in all abc phases. As per Eqs. (1) and (5), the feedback DClink control signal changes the values of the final reference currents and limits their accuracy in both the abc and dq0 coordinates.
Given that the P controller is preferred and is selected for DClink voltage control in line with the previously described analysis results, the value of DClink voltage control signal Δ
I
_{d}
can be obtained as follows:
Given Eq. (6), Δ
I
_{d}
increases as controller parameter
K_{p}
increases under a constant voltage difference Δ
U
_{dc}
and vice versa. APF output compensation currents are controlled and adhere strictly to the final reference currents. A large
K_{p}
enhances the deviation of the value of the final reference currents from that of actual harmonic currents. Thus, the APF output compensation currents that follow the final reference currents deviate further from the actual harmonic currents and should be compensated. In this case, the steadystate compensation performance of APF deteriorates further.
IV. PROPOSED NONLINEAR DCLINK VOLTAGE CONTROLLER WITH VARIABLE PARAMETERS
 A. Proposed Nonlinear PI Voltage Controller
According to the analysis results described above, the dynamic performance of DClink voltage control is improved with the increase in the values of voltage controller parameters. However, this increase also deteriorates APF steadystate compensation performance and vice versa. Therefore, a nonlinear DClink voltage controller is proposed to satisfy both the dynamic characteristic of DClink voltage control and steadystate compensation performance. The parameter in the proposed controller is first set to a small fixed value (i.e., less than 0.1). Then, this parameter is multiplied by the absolute value of the voltage difference, which represents the realtime value of the controller parameter. The proposed law of nonlinear DClink voltage control can be expressed as follows:
Thus, controller parameter values vary according to the difference between the actual and the reference DClink voltages in real time. Specifically, the parameter values in the proposed controller increase when the actual and the reference DClink voltages differ significantly, such as in the startup stage and in the load fluctuation period. This scenario ensures the satisfaction of the dynamic characteristic in DClink voltage control. By contrast, the parameter values in the proposed controller decrease when the difference between the actual and the reference DClink voltage is slight, such as in the APF steady operation period. This occurrence prevents the voltage control signal from affecting the accuracy of harmonic detection and steadystate compensation performance.
The P controller is preferred and is selected for DClink voltage control on the basis of the discussion in Section III regarding the characteristics of PI and P controllers in this voltage control. The law of nonlinear DClink voltage control proposed in this paper is rewritten as follows:
 B. Limitation of the Proposed Controller Parameter Value
The stability of the DClink voltage control loop should be maintained to avoid the overflow problem. Thus, a limiter is applied to the controller parameter. According to the instantaneous energy balance principle highlighted in
Fig. 1
, the instantaneous power in the DClink is equal to that in the AClink. If the ripple effect is ignored, then the following instantaneous power balance equation can be obtained:
where
U
_{dc}
(t) is the instantaneous DClink voltage;
I
_{dc}
(t) is the instantaneous DClink current; and
i
_{cx}
is the compensation current.
L
is the inductance value of the simplified LCL filter in lowfrequency range, and
R
is the equivalent resistance of the inductor, as discussed in Section II. The grid inductor
L
_{s}
is normally neglected; hence,
U
_{sx}
represents the voltage at the point where APF accesses the entire system. This voltage is equal to the grid voltage.
The influence of grid voltage fluctuation on DClink voltage can be eliminated by applying the feedforward control strategy proposed in
[26]
. Thus, the following derivations based on the balanced, threephase grid voltage system simplify calculation and deduction to establish the DClink voltage control loop. The equations below can be established according to instantaneous power theory
[26]
:
where
U_{S}
is the effective value of the grid voltage;
I_{P}
(t) is the instantaneous value of the active compensation current;
I_{dc}
(t) is the instantaneous value of the DClink current; and
C
is the capacitance value in the DClink.
The compensation current
i_{c}
(t) is composed of fundamental current
i_{p}
(t) and harmonic compensate current
i_{h}
(t).
i_{p}
(t) maintains the DClink voltage and
i_{h}
(t) compensates the load harmonics.
Then, the threephase instantaneous power consumed by inductance and its equivalent resistance can be expressed as follows:
By integrating Eqs. (10), (11), (13), and (14) into Eq. (9), the following equations can be obtained:
Changes in the fundamental current can cause fluctuations in DClink voltage. Therefore, a transformation is initiated with a slight disturbance at the equilibrium point. Given a slight disturbance, the following can be obtained:
where
U_{dc}
is the reference value for DClink voltage.
By integrating Eq. (16) into Eq. (15), the quadratic term is ignored and linearization is performed near the equilibrium point. The following equations can then be derived:
When Eq. (18) is integrated into Eq. (17), the latter is transformed as follows:
When Laplace transform is applied to Eq. (19), the transfer function of the DClink voltage control loop can be derived:
Then, the control block diagram for DClink voltage can be constructed as shown in
Fig. 6
. The closedloop transfer function of DClink voltage control can be obtained as follows by integrating the transfer function of the voltage controller into the loop:
Closedloop block diagram for DClink voltage control.
Given the closedloop transfer function, the controller parameter value can be limited by applying the Routh criterion as follows:
V. SIMULATION AND EXPERIMENTAL VERIFICATION OF VOLTAGE CONTROLLER INFLUENCE
Simulations and experiments on the threephase, fourwire shunt APF are conducted to verify the deduction and the proposed controller. The simulations are performed in MATLAB. To validate the simulation results, a prototype of this APF is also generated in laboratory. The parameters of the simulated and the experimental systems are listed in
Table I
. In addition, the P controller is used in DClink voltage control, and the PIrepetitive compound control algorithm is utilized in compensation current control
[27]
. The influence of the DClink voltage controller on DClink voltage control and APF steadystate compensation performance is verified in this section.
SYSTEM PARAMETERS
Fig. 7
shows the simulation results in the startup stage and during load change when voltage controller
K_{p}
varies from 1 to 2.5, 5, 7.5, and 10. The rise and resume times of DClink voltage shorten with the increase in
K_{p}
. Similar results are also obtained in the experiments. The rise time for DClink voltage in the startup stage and the resume time in the load change period are shorter when
K_{p}
= 10 than when
K_{p}
= 1. The experiment results in the startup stage and in load change are displayed in
Figs. 8
and
9
, respectively. A large
K_{p}
improves the dynamic characteristic in DClink voltage control.
Simulation results of DClink voltage with different K_{p} values. (a) Startup stage. (b) Load change.
Experimental results for DClink voltage in the startup stage with different K_{p} values. (a) K_{p} = 1, (b) K_{p} = 10.
Experimental results for DClink voltage when load changes under different K_{p} values. (a) K_{p} = 1, (b) K_{p} = 10.
The influence of the DClink voltage controller on steadystate compensation performance is determined. Without APF, the load currents contain numerous harmonics. The total harmonic distortion (THD) values of the simulated and the experimental load currents are 23.78% and 25.13%, respectively. Therefore, the currents are severely distorted. The value of each harmonic order current is listed in
Table II
. In general, evenordered harmonics are largely offset in the threephase system. Thus, these harmonics can be ignored in the calculation process. Given that the load harmonic currents beyond the 30th order are small, only the harmonic orders within the 30th are considered in this study for simplicity.
HARMONIC CURRENTS
When the value of the voltage controller parameter is
K_{p}
= 1, the simulated and the experimental THD values of the source current after compensation are 3.26% and 4.45%, respectively. The simulation and experiment waveforms are exhibited in
Fig. 10
. When
K_{p}
increases to 2.5, 5, 7.5, and 10, the simulated THD values of the source current after compensation increase to 3.48%, 3.80%, 4.26%, and 4.73%, respectively. The corresponding experimental values are 4.85%, 5.32%, 5.86%, and 6.22%. The diagram of variations in THD with
K_{p}
is shown in
Fig. 11
. When the current controller is set, the THD of the source current after compensation increases with
K_{p}
. Therefore, changes in
K_{p}
affect steadystate compensation performance.
Waveforms generated when K_{p} = 1. (a) Simulation. (b) Experiment.
THD values of the source current after compensation when K_{P} varies.
Assuming that the three phases of the APF are balanced using the id–iq harmonic detection algorithm,
Table III
lists the simulated value of each reference current order in the abc coordinate. The value in each reference current order is equal to the value in each load harmonic order when the DClink voltage control signal is disregarded. The simulation results show that the harmonic detection algorithm is effective and that the reference current is the specific harmonic that should be compensated when the DClink voltage control signal is disregarded.
SIMULATION REFERENCE CURRENTS IN THE ABC COORDINATES
SIMULATION REFERENCE CURRENTS IN THE ABC COORDINATES
Tables IV
and
V
list the values of each reference current order in the dq0 and abc coordinates with different voltage controller parameters once the DClink voltage control signal is incorporated into the harmonic detection algorithm as the active component.
Table IV
shows that the values in the daxis are mainly in the 6k
^{th}
order (
k
= 1,2,3,…) and that the
i_{d}
value varies after integrating the DClink voltage control signal. The accuracy of the final reference currents in the dq0 coordinate is thus affected.
Table V
indicates that a fundamental current is used to maintain the DClink voltage in the final reference current and that the values of each reference current order change. The 6k
^{th}
order values in the daxis of the dq0 coordinate affect the values in the abc coordinate. Specifically, these 6k
^{th}
order values reduce the values of the (6k1)
^{th}
order and increase the values of (6k+1)
^{th}
order in the abc coordinate. The magnitude of variation increases with the increase in
K_{p}
. In this case, the final reference current deviates from the accurate harmonic current, and the situation is aggravated with the increase in
K_{p}
.
REFERENCE CURRENTS IN DQ0 COORDINATES WITH VARIED VOLTAGE CONTROLLER PARAMETERS
REFERENCE CURRENTS IN DQ0 COORDINATES WITH VARIED VOLTAGE CONTROLLER PARAMETERS
FINAL REFERENCE CURRENTS IN ABC COORDINATES WITH VARIED VOLTAGE CONTROLLER PARAMETERS
FINAL REFERENCE CURRENTS IN ABC COORDINATES WITH VARIED VOLTAGE CONTROLLER PARAMETERS
As per the compensation current presented in
Table VI
, the APF output compensation currents effectively follow the final reference currents, regardless of the variation in
K_{p}
value.
COMPENSATION CURRENTS GIVEN A VOLTAGE CONTROLLER WITH VARYING PARAMETERS
COMPENSATION CURRENTS GIVEN A VOLTAGE CONTROLLER WITH VARYING PARAMETERS
Hence, changes in controller parameter value does not affect current controller performance. Rather, these changes affect the accuracy of the final reference current with respect to the load harmonic. Thus, changes in controller parameter affect the steadystate compensation performance of APF.
Thus, the influence of the DClink voltage controller can be confirmed as indicated by the aforementioned simulation and experiment results. A large
K_{p}
value improves the dynamic characteristic in DClink voltage control. However, this large value also increases Δ
I_{d}
value, which was added to the harmonic detection algorithm as an active component. As a result, an additional value is incorporated into the final reference currents in both dq0 and abc coordinates. Therefore, the final reference currents deviate from the accurate harmonic currents and limit the precision of the final reference current. Although tracking capability remains excellent due to the set current controller, the steadystate compensation performance of APF may worsen with the increase in
K_{p}
.
VI. SIMULATION AND EXPERIMENTAL VERIFICATION OF THE PROPOSED DCLINK VOLTAGE CONTROLLER
According to the aforementioned analysis and experiment results, an increase in
K_{p}
improves the dynamic performance of DClink voltage control but deteriorates the steadystate compensation performance of APF. By contrast, a decrease in
K_{p}
value generates an excellent steadystate compensation performance but does not satisfy the dynamic characteristic of DClink voltage control. A DClink voltage controller with variable parameters is proposed to satisfy both the dynamic characteristic of DClink voltage control and steadystate compensation performance. In the proposed controller, the P parameter varies according to the difference between the actual and the reference DClink voltages.
Parameter value increases with the voltage difference once the DClink voltage controller with variable parameters is applied and when the discrepancy between the actual and the reference DClink voltages is large in the startup stage. Moreover, the rise time of the DClink voltage is shorter than that of the conventional fixedparameter voltage controller with small parameters.
Figs. 12
and
13
depict the simulation and experiment results for the process of DClink voltage increase to the preset reference value given the conventional fixed PI controller and the proposed controller, respectively.
Simulation results for the process of DClink voltage increase. (a) With the conventional fixed PI controller. (b) With the proposed voltage controller.
Experimental results for the process of DClink voltage increase. (a) With the conventional fixed PI controller. (b) With the proposed voltage controller.
Parameter value also increases with the difference in voltages when the load changes suddenly. Furthermore, the resume time of the DClink voltage is shorter than that of the conventional fixedparameter voltage controller with small parameters.
Figs. 14
and
15
show the simulation and experimental results for the process of resuming DClink voltage with the conventional fixed PI controller and the proposed controller when load changes. The voltage controller with variable parameters improves the dynamic characteristic in DClink voltage control.
Simulation results for the process of resuming DClink voltage. (a) With the conventional fixed PI controller. (b) With the proposed voltage controller.
Experimental results for the process of resuming DClink voltage. (a) With the conventional fixed PI controller. (b) With the proposed voltage controller.
When the actual DClink voltage differs only slightly from the reference DClink voltage in the steady running stage, parameter value is small. Given the load change situation presented in
Figs. 14
(b) and
15
(b), the simulated THD values of the source current are 3.44% and 3.33% before and after load change, respectively. The corresponding experimental values are 4.45% and 4.37%. APF not only improves the dynamic characteristic in the DClink voltage control when the DClink voltage controller with variable parameters is employed, but this filter also maintains excellent steadystate compensation performance. Therefore, the dynamic characteristic of DClink voltage control and APF steadystate compensation performance are both satisfied when the nonlinear DClink voltage controller with variable parameters is utilized.
VII. CONCLUSION
An adaptive DClink voltage controller in a threephase fourwire shunt APF is proposed in this paper. To implement this controller, the required minimum DClink voltage for APF is reduced. Moreover, a design block is constructed for this minimum DClink voltage. The simulation and experiment results prove that once the DClink voltage exceeds the minimum value, increasing DClink voltage alone does not strengthen compensation effect significantly. However, this increase enhances power consumption and switch loss. Thus, the DClink voltage reference is initially set to the required minimum value. Power consumption and switch loss can be reduced effectively if APF operates normally. Then, a block is built for adaptive reference DClink voltage control given different harmonic currents and grid voltage levels. This block can adjust the reference value of DClink voltage adaptively when the harmonic current and the grid voltage level fluctuate. Thus, this block guarantees the operation of APF and maintains ideal compensation performance. This block also reduces power consumption and switch loss in comparison with traditional fixed DClink voltage control. Simulation and experimental results verify the viability and effectiveness of the required deduction in minimum DClink voltage and the proposed adaptive DClink voltage controller in the threephase, fourwire shunt APF. Therefore, the proposed adaptive DClink voltage controller is an optimal solution for practical situations.
BIO
Yu Wang was born in Guangdong, China, in 1984. He received his BE in Electronic Information Engineering from Nanchang Hangkong University, Nanchang, China, in 2007. He received his ME in Detection Technology and Automation from Guangxi University, Nanning, China, in 2010. From 2010 to 2011, he was employed by TCL Corporation, China, as an electrical engineer. Since 2011, he has been enrolled at the School of Electric Power, South China University of Technology, Guangzhou, China, where he is currently working toward his PhD in Power Electronics. His current research interests include active power filters and control theory.
YunXiang Xie was born in Hunan, China, in 1965. He received his BS, MS, and PhD degrees in Electrical Engineering from Xi’an Jiaotong University, Xi’an, China, in 1985, 1988, and 1991, respectively. Since 1991, he has been employed as a fulltime professor at the School of Electric Power, South China University of Technology, Guangzhou, China. His research interests include active power filters, Vienna rectifiers, and matrix converters.
Xiang Liu was born in Hunan, China, in 1990. He received his BS degree in Electrical Engineering from Central South University, Changsha, China, in 2012. Since 2012, he has been enrolled at the School of Electric Power, South China University of Technology, Guangzhou, China, where he is currently working toward his ME in Power Electronics. His current research interests include active power filters and control theory.
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