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Reducing Common-Mode Voltage of Three-Phase VSIs using the Predictive Current Control Method based on Reference Voltage
Reducing Common-Mode Voltage of Three-Phase VSIs using the Predictive Current Control Method based on Reference Voltage
Journal of Power Electronics. 2015. May, 15(3): 712-720
Copyright © 2015, The Korean Institute Of Power Electronics
  • Received : October 23, 2014
  • Accepted : January 10, 2015
  • Published : May 20, 2015
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About the Authors
Sung-ki Mun
School of Electrical and Electronics Engineering, Chung-ang University, Seoul, Korea
Sangshin Kwak
School of Electrical and Electronics Engineering, Chung-ang University, Seoul, Korea
sskwak@cau.ac.kr

Abstract
A model predictive current control (MPCC) method that does not employ a cost function is proposed. The MPCC method can decrease common-mode voltages in loads fed by three-phase voltage-source inverters. Only non-zero-voltage vectors are considered as finite control elements to regulate load currents and decrease common-mode voltages. Furthermore, the three-phase future reference voltage vector is calculated on the basis of an inverse dynamics model, and the location of the one-step future voltage vector is determined at every sampling period. Given this location, a non-zero optimal future voltage vector is directly determined without repeatedly calculating the cost values obtained by each voltage vector through a cost function. Without utilizing the zero-voltage vectors, the proposed MPCC method can restrict the common-mode voltage within ± Vdc /6, whereas the common-mode voltages of the conventional MPCC method vary within ± Vdc /2. The performance of the proposed method with the reduced common-mode voltage and no cost function is evaluated in terms of the total harmonic distortions and current errors of the load currents. Simulation and experimental results are presented to verify the effectiveness of the proposed method operated without a cost function, which can reduce the common-mode voltage.
Keywords
I. INTRODUCTION
Load currents of voltage-source inverters (VSIs) are commonly controlled by a cascaded structure with proportional-integral (PI) controllers and distinct pulse-width modulation (PWM) blocks [1] , [2] . Common-mode voltages generated by fast switching operation in three-phase VSIs are also known to cause overvoltage stress on the winding insulation of drives and radiate electromagnetic interference noise, which can affect the functionality of other electronic systems in the vicinity [3] . Given that zero-voltage vectors lead to the highest common-mode voltage, studies on alleviating the common-mode voltage by avoiding the zero vectors in PWM blocks have been conducted [3] - [8] . Thus, PWM algorithms without zero vectors to reduce the common-mode voltage can be incorporated with PI current controllers to reduce the common-mode voltage and control the load currents. Model predictive current control (MPCC) method is a simple and effective current control technique for VSIs recently developed and used because of its simplicity without the need for any individual PWM blocks and its control flexibility [9] - [14] . MPCC predicts the seven possible future load-current patterns based on the load-current dynamics of the VSI by using the fundamental concept of the method, where only seven different voltage vectors can be applied to the loads by the VSI. All the predicted future load currents are calculated on the basis of the predefined cost function with error terms between the future reference current and the future load current to select an optimal voltage vector with the smallest cost function value. The switching algorithm with the model predictive current controller then applies an optimal switching state during the entire sampling period of the controller.
In this study, an MPCC method is proposed to reduce common-mode voltage in loads and regulate load currents without utilizing a cost function for three-phase VSIs. The conventional MPCC method generates the common-mode voltage that corresponds to ± Vdc /6 or ± Vdc /2 depending on the non-zero- or zero-voltage vectors selected as an optimal voltage vector. Only the non-zero-voltage vectors are employed in the proposed MPCC method to reduce the common-mode voltage and control the load currents. In addition, the proposed method develops a process for selecting a future optimal non-zero-voltage vector without employing a cost function. A future optimal non-zero-voltage vector is directly determined based on the location of the future reference voltage vector and the three-phase future reference voltage vector calculated by an inverse dynamics model. The proposed method can restrict the common-mode voltage within ± Vdc /6 without utilizing the zero-voltage vectors that result in the highest common-mode voltage. This paper presents the performance of the total harmonic distortions and current errors of the load currents of the proposed method and compares them with those of the conventional method. Simulation and experimental results are included to verify the effectiveness of the proposed MPCC method operated without a cost function to reduce the common-mode voltage.
II. PROPOSED MODEL PREDICTIVE CURRENT CONTROL METHOD BASED ON THE REFERENCE VOLTAGE TO REDUCE COMMON-MODE VOLTAGES
- A. Common-Mode Voltage in the Conventional MPCC Method
The MPCC method for the VSI considers the VSI capable of applying only a finite number of voltage vectors to loads, which leads to a finite number of possible changes in the load-current dynamics. According to the three-phase VSI with a diode rectifier shown in Fig. 1 (a), the output voltage vectors applied to the loads by the VSI can be expressed in the αβ frame as follows:
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where the vector a = e j (2 π /3) . The voltage vectors applied to the loads by the VSI include six non-zero-voltage vectors and two zero-voltage vectors, as shown in Fig. 1 (b) [9] , [10] . The switching states of all the switches take on the binary values “1” and “0” in the open and closed states respectively. The lower switches always have the complementary values of their upper switches. Given the redundancy of the two zero-voltage vectors that generate an equal output voltage vector, only seven voltage vectors are available in the finite control set of the three-phase VSI. The load current and back-electromotive force (back-emf) vectors can also be expressed as follows:
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(a) Three-phase VSI with a diode-rectifier front end. (b) Voltage vectors generated by the VSI.
The load-current dynamics in the space vector form are expressed in the αβ frame as follows using Eqs. (1)-(3):
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where R, L , and e are the load resistance, inductance, and back-emf vector, respectively. The derivative of the load current in the continuous-time domain model in Eq. (4) can be approximated on the basis of the forward Euler approximation with a sampling period Tsp as follows:
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The load-current dynamics can then be expressed in the discrete-time domain model as follows:
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The MPCC method is based on the concept that the seven possible future load currents can be predicted by the seven different voltage vectors of the VSI via the load-current dynamics in Eq. (6). Thus, the voltage vector vαβ ( k ), which takes on one of the seven voltage vectors generated by the VSI in Fig. 1 (b), determines the one-step future load current iαβ ( k + 1). A one-step delay compensation algorithm is included to compensate for the unavoidable control delay presented in practical controllers, where the two-step future load-current dynamics are used by shifting Eq. (6) one step forward as in [9] :
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The one-step future back-emf vector in Eq. (7) can be estimated by assuming that the one-step future back-emf vector is equal to the present back-emf vector. This condition occurs because the back-emf vector varies at a much lower frequency compared with the fast sampling frequency as follows:
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where
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is the estimated back-emf vector at the kth time step. The two-step future reference current can be obtained by Lagrange extrapolation as in [13] :
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Evaluating each predicted future load current using a predefined cost function results in the selection of one optimal voltage vector, which enables the future load current to track closest to the reference current, among seven available voltage vectors to minimize the errors between reference and actual currents. The cost function to measure errors between references and predicted load currents in orthogonal coordinates can be defined in terms of the current errors as follows:
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An optimal voltage vector among seven possible voltage vectors, including the zero-voltage vectors, is selected every sampling period. The switching state that corresponds to the selected optimal voltage vector at the next sampling period is generated by the VSI.
In the standard three-phase VSI with a diode-rectifier front end in Fig. 1 (a), the common-mode voltage is defined as the potential between the load neutral point and midpoint of the DC-link voltage of the VSI. The common-mode voltage can be expressed with the pole voltages with respect to the midpoint of the DC-link voltage as in [8] :
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The VSI only takes the pole voltages at the discrete voltage levels with ± Vdc /2; thus, the common-mode voltage generated by the VSI becomes ± Vdc /6 and ± Vdc /2, which depends on the voltage vectors applied to the VSI, as summarized in Table I .
VOLTAGE VECTORS AND COMMON-MODE VOLTAGES
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VOLTAGE VECTORS AND COMMON-MODE VOLTAGES
The two zero vectors V 0 and V 7 in the MPCC method result in identical output voltages, which lead to the same load-current dynamics. Thus, one of the two zero vectors can be used or both zero vectors can be alternatively employed when the zero vector is selected as an optimal vector by the cost function. Only one of the zero vectors between V 0 and V 7 can be utilized in the cost function to reduce the total number of control sets and alleviate the corresponding calculation complexity. Both zero vectors can also be alternatively employed to result in a balanced loss distribution of the switching devices in the VSI [13] . Thus, alternatively using V 0 and V 7 when the previous vector has two “0” values (i.e., V 1 ) and two “1” values (such as V 2 ) respectively in terms of the loss distribution and efficiency can be beneficial. The use of only V 0 or V 7 produces a common-mode voltage that varies between - Vdc /2 and Vdc /6 or between - Vdc /6 and Vdc /2 respectively. Therefore, the peak-to-peak magnitude of the common-mode voltage that employs only one zero vector is 2 Vdc /3. The common-mode voltage swings between - Vdc /2 and Vdc /2, and the peak-to-peak magnitude of the common-mode voltage becomes Vdc when both V 0 and V 7 are alternatively utilized. Therefore, the conventional MPCC method that utilizes both zero vectors increases the peak-to-peak magnitude of the common-mode voltage unlike the method that uses only one zero vector. Figs. 2 (a)-(c) show the experimental waveforms of the load currents and common-mode voltage for the MPCC method that utilizes only V 0 as a zero vector, only V 7 as a zero vector, and both V 0 and V 7 , respectively. Given that the two zero vectors lead to identical load-current dynamics, Fig. 2 generates the same load-current waveforms, whereas the different common-mode voltages are obtained depending on zero-vector utilization.
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Experimental waveforms of the load currents and common-mode voltage obtained by the conventional MPCC method using (a) V0, (b) V7, and (c) V0 and V7.
- B. Proposed MPCC Method based on the Reference Voltage for Reduced Common-Mode Voltage
Given that the zero-voltage vectors lead to the highest common-mode voltage that corresponds to ± Vdc /2, the proposed MPCC method realizes the current control algorithm with only six non-zero-voltage vectors to avoid utilizing the two zero-voltage vectors. Thus, the evaluation of only the six non-zero-voltage vectors based on the cost function with the absolute current error vector in Eq. (10) and the selection of an optimal non-zero vector can be utilized to achieve both reduced common-mode voltage and load-current controllability. This method is called the “active-vector-based MPCC method” in this paper. Although the active-vector-based MPCC method can decrease the common-mode voltage by considering only the non-zero-voltage vectors as a possible optimal candidate, it develops a simple algorithm to directly determine the selection of a future optimal non-zero-voltage vector at every sampling period without employing a cost function to evaluate all six non-zero vectors. Assuming that the one-step future load-current vector becomes equal to the one-step future reference current vector by applying the reference voltage vector, the load-current dynamics in Eq. (6) can then be expressed by an inverse dynamics model as in [15] :
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By shifting Eq. (12) one step into the future to apply the delay compensation technique, the one-step future reference voltage is obtained with the future reference current and future load-current vectors as follows:
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The cost function expressed with the current error terms in Eq. (10) can be replaced with the future reference voltage vector and available voltage vectors usable by the VSI on the basis of Eqs. (7), (10), and (13) as follows:
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where i = 1, 2, …, 6. Eq. (14) shows that a future optimal voltage vector is a non-zero-voltage vector, which is closest to the future reference voltage vector at every sampling period. Once the future reference voltage vector is calculated using Eq. (13), its location and a non-zero-voltage vector closest to the future reference vector can be immediately determined. As summarized in Table I , the proposed MPCC method utilizes a non-zero-voltage vector placed nearest the future reference voltage vector at every sampling period to restrict the common-mode voltage within ± Vdc /6. Fig. 3 shows six sectors divided in the complex space to directly select an optimal non-zero-voltage vector on the basis of the location of the future reference voltage vector; an optimal non-zero vector is Vi for a future reference voltage vector located in sector Si ( i = 1-6). Table II lists the sectors and corresponding voltage vector used in the sector.
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Six sectors of the proposed MPCC method.
SECTORS AND SELECTED FUTURE VOLTAGE VECTORS
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SECTORS AND SELECTED FUTURE VOLTAGE VECTORS
Thus, the proposed MPCC method can select a future optimal non-zero-voltage vector once the sector where the future reference voltage vector is located in is determined. The proposed method can be implemented with simplicity without repeatedly calculating the current errors generated by all six non-zero-voltage vectors. Fig. 4 shows the overall block diagram of the proposed MPCC method that employs no cost function and no zero vectors.
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Block diagram of the proposed MPCC method.
III. SIMULATION AND EXPERIMENTAL RESULTS
Figs. 5 and 6 show the simulation waveforms of the load currents and common-mode voltage of the conventional and proposed MPCC methods respectively with Tsp = 50 ms, Vdc = 100 V, an RLe load with R = 1.5 W, L = 15 mH, and e = 20 V. The load currents controlled by the proposed method accurately track the current reference, where the common-mode voltage vno limited to ± Vdc /6 is significantly smaller than that of the conventional method because of the non-utilization of zero vectors. Fig. 5 (a) shows that the conventional method produces a common-mode voltage that oscillates from Vdc /6 to - Vdc /2 because only V 0 is used in the control algorithm. The ripple components of the load currents in the proposed method are slightly higher than those observed in the conventional method, which is a penalty of the decreased common-mode voltage without employing the zero vectors. The frequency spectra of the load currents obtained from the proposed and conventional methods are shown in Figs. 5 and 6 , which show that the proposed method yields a slightly higher total harmonic distortion (THD). The simulated waveforms of the active-vector-based MPCC method, which selects an optimal non-zero-voltage vector based on the cost function in Eq. (10) by evaluating six possible future current vectors generated with the six non-zero vectors, are also included in Fig. 6 (a) under the same operating conditions for comparison. The waveforms of the load currents and common-mode voltage are exactly the same as those of the proposed method because the two methods select the same non-zero-voltage vectors at every sampling period.
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Simulation waveforms for the conventional method (I = 5 A). (a) Load currents (ia, ib, ic), a-phase reference current (ia*), and common-mode voltage (vno). (b) Frequency spectrum of the load current (ia).
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Simulation waveforms of the load currents (ia, ib, ic), a-phase reference current (ia*), common-mode voltage (vno), and frequency spectrum of the load current (ia) for the (a) active-vector-based MPCC method and (b) proposed method.
The dynamic responses of the proposed and conventional methods are shown in Fig. 7 . The three-phase load currents operated by the proposed method follow the change in the reference with fast dynamics, as observed in the conventional method for step changes in both frequency and magnitude.
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Simulation waveforms of the transient response with a magnitude step-change (from 3 A to 6 A) and frequency step-change (from 60 Hz to 80 Hz) obtained for the (a) conventional method and (b) proposed method.
The proposed method was tested using the prototype setup of a three-phase VSI with an Insulated Gate Bipolar Transistor module, where the entire switching algorithms with the current control methods were implemented on a Digital Signal Processor (DSP) board (TMS320F28335) to generate sinusoidal load currents with a 60 Hz fundamental output frequency. A practical consideration to compensate for the unavoidable calculation delay present in the DSP was also considered. Fig. 8 shows the experimental waveforms for the load currents, common-mode voltage, and frequency spectrum of the load current obtained for the proposed and conventional methods with Tsp = 50 ms and Vdc = 100 V. Similar to the simulated results, the load currents of the proposed method accurately track their reference currents. The common-mode voltage of the proposed method that utilizes the non-zero-voltage vector is also limited to ± Vdc /6, whereas the conventional method generates a common-mode voltage that varies between Vdc /6 and ˗ Vdc /2 because of the utilization of the zero-voltage vector V 0 .
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Experimental waveforms of the load currents (ia and ib), a-phase reference current (ia*), common-mode voltage (vno), and frequency spectrum of the load current (ia) for the (a) conventional method and (b) proposed method.
The dynamic responses of the proposed and conventional methods with the same experimental conditions are shown in Fig. 9 . The three-phase load currents for the proposed method follow the change in the reference currents with fast dynamics, as observed in the conventional MPC method for step changes in both magnitude and frequency.
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Experimental waveforms of the transient response with a magnitude step-change (from 3 A to 6 A) and frequency step-change (from 60 Hz to 80 Hz) obtained for the (a) conventional method and (b) proposed method.
The performance of the VSI operated with the proposed method is compared with that of the VSI operated with the conventional method in terms of the THDs and current errors of the load currents as a function of the sampling period. This approach was used because the performance of the model predictive control algorithm is largely dependent on the sampling frequency. The comparative results of the VSIs with the proposed and conventional methods are shown in Fig. 10 for a load-current magnitude of 5 A. The percent THD is defined as follows:
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where i x 1 and ixn are the fundamental and n th-harmonic components in the load current of phase x respectively. n was set to 8333 in this comparison. The percentage of the load-current error is defined as the absolute difference between the reference current and load current normalized to the respective root mean square value of the reference current in phase x as follows:
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where N was set to 10,000 per fundamental period. The percent THD and current errors observed in the proposed method to reduce the common-mode voltage are slightly higher than those in the conventional method because of the reduced voltage vector utilization.
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Comparative results of the proposed and conventional methods: (a) THD and (b) current error as a function of the sampling periods.
The effects of the RL model errors on the current errors and THD values of the load currents obtained from the proposed method are investigated and shown in Figs. 11 and 12 . The current errors and THD values are more affected by the load inductance than by the load resistance in the proposed method. In addition, the experimental results with the reduced inductance to 5 mH are shown in Fig. 13 . The common-mode voltage is still limited to ± Vdc /6 by the proposed method, although the current ripples and THD values are increased because of the reduced load inductance.
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Effect of model inductance errors on the (a) current errors and (b) THD values of load currents obtained from the proposed method.
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Effect of model resistance errors on the (a) current errors and (b) THD values of load currents obtained from the proposed method.
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Experimental waveforms of the proposed method with 5 mH inductance (a) load currents (ia, ib, ic), a-phase reference current (ia*), and common-mode voltage (vno), and (b) the frequency spectrum of the load current (ia).
IV. CONCLUSION
An MPCC method that operates without a cost function was proposed. This method can reduce the common-mode voltage for three-phase VSIs. The common-mode voltage generated by the VSI in the proposed MPCC method, restricted within ± Vdc /6, was significantly smaller than that of the conventional method because the proposed method utilized only non-zero voltage vectors. Furthermore, the proposed method developed a process of selecting a future optimal non-zero voltage vector without employing a cost function. On the basis of the three-phase future reference voltage vector calculated by an inverse dynamics model, an optimal non-zero voltage vector was directly determined on the basis of the location of the future reference voltage vector. As a result, the proposed method can find a future optimal non-zero voltage vector without evaluating all the non-zero vectors in terms of the future current errors based on the cost function at every sampling period, which can lead to simple implementation.
Acknowledgements
This research was supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIP) (2014R1A2A2A01006684) and the Chung-ang University Research Scholarship Grants in 2014.
BIO
Sung-ki Mun received the B. S. degree in electrical and electronics engineering from Chung-ang University, Seoul, Korea in 2014. Currently, he is working toward M.S degree in electrical and electronics engineering from Chung-ang University, Seoul, Korea. His research interests are control and analysis for multilevel inverters and voltage source inverters.
Sangshin Kwak (S’02-M’05) received the Ph.D. degree in electrical Engineering from Texas A&M University, College Station, Texas in 2005. He worked as a research engineer at LG Electronics, Changwon, Korea from 1999 to 2000. He was also with Whirlpool R&D Center, Benton Harbor, MI, in 2004. He worked as a senior engineer in Samsung SDI R&D Center, Yongin, Korea from 2005 to 2007. He worked as an assistant professor at Daegu University, Gyeongsan, Korea from 2007 to 2010. He has been with Chung-ang University, Seoul, Korea since 2010, and is currently an associate professor. His research interests are topology design, modeling, control, and analysis of AC/DC, DC/AC, AC/AC power converters, including resonant converters for adjustable speed drives and digital display drivers, as well as modern control theory applied to DSP-based power electronics.
References
Kazmierkowski M. P. , Krishnan R. , Blaabjerg F. 2002 Control in Power Electronics Academic New York
Mohan N. , Underland T. M. , Robbins W. P. 1995 Power Electronics 2nd Ed. Wiley New York
Duran M. , Riveros J. A. , Barrero F. , Guzman H. , Prieto J. 2012 “Reduction of common-mode voltage in five-phase induction motor drives using predictive control techniques,” IEEE Trans. Ind. Applicat. 48 (6) 2059 - 2067    DOI : 10.1109/TIA.2012.2226221
Kimball J. W. , Zawodniok M. 2011 “Reducing common-mode voltage in three-phase sine-triangle PWM with interleaved carriers,” IEEE Trans. Power Electron. 26 (8) 2229 - 2236    DOI : 10.1109/TPEL.2010.2092791
Chee S. , Ko S. , Kim H. , Sul S. 2014 “Common-mode voltage reduction of three level four leg PWM converter,” Transactions of Korean Institute of Power Electronics(KIPE) 19 (6) 488 - 493    DOI : 10.6113/TKPE.2014.19.6.488
Jung H. , Kim R. 2014 “Low frequency current reduction using a quasi-notch filter operated in two-stage DC-DC-AC grid-connected systems,” Transactions of Korean Institute of Power Electronics(KIPE) 19 (3) 276 - 282    DOI : 10.6113/TKPE.2014.19.3.276
Hava A. M. , Ün E. 2009 “Performance analysis of reduced common-mode voltage PWM methods and comparison with standard PWM methods for three-phase voltage-source inverters,” IEEE Trans. Power Electron. 24 (1) 241 - 252    DOI : 10.1109/TPEL.2008.2005719
Ün Emre , Hava Ahmet M. 2009 “A near-state PWM method with reduced switching losses and reduced common-mode voltage for three-phase voltage source inverters,” IEEE Trans. Ind. Applicat. 45 (2) 782 - 793    DOI : 10.1109/TIA.2009.2013580
Kouro S. , Cortes P. , Vargas R. , Ammann U. , Rodriguez J. 2009 “Model predictive control – a simple and powerful method to control power converters,” IEEE Trans. Ind. Electron. 56 (6) 1826 - 1838    DOI : 10.1109/TIE.2008.2008349
Kwak S. , Park J. 2015 “Predictive control method with future zero-sequence voltage to reduce switching losses in three-phase voltage source inverters,” IEEE Trans. Power Electron 30 (3) 1558 - 1566    DOI : 10.1109/TPEL.2014.2304719
Kwak S. , Yoo S. , Park J. 2014 “Finite control set predictive control based on lyapunov function for three-phase VSIs,” IET Power Electron. 7 (11) 2726 - 2732    DOI : 10.1049/iet-pel.2014.0044
Kwak S. , Moon U. , Park J. 2014 “Predictive-control-based direct power control with an adaptive parameter identification technique for improved AFE performance,” IEEE Trans. Power Electron. 29 (11) 6178 - 6187    DOI : 10.1109/TPEL.2014.2298041
Kwak S. , Park J. 2014 “Switching strategy based on model predictive control of VSI to obtain high efficiency and balanced loss distribution,” IEEE Trans. Power Electron. 29 (9) 4551 - 4567    DOI : 10.1109/TPEL.2013.2286407
Kwak S. , Park J. 2015 “Model predictive direct power control with vector preselection technique for highly efficient active rectifiers,” IEEE Trans. Ind. Informat. 11 (1) 44 - 52    DOI : 10.1109/TII.2014.2363761
Barros J. , Silva J. , Jesus E. 2013 “Fast-predictive optimal control of NPC multilevel converters,” IEEE Trans. Ind. Electron. 60 (2) 619 - 627    DOI : 10.1109/TIE.2012.2206352