This paper proposes the analysis and design of a DCside symmetrical zerocurrentswitching (ZCS) ClassD currentsource driven resonant rectifier to improve the low powerfactor and high line current harmonic distortion of lighting applications. An analysis of the junction capacitance effect of ClassD ZCS rectifier diodes, which has a significant impact on line current harmonic distortion, is discussed in this paper. The design procedure is based on the principle of the symmetrical ClassD ZCS rectifier, which ensures more accurate results and provides a more systematic and feasible analysis methodology. Improvement in the power quality is achieved by using the output characteristics of the DCside ClassD ZCS rectifier, which is inserted between the frontend bridgerectifier and the bulkfilter capacitor. By using this symmetrical topology, the conduction angle of the bridgerectifier diode current is increased and the low line harmonic distortion and powerfactor near unity were naturally achieved. The peak and ripple values of the line current are also reduced, which allows for a reduced filterinductor volume of the electromagnetic interference (EMI) filter. In addition, lowcost standardrecovery diodes can be employed as a bridgerectifier. The validity of the theoretical analysis is confirmed by simulation and experimental results.
I. INTRODUCTION
It is very well known that line current harmonic distortion causes several problems such as a voltage distortion, noise, heating that reduces efficiency, and reduced capacity of energy suppliers. In order to overcome these drawbacks, the need to comply with standards has forced the use of powerfactor correction (PFC) in power converters. The development of high powerfactor converters with minimized current total harmonics distortion (THD
_{i}
) for lighting applications such as the electronic ballasts for gasdischarge lamps
[1]

[18]
and the drivers for lightemitting diodes (LED)
[19]

[25]
have to meet the lighting standard regulations of the International Electrotechnical Commission (IEC) 6100032 ClassC limit for harmonic current emissions
[26]
.
Recently, the use of resonant rectifiers for the PFC of singlestage converters has become attractive, due to the advantages of resonantrectifier based PFC since a theoretical analysis can be used to provide a systematic, simple, and feasible solution. Examples of this are the zerovoltageswitching (ZVS) ACside ClassE currentsource driven rectifier for PFC (CECSRPFC)
[4]
, and the ZVS ACside ClassDE currentsource driven rectifier for PFC (CDECSRPFC)
[5]
,
[8]
. However, the main drawbacks of the previously proposed CECSRPFC and CDECSRPFC topologies are their low efficiency because they suffer from high current stresses in the power switches near the zerocrossing of the line voltage, and the fact that fast recovery diodes are required for the bridgerectifier. As a result, these ballast topologies are unattractive for lowcost commercial applications. A ZVS DCside asymmetrical CDECSRPFC has been proposed in
[9]
and standardrecovery diodes can be used as a bridgerectifier. The major problem with this technique is the high current stresses in the power switches, which results in low efficiency. Recently, a zerocurrentswitching DCside asymmetrical ClassD currentsource driven rectifier for PFC (CDCSRPFC) has been proposed in
[17]
and it has greatly reduced current stress. However, the main disadvantage of this topology is the use of a large electromagnetic interference (EMI) filter due to the large high frequency ripple current of the line current. Therefore, it is very attractive to explore a singlestage PFC converter for lighting applications that has low current stresses, high efficiency and low cost.
The objective of this paper is to introduce a new topology for a resonant rectifier for PFC, called a DCside symmetrical ZCS ClassD currentsource driven rectifier. The efficiency of this circuit is higher than that of the other singlestage topologies, because the zero value of the drivingcurrent near the zerocrossing of the line voltage can be obtained. The line current in the proposed symmetrical ClassD ZCS rectifier has twice the switching frequency when compared to the asymmetrical ClassD ZCS rectifier
[17]
, which allows the switching ripple current to be removed with a smaller EMI filter. In additional, standardrecovery diodes can be used as the bridge rectifier. Thus, the cost can be reduced.
This paper is organized as follows. Section II presents the basic concepts of the proposed topology. In Section III, a circuit description is provided. The operating principle is reported in Section IV. A design example of the proposed topology is presented in Section V. Section VI gives a conduction loss analysis of the CDCSRPFC. Simulation and experimental results to confirm the validity of the theoretical analysis and design procedure are presented in Section VII. Section VIII gives a discussion of the junctioncapacitance effect of the CDCSRPFC. Section IX gives some conclusions to summarize the merits of this paper.
II. PROPOSED TOPOLOGY
Various configurations for the DCside CDCSRPFC are shown in
Fig. 1
. The highfrequency currentsource to drive a symmetrical CDCSRPFC is supplied by the squarewave output voltage of the power converter through a matching network. Symmetrical CDCSRPFC networks can be inserted on the ACside, both the AC and DC side, or the DCside without any restrictions as depicted in
Fig. 1
(a)
1
(c), respectively. However, the symmetrical CDCSRPFC can employ lowcost standardrecovery diodes as a bridgerectifier due to the fact that the EMI filter is connected in cascade with the frontend bridgerectifier. Circuit diagrams of the symmetrical CDCSRPFCs, without considering the EMI filter, are depicted in
Fig. 2
(a)
2
(c). In order to simplify the analysis of the DCside symmetrical CDCSRPFC, the input voltage is considered only in a positive halfcycle and the following assumptions are made: Fundamentalcomponent approximation is used in the analysis of the rectifier with adequate accuracy.

1. The operation is steadystate with a constant switching frequency,fs, and two main switches are alternately ON and OFF with a duty cycle,D, that is nearly 0.5.

2. All of the switches and diodes are considered to be ideal.

3. The capacitance of the bulkfilter capacitor,CB, is large enough. Thus, the DCbus voltage,VB, can be regarded as a voltage source.

4. The lamp is regarded as an open circuit before ignition and as a resistive load,RLA, at the steadystate.
Circuit diagram of symmetrical CDCSRPFCs.
Family of symmetrical CDCSRPFCs.
III. CIRCUIT DESCRIPTION
Fig. 3
shows a conceptual diagram of a DCside symmetrical ClassD ZCS rectifier and an EMI filter. They are inserted between the frontend bridgerectifier and the bulkfilter capacitor to increase the conduction angle of the bridgerectifier diode current for obtaining a near unity powerfactor and low line current harmonics distortion. In addition, a part of the DCside ClassD ZCS rectifier performs the function of a pass device, in which the voltage difference,
v_{O}
=
V_{B}
｜
v_{in}
｜, dropped. Furthermore, it roughly matches the required basic characteristics for powerfactor correction.
Conceptual diagram of DCside CDCSRPFC for lighting applications.
The proposed ZCS CDCSRPFC displayed in
Fig. 2
(c), consists of standardrecovery bridgerectifier diodes,
D
_{1}
–
D
_{2}
–
D
_{3}
–
D
_{4}
, and fastrecovery diodes
D
_{D1}
and
D
_{D2}
, which are the DCside symmetrical CDCSRPFC. The inverter semistate, composed of two switches,
M
_{1}
and
M
_{2}
, is supplied by a bulkfilter capacitor,
C_{B}
, which is replaced by an ideal voltage source, since the DCbus voltage,
V_{B}
, across this capacitor is nearly constant. This results in constant lamp current amplitudes. The inverter is a ClassD ZVS resonant inverter, which has been presented in many studies
[1]
,
[27]
. A matching network,
L_{d}
–
C
_{d1}
–
C
_{d2}
, is fed by a highfrequency squarewave voltage source from the ClassD ZVS resonant inverter. The squarewave voltage is converted into a highfrequency current source to drive the DCside symmetrical CDCSRPFC by the matching network. Additionally, two capacitors,
C
_{d1}
and
C
_{d2}
, serve the functions of a filter capacitor and a coupling capacitor.
IV. PRINCIPLE OF THE TOPOLOGY
The operation principle of the DCside symmetrical ClassD ZCS rectifier in the PFC semistage is displayed by the equivalent circuit shown in
Fig. 4
. The line voltage is represented as
υ_{in}
=
V_{in}
sin
ω_{L}t
, where
ω_{L}
is the line angular frequency. The bridgerectifier output is a fullwave rectified sinusoidal voltage source ｜
υ_{in}
｜ =
V_{in}
｜sin
ω_{L}t
｜. The current waveform of the matching network that drives the DCside symmetrical CDCSRPFC is assumed to be a sine wave and is represented as
i_{d}
=
I_{d}
sin
ω_{s}t
, where
ω_{s}
is the switching angular frequency. The drivingcurrent,
i_{d}
=
i
_{d1}
=
i
_{d2}
, is forced by the symmetrical matching network,
L_{d}

C
_{d1}
–
C
_{d2}
, which is illustrated in
Fig. 2
(c). It is assumed that the switching frequency,
f_{s}
, is much higher than the line frequency,
f_{L}
.
Circuit derivation of PFC with DCside symmetrical ClassD ZCS rectifier during positive halfcycle of line voltage.
Therefore, during the positive halfcycle of the line voltage, the fullwave rectified sinusoidal voltage source,｜
υ_{in}
｜, appears as a short circuit in the AC component. As shown in
Fig. 4
(a), the first driving current,
i
_{d1}
, and the series capacitor,
C
_{d1}
; and the second driving current,
i
_{d2}
, and the series capacitor,
C
_{d2}
, can be connected in parallel with the diode,
D
_{D1}
, and the diode,
D
_{D2}
, respectively. In addition, the parallel connection of
D
_{D1}
with the series connection
C
_{d1}
,
i
_{d1}
; and the parallel connection of
D
_{D2}
with the series connection
C
_{d2}
,
i
_{d2}
are connected in series with the voltage source,｜
υ_{in}
｜. The sequence of these elements is interchangeable, as shown in
Fig. 4
(b). In this circuit, the DCbus voltage source,
V_{B}
, and the fullwave rectified sinusoidal voltage source,｜
υ_{in}
｜, are connected in series. Thus, these voltage sources can be combined into one voltage source,
υ_{O}
=
V_{B}
｜
υ_{in}
｜, as shown in
Fig. 4
(c). However, the output voltage of the ClassD ZCS rectifier is forced by the voltage source
υ_{O}
. This leads to a varying load resistance,
R_{O}
, for the ZCS ClassD rectifier. The equivalent circuit of the DCside symmetrical CDCSRPFC during the negative halfcycle of the line voltage is similar to the equivalent circuit during the positive halfcycle of the line voltage. Thus, the explanations are omitted.
The current alternatively flows through diodes
D
_{D1}
and
D
_{D2}
when each diode is ON, as shown in
Table I
. The diodes begin to turn off when their current reaches zero to reduce the turnoff switching loss. The key waveforms of the current and voltage in oneswitching cycle near the peak of the line voltage of the proposed circuit are illustrated in
Fig. 5
.
Figure 6
(a) shows a sinusoidal line voltage waveform in one line cycle.
Fig. 6
(b) show the fullwave rectified line voltage,｜
υ_{in}
｜, and the DCbus voltage,
V_{B}
, waveforms.
Figure 6
(c) shows the combined voltage,
V_{B}
｜
υ_{in}
｜, waveform. In these figures, if the instantaneous value of
υ_{in}
is positive and low, the output voltage of the ClassD ZCS rectifier,
V_{B}
｜
υ_{in}
｜, is high, and the rectifierdiode current is low. Thus, the average value of the rectifier diode current in one switching cycle is also low. Conversely, if the instantaneous value of
υ_{in}
is positive and high, the output of the ClassD ZCS rectifier,
V_{B}
｜
υ_{in}
｜, is low, and the rectifierdiode current is high. Thus, the average value of the diode current in one switching cycle is also high.
Fig. 6
(d) shows the drivingcurrent,
i_{d}
, which is forced by the symmetrical matching network,
L_{d}
–
C
_{d1}
–
C
_{d2}
. The inputcurrent waveform,
i_{in}
, which is the filtered average diode current of the symmetrical ClassD ZCS rectifier, is displayed in
Fig. 6
(e). This waveform shows that the line current in the symmetrical ClassD ZCS rectifier has twice the switching frequency, which allows the switching ripple current to be easily removed with a smaller EMI filter. For the negative halfcycle of the line voltage, one can be considered to be the same as with the positive halfcycle of the line voltage.
EQUIVALENT CIRCUIT OPERATION MODES IN ONE SWITCHING CYCLE OF SYMMETRICAL CDCSRPFC.
EQUIVALENT CIRCUIT OPERATION MODES IN ONE SWITCHING CYCLE OF SYMMETRICAL CDCSRPFC.
Key waveforms in one switching cycle of the ClassD ZCS rectifier.
Conceptual waveforms in one line cycle of CDCSRPFC.
Fig. 7
shows the circuit configuration of the new proposed singlestage electronic ballast with the DCside symmetrical ZCS CDCSRPFC. The principle of operation of the proposed circuit is illustrated by the equivalent circuit shown in
Fig. 8
. The input impedance of the ClassD ZCS rectifier is represented by an input resistor,
R_{i}
. The voltage transfer function,
M_{V}
,
[29]
of this circuit, when the total conversion efficiency is assumed to be equal to 1, can be described by:
where
ω_{r}
is the resonant frequency, and
Q
is the loaded quality factor of the matching network in the PFC stage. The range of
M_{V}
is from zero to 1. The equivalent circuit in
Fig. 8
(a) can be divided into two parts. A simplified circuit of the CDCSRPFC semistage and an equivalent circuit of the inverter semistage are illustrated in
Figs. 8
(b) and (c), respectively. The coupling capacitor,
C_{s}
, the resonant capacitor,
C_{r}
, and the lamp resistance,
R_{LA}
, of the ClassD ZVS resonant inverter are converted to a series
R_{s}
–
C_{rs}
circuit and the MOSFETs are modeled by switches with the onresistances,
r
_{DS1}
and
r
_{DS2}
. The resistances
r_{Ld}
and
r_{Lr}
represent the equivalent resistances of the inductors
L_{d}
and
L_{r}
, respectively. From
Fig. 8
(b), the minimum value of the load resistance,
R
_{O_min}
, occurs at the minimum output voltage,
υ
_{O_min}
, as does the maximum output current,
i
_{O_max}
, of the ClassD ZCS rectifier.
Circuit configuration of proposed topology for electronic ballast application.
Equivalent circuits of proposed highpowerfactor singlestage electronic ballast.
V. DESIGN OF THE PROPOSED TOPOLOGY
A design example is shown is this section to demonstrate the validity of the theoretical analysis. The proposed DCside symmetrical CDCSRPFC for electronic ballast applications can be divided into three parts: the PFC semistage, the ballast semistage and the EMI filter.
 A. Design of the PFC SemiStage
The electronic ballast was designed to handle a line rms voltage,
V_{irms}
, of 220 V and a line frequency,
f_{L}
, of 50 Hz. It was assumed that the total ballast efficiency,
η
, was equal to 0.93. The ballast drew the sine wave input line current. The input power of the proposed DCside symmetrical CDCSRPFC is determined by:
where
P_{out}
is the output power of the fluorescent lamp when operated at a high frequency. The amplitude of the ballast input line current is calculated from:
It is assumed that the ClassD ZCS rectifier is driven by an ideal highfrequency sinusoidal currentsource. When
I_{in}
=
I_{Omax}
, the magnitude of the highfrequency drivingcurrent at full load is:
The voltage ratio
V_{B}
/
V_{in}
= 1.1 was chosen due to it providing a good tradeoff between an appropriate value of the harmonic distortion of line current,
i_{in}
, and the voltage stress of the main switches,
υ_{DS}
; the amplitude of the line voltage
V_{in}
=
≈ 311 V; and the DCbus voltage
V_{B}
≈ 342 V. The input impedance of the ClassD ZCS rectifier at a full load,
R
_{i_min}
, is obtained by:
From
Fig. 8
(b), the value of the inductance,
L_{d}
, is given from:
The switching frequency,
f_{s}
, is 50 kHz. For a finite value of the capacitance
C_{d}
=
C
_{d1}
=
C
_{d2}
, an additional
L_{a}
can be added to
L_{d}
to compensate for the reactance of
C_{d}
= 100 nF. The value of the additional inductance is given by:
The total inductance,
L
_{d(total)}
, is expressed as:
To achieve a ripple voltage of less than 1%, the value of the bulkfilter capacitor is determined by:
The E6 standard value of 68 μF is selected for
C_{B}
.
 B. Design of the Ballast SemiStage
The ClassD ZVS resonant inverter shown in
Fig. 8
(c), was designed by using the design procedure defined elsewhere
[1]
,
[28]
. The switching frequency should be selected to be above the resonant frequency to ensure the ZVS condition. A 36W fluorescent lamp (TLD36W/856) from Philips is used in this design. At startup, the resonant circuit operates with a highquality factor that generates a high ignition voltage to strike the lamp. Because the lamp is high frequency driven, the steadystate lamp resistance is:
The relationship among the loadedquality factor,
Q_{L}
, of the inverter semistage, the DCbus voltage,
V_{B}
, and the rms lamp voltage,
V
_{LA(rms)}
, is described by:
The resonant inductor,
L_{r}
, is expressed as:
The resonant capacitor
C_{r}
is determined by:
The E6 standard value of 6.8 nF is selected for
C_{r}
. In order to simplify the design procedure, a close to parallel resonance was assumed. Therefore, the DCblocking capacitor,
C_{s}
, is selected to be a hundred times the resonant capacitor,
C_{r}
, so that
C_{s}
is 0.68 μF.
 C. Design of the EMI Filter
The design of the EMI filter in
Fig. 7
can be found elsewhere
[30]
. The line current of the CDCSRPFC consists of the highfrequency current components of the switching frequency,
f_{s}
. Thus, a second order lowpass filter is employed at the DCside of the bridgerectifier to filter these highfrequency current harmonics. The upper limit capacitance of the filter capacitor,
C
_{f_max}
, is calculated from:
where
f_{L}
is the line frequency. It was assumed that the displacement powerfactor, cos
θ
, was equal to 0.999. However, the filter capacitor,
C_{f}
, should be lower than
C
_{f_max}
. Thus, a value of 50 nF is selected for
C_{f}
and represented as
C_{f}
=
C
_{d1}
C
_{d2}
/ (
C
_{d1}
+
C
_{d2}
). Finally, the filter inductor,
L_{f}
, is determined by:
where
f_{c}
is the cutoff frequency, to ensure a low distortion, the cutoff frequency,
f_{c}
, should be at least ten times lower than the switching frequency,
f_{s}
.
VI. CONDUCTION LOSS ANALYSIS
The losses are generally divided into two parts: the conduction losses and the switching losses. However, the switching losses can be neglected, because the fastrecovery diodes,
D
_{D1}
and
D
_{D2}
, are turn off under ZCS and the power MOSFETs,
M
_{1}
and
M
_{2}
, are turned on under ZVS. Likewise, the conduction losses due to the parasitic resistance in the capacitors are very small. Therefore, their effects were neglected. The rms value of the resonant current in the ballast semistage,
I_{r,rms}
, is calculated from:
The power loss in each of the MOSFETs’ forward resistance,
r_{DS}
, can be obtained as:
The converter uses MOSFETs (STMicroelectronics IRF740), with onresistances,
r
_{DS}
, of 0.48 Ω. In case of the ZCSRPFC
[17]
, the envelope of the drivingcurrent is an AM waveform with a modulation index of
m
= 0.33. The result has shown that the current stresses of the power MOSFETs have been significantly reduced when compared to the previously reported CECSRPFC and CDECSRPFC topologies
[4]
,
[5]
,
[8]
,
[9]
. The bridge rectifier was built using standardrecovery diodes (Fairchild Semiconductor 1N4006) with a forward voltage drop of
V_{D}
= 0.82 V. The power loss in each of the bridge rectifier diodes,
D
_{1}
–
D
_{4}
, due to the forward voltage,
V_{D}
, is obtained as:
The DCside symmetrical CDCSRPFC was built using two fastrecovery diodes,
D
_{D1}
–
D
_{D2}
, (Fairchild Semiconductor UF4006) with a forward voltage drop of
V_{D}
= 1.08 V. The power loss in these fastrecovery diodes, due to the forward voltage,
V_{D}
, is:
The equivalent series resistance (ESR) of the filter inductor,
r_{Lf}
, is 1.432 Ω. Thus, the conduction loss in the filter inductor,
P_{rLf}
, can be obtained as:
The ESR of the series inductor,
r_{Ld}
, is 0.093 Ω. Thus, the conduction loss in the inductor,
P_{rLd}
, is obtained from:
The parasitic resistance of the resonant inductor,
r_{Lr}
, is 0.343 Ω. The conduction loss in the resonant inductor,
P_{rLr}
, is obtained by:
VII. SIMULATION AND EXPERIMENTAL RESULTS
The proposed electronic ballast with the DCside symmetrical CDCSRPFC topology was constructed using the component values obtained from the above analysis. Summaries of the circuit parameters and components are presented in
Table II
. The switching frequency,
f_{s}
, was fixed at 50 kHz. The line voltage was set to 220 V
_{rms}
, and the line frequency,
f_{L}
, was 50 Hz.
PARAMETERS OF POWER CIRCUIT
PARAMETERS OF POWER CIRCUIT
 A. Simulation Results
The proposed DCside symmetrical CDCSRPFC was simulated using PSpice to confirm the theoretical analysis. The simulation results of the input line current waveforms without the EMI filter of both the asymmetrical and the symmetrical CDCSRPFCs are shown in
Fig. 9
. These waveforms show that the input line current in the DCside symmetrical CDCSRPFC has half the peak value and twice the switching frequency when compared to the DCside asymmetrical CDCSRPFC. Therefore, the ripple current of the DCside symmetrical CDCSRPFC can be removed by a smaller EMI filter. This large line input current is the main drawback of the DCside asymmetrical CDCSRPFC.
Comparison of simulated waveforms of the input line current without EMI filter of asymmetrical and symmetrical CDCSRPFCs; bottom two waveforms are zoomedin views of top two waveforms.
Fig. 10
shows the simulated waveforms of the input line current and the driving current with and without the junctioncapacitance effect. As can be seen, there is distortion in the line current waveform close to the zero crossing. This distortion occurs because the driving current,
i_{d}
, cannot reach zero due to the junctioncapacitance effect of the ClassD ZCS rectifier diode. The waveform of the high frequency driving current,
i_{d}
, through the matching circuit is nearly a squarewave at the line’s zero crossing. The total harmonics distortion of
i_{in}
versus the ratio of the maximum and minimum values of
I_{d}
with variations of both the diode junction capacitance,
C_{j}
, and the switching frequency,
f_{s}
, are shown in
Fig. 11
and
12
, respectively. It can be seen that the total harmonics distortion of
i_{in}
depends on both the junction capacitance of the fastrecovery diodes used in the CDCSRPFC and the switching frequency. Therefore, the selections of the fastrecovery diode and switching frequency have a significant impact on the line current harmonic distortion. The analysis is given in Section VIII.
Comparison of simulated waveforms of input line current and driving current with and without junction capacitance effect; bottom two waveforms are zoomedin views of middle two waveforms.
Total harmonics distortion of i_{in} versus ratio of maximum and minimum of I_{d} and varied diode junction capacitance, C_{j}.
Total harmonics distortion of i_{in} versus ratio of maximum and minimum of I_{d} and varied switching frequency.
 B. Experimental Results
The measured line power was 36.4 W, while the input powerfactor was approximately 0.98 as shown in
Fig. 13
. In this figure, there is distortion in the line current waveform close to the zerocrossing which is the same as in the simulation results.
Measured waveforms of input line voltage and current.
The THD of the input line current THD
_{i}
was 20.6% as depicted in
Fig. 14
. However, all of the measured harmonic components still satisfy the IEC 6100032 ClassC standard.
Fig. 15
and
16
display the experimental waveforms of the diode current,
i
_{DD1}
, and the diode voltage,
υ
_{DD1}
, of the symmetrical CDCSRPFC near the peak and the zerocrossing of the line voltage, respectively. As expected, the current peak of the diode current decreased as the instantaneous line voltage decreased, which roughly matches the required waveforms shown in
Fig. 6
. The experimental waveforms of the drivingcurrent,
i_{d}
, at the noload condition near the zero crossing and at the fullload condition near the peak of the line voltage are illustrated
Fig. 17
. The zero value of the drivingcurrent near the zero crossing is obtained. The measured waveforms of the line voltage (Ch1), line current (Ch2), line power (Math1), lamp voltage (Ch3), lamp current (Ch4) and output power (Math2) are displayed in
Fig. 18
. The line power,
P_{in}
, was 36.5 W and the output power,
P_{out}
, was 34.2 W. The efficiency of the ballast was about 93.5%, indicating that a good efficiency can be obtained by using the proposed topology.
Measured THD of i_{in} from power analyzer.
Measured waveforms of υ_{DD1} and i_{DD1} near peak of line voltage; bottom two waveforms are zoomedin views of top two waveforms.
Measured waveforms of υ_{DD1} and i_{DD1} near zerocrossing of the line voltage; bottom two waveforms are zoomedin views of top two waveforms.
Measured waveform of drivingcurrent, i_{d}; lower waveform is a zoomedin view of top waveform near peak of line voltage.
Measured line voltage, line current, line power, lamp voltage, lamp current and lamp power waveforms.
VIII. DISCUSSION OF THE EFFECT OF THE PARASITIC CAPACITANCE OF THE CDCSRPFC
To obtain the low linecurrent harmonic distortion at the zerocrossing of the line voltage,
υ_{in}
, the line current,
i_{in}
, must equal to zero, which is the noload condition of the CDCSRPFC. In fact, the line current,
i_{in}
, and the driving current,
i_{d}
, cannot reach zero near the zerocrossing of
υ_{in}
because of the junction capacitance effect
[31]
of the fastrecovery diodes,
D
_{D1}
and
D
_{D2}
, of the ClassD rectifier as shown in
Fig. 19
(a). The junction capacitance is present in all of the reverse biased diodes because of the depletion region.
Equivalent circuit of PFC semistage with parasitic capacitance effect of ClassD ZCS rectifier diode.
Therefore, the junction capacitors,
C
_{j1}
and
C
_{j2}
, are modeled in parallel with the fastrecovery diodes,
D
_{D1}
and
D
_{D2}
. It can be seen that the input impedance of the CDCSRPFC cannot be modeled by a single equivalent input resistor,
R_{i}
. In the first simplified approach, the input impedance,
Z_{i}
, of the CDCSRPFC with the parasitic capacitance effect can be described by the parallel or series equivalent circuits
[31]
of the equivalent input resistor,
R_{i}
, with the equivalent input capacitor,
C_{i}
, and the input voltage is obtained from the squarewave output voltage of the ClassD inverter as shown in
Fig. 19
(b) and (c), respectively. From
Fig. 19
(b), it is well known that the voltage transfer function,
M_{V}
, of the ClassD LCC series resonant parallel load inverter is more than 1. The ratio
V_{d}
/
V
_{DS2}
versus
f_{s}
/
f_{r}
at various values of the quality factor
Q
is shown in
Fig. 20
. Therefore, near the zerocrossing of the line voltage,
υ_{in}
,
D
_{D1}
can conduct current due to the fact that the voltage at its anode is more positive than the voltage at its cathode. As a result, the driving current,
i_{d}
, cannot reach zero. Accordingly, the selection of the fastrecovery diode as the CDCSRPFC has a significant impact on the line current harmonic distortion. Diodes with a small
C_{j}
are preferred.
V_{d}/V_{DS2} versus f_{s}/f_{r} at varied values of Q.
IX. CONCLUSION
This paper has presented the analysis, design and implementation of the DCside symmetrical ZCSCDCSRPFC to improve the low powerfactor and the high line current harmonic distortion for singlestage electronic ballast applications. The proposed topology combines a PFC stage based on a ClassD ZCS rectifier and an inverter stage based on a ClassD ZVS inverter into a singlestage power converter, making this technique attractive for commercial applications. However, this topology is only suitable for low power applications.
The design procedure is based on the principle of the symmetrical ClassD ZCS rectifier. The analysis, design and experimental results show that the proposed DCside symmetrical ZCSCDCSRPFC for electronic ballast applications has the following characteristics:

1. It is easy to design for automatic line current shaping, due to the fact that only the fullload condition is considered near the peak of the line voltage. The proposed scheme also provides a more systematic and feasible analysis methodology.

2. The conduction angle of the bridgerectifier diode current was increased and a low line harmonic distortion and a powerfactor near unity were achieved naturally

3. Standardrecovery diodes can be used as the bridgerectifier and the cost can be reduced, since the EMI filter was connected in cascade with the frontend bridgerectifier. Therefore, the cost is reduced when compared with the topologies using fastrecovery diodes in the bridgerectifier.

4. The line current in the symmetrical CDCSRPFC has twice the switching frequency, which allows for the use of a smaller EMI filter when compared with asymmetrical topologies.

5. The efficiency of the proposed scheme was increased, because the current stresses in the power switches near the zerocrossing of the line voltage have been reduced when compared with the ZVS rectifier topologies.

6. The junction capacitanceCjof the ClassD ZCS rectifier diode has a significant impact on the line current harmonic distortion. Fastrecovery diodes with a smallCjare preferred.
The circuit operation was described and design equations were derived. A prototype designed for a T836W fluorescent lamp was built and tested to verify the theoretical analysis. The experimental results show that the singlestate electronic ballast with a DCside symmetrical CDCSRPFC had a 0.98 powerfactor, a 20.6% THD
_{i}
, which is below the limit according to the IEC 6100032 ClassC standard, and an efficiency of 93.5 %.
Acknowledgements
The author would like to thank King Mongkut's University of Technology North Bangkok (KMUTNB), Thailand, for financially supporting this research under Contract No. KMUTNBGEN5804.
BIO
Chainarin Ekkaravarodome received his B.S. degree in Industrial Electrical Technology from the King Mongkut’s Institute of Technology North Bangkok, Bangkok, Thailand, in 2003, and his M.S. and Ph.D. degrees in Electrical Engineering and Energy Technology from the KingMongkut’s University of Technology Thonburi, Bangkok, Thailand, in 2005 and 2009, respectively. He is presently an Assistant Professor with the Department of Instrumentation and Electronics Engineering, Faculty of Engineering, King Mongkut’s University of Technology North Bangkok. His current research interests include electronic ballasts, LED drivers, powerfactorcorrection circuits, resonant rectifiers, and softswitching power converters.
Phatiphat Thounthong received his B.S. and M.S. degrees in Electrical Engineering from the King Mongkut’s Institute of Technology North Bangkok, Bangkok, Thailand, in 1996 and 2001, respectively, and his Ph.D. degree in Electrical Engineering from the Institut National Polytechnique de Lorraine(INPL)Université de Lorraine, Nancy, France, in 2005. He is presently an Associate Professor with the Department of Teacher Training in Electrical Engineering, King Mongkut’s University of Technology North Bangkok. His current research interests include power electronics, electric drives, and electrical devices such as fuel cells, photovoltaics, wind turbines, batteries, and supercapacitors.
Kamon Jirasereeamornkul received his B.S. and M.S. degrees in Electrical Engineering, and his Ph.D. degree in Electrical and Computer Engineering from the King Mongkut’s University of Technology Thonburi, Bangkok, Thailand, in 1997, 2001, and 2006, respectively. He is presently an Assistant Professor with the Department of Electronic and Telecommunication Engineering, Faculty of Engineering, King Mongkut’s University of Technology Thonburi. His current research interests include electronic ballasts, highfrequency power converters, powerfactor correction circuits, and resonant rectifiers.
Kohji Higuchi received his Ph.D. degree from Hokkaido University, Sapporo, Japan, in 1981. In 1980 he joined the University of ElectroCommunications, Tokyo, Japan, as a Research Associate. He became an Assistant Professor, in 1982, and is presently an Associate Professor with the Department of Mechanical Engineering and Intelligent Systems, Electronic Control System Course. His current research interests include power electronics, control engineering and digital signal processing.
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