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LED Driver with TRIAC Dimming Control by Variable Switched Capacitance for Power Regulation
LED Driver with TRIAC Dimming Control by Variable Switched Capacitance for Power Regulation
Journal of Power Electronics. 2015. Mar, 15(2): 555-565
Copyright © 2015, The Korean Institute Of Power Electronics
  • Received : October 29, 2014
  • Accepted : December 16, 2014
  • Published : March 20, 2015
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About the Authors
Eun-Soo Lee
Department of Nuclear and Quantum Engineering, KAIST, Daejeon, Korea
Yeung-Hoon Sohn
Department of Electrical Engineering, KAIST, Daejeon, Korea
ctrim@kaist.ac.kr
Duy Tan Nguyen
Department of Nuclear and Quantum Engineering, KAIST, Daejeon, Korea
Jun-Pil Cheon
Department of Nuclear and Quantum Engineering, KAIST, Daejeon, Korea
Chun-Taek Rim
Department of Nuclear and Quantum Engineering, KAIST, Daejeon, Korea

Abstract
A TRIAC dimming LED driver that can control the brightness of LED arrays for a wide range of source voltage variations is proposed in this paper. Unlike conventional PWM LED drivers, the proposed LED driver adopts a TRIAC switch, which inherently guarantees zero current switching and has been proven to be quite reliable over its long lifetime. Unlike previous TRIAC type LED drivers, the proposed LED driver is composed of an LC input filter and a variable switched capacitance, which is modulated by the TRIAC turn-on timing. Thus, the LED power regulation and dimming control, which are done by a volume resistor in the same way as the conventional TRIAC dimmers, can be simultaneously performed by the TRIAC control circuit. Because the proposed LED driver has high efficiency and a long lifetime with a high power factor (PF) and low total harmonic distortion (THD) characteristics, it is quite adequate for industrial lighting applications such as streets, factories, parking garages, and emergency stairs. A simple step-down capacitive power supply circuit composed of passive components only is also proposed, which is quite useful for providing DC power from an AC source without a bulky and heavy transformer. A prototype 60 W LED driver was implemented by the proposed design procedure and verified by simulation and experimental results, where the efficiency, PF, and THD are 92%, 0.94, and 6.3%, respectively. The LED power variation is well mitigated to below ± 2% for 190 V < Vs < 250 V by using the proposed simple control circuit.
Keywords
I. INTRODUCTION
Light emitting diodes (LEDs) are gradually replacing conventional fluorescent lamps and incandescent lights due to their higher efficacy and longer lifespans [1] - [8] . LED drivers provide regulated or controlled currents to LEDs for constant lighting or dimming, regardless of source voltage changes and temperature variations. Switch mode power supply (SMPS)-type LED drivers with pulse width modulation (PWM) switching, in the hundreds of kHz range, are widely used due to their compact filter size and fair total harmonic distortion (THD) characteristics. However, the SMPS-type LED drivers suffer from large switching losses and shorter lifespans than the LED itself due to the high junction temperature of the main switches [9] - [20] . As an alternative solution, passive-type LED drivers are preferred due to their very high efficiency and extremely long lifespan [21] - [24] . However, the inherent drawbacks of the passive-type LED drivers include their lack of current regulation capability and a relatively large filter size, where this filter size problem can be mitigated by virtue of a reduced heat sink and a compact coil design. Therefore, the passive-type LED drivers may not be a good solution for the applications requiring a constant LED current regardless of source voltage variations.
LED dimming is widely used. It is generally achieved with by PWM switches [25] - [28] or TRIAC switches [29] - [32] . LED dimmers composed of a TRIAC and a DIAC with a variable resistor [29] - [32] have many merits such as a simple structure, high reliability, low cost, and high efficiency. However, these conventional TRIAC dimming LED drivers generally have poor THD characteristics because they are directly connected to the primary side of the source line. Though their power factor (PF) can be mitigated by using appropriate power converters [29] - [31] , this type of dimmer is not adequate for high power LED applications due to THD and PF problems.
In this paper, a novel TRIAC dimming LED driver with a passive input filter is proposed, as shown in Fig. 1 . This LED driver is based on the LC 3 passive-type LED driver configuration [24] to achieve a high efficiency and an extremely long lifespan. A dynamically variable switched capacitance is adopted to modulate the TRIAC turn-on timing so that the LED power can be controlled. Unlike the SMPS-type LED drivers, the proposed LED driver uses a TRIAC, which is a proven and quite robust device in home appliances, that inherently guarantees zero current switching (ZCS) with no additional circuits. The LED dimming is done by a volume resistor, which is similar to conventional manual TRIAC dimmers [29] - [32] . The validity of the proposed LED driver design is verified by simulation and experimental results. They show a successful regulation of LED power, and meet PF and THD standards over a wide range of source voltages.
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Overall circuit diagram of the proposed TRIAC dimming LED driver.
II. ANALYSIS OF THE PROPOSED TRIAC DIMMING LED DRIVER
- A. Operating Principle of the Main Power Circuit in the Steady State
The power circuit of the proposed LED driver, as shown in Fig. 1 , is derived from the temperature-robust LC 3 LED driver [24] , which is a novel passive-type LED driver, that satisfies PF and THD regulations. In order to provide the power control function with the LED driver, a TRIAC switch with a DIAC is inserted in series with C 4 to vary the connecting time portion, which results in a variation of the equivalent capacitance, unlike with conventional variable capacitances [33] - [36] . An additional inductor L 2 is newly introduced in the proposed LED driver to prevent the TRIAC from having a large inrush current when it is turned on. Note that ns and np are the numbers of LEDs in series and parallel, respectively. In this paper, all of the circuit components are assumed to be ideal unless otherwise specified.
As shown in Fig. 2 (a), the simplified equivalent main power circuit of the proposed LED driver can be obtained by regarding the switched capacitor circuit of C 4 and the TRIAC as an equivalent variable capacitor Cv and by simplifying the diode rectifier and DC load circuit as an equivalent resistor [23] - [24] , [37] - [38] as follows:
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where α is the DC to AC voltage conversion ratio when a bridge diode is converted to an equivalent auto-transformer [39] - [42] .
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A simplified static circuit of the proposed LED driver, neglecting harmonic components. (a) Simplified equivalent circuit of the proposed LED driver. (b) Further simplified circuit of (a).
In this section, the high-order switching harmonics are neglected from discussions and only the fundamental components of the voltages and currents are considered for simplification.
By applying Thevenin’s theorem to the left part of the circuit in Fig. 2 (a) in the steady state at the source angular frequency ωs , the proposed LED circuit can be converted to hat shown in Fig. 2 (b), since C 1 and C 2 are small. Thus, Ve and Le are found as follows:
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Therefore, the DC voltage gain GV , which is the ratio of the output voltage Vo and the source voltage Vs , is then determined as follows:
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As identified from (3), GV increases when Cv increases as long as the source angular frequency ωs is less than the resonant angular frequency ωr , which is exactly the case of the proposed design, i.e.:
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The LED dissipating power, which is proportional to Vo , can be accordingly controlled by changing Cv , as shown in Fig. 3 .
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The LED power regulation principle by variable switched capacitance.
- B. Operating Principle of the TRIAC Dimmer in the Transient State
The method for changing the capacitance Cv by the proposed TRIAC dimmer, as shown in Fig. 1 , is explained in this section.
When the TRIAC is completely turned off, as shown in Fig. 4 (a), there is no capacitance, assuming the loading effect of R 1 - C 5 is negligible. As a result, Cv = 0. When the TRIAC is completely turned on, as shown in Fig. 4 (b), the capacitance becomes Cv = C 4 . If the TRIAC is appropriately turned on with a delay time of Tc for every half cycle of the power source Ts , as shown in Fig. 5 , the equivalent capacitance Cv can be varied as follows:
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Dynamic circuits of the proposed LED driver for a positive half cycle of the vs, assuming the vL is constant due to a large load capacitor. (a) The TRIAC is turned off. (b) The TRIAC is turned on.
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Waveforms of the TRIAC dimmer.
Unfortunately, it is not possible to find an analytical expression of Cv for an arbitrary control time of Tc . This is due to difficulties in finding the dynamics of the fourth-order power circuit. Therefore, the dynamic characteristics and the DC gain of (3) are simulated for each Tc in the subsequent section. Instead, the method for changing the value of Tc is suggested in this section.
TRIAC-Off Mode [t1, t2]: As shown in Fig. 4 (a), the DIAC control input voltage v 5 is charged, when the TRIAC is turned off, as follows:
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In (6), it is assumed that the LED voltage and capacitor voltage are unchanged, i.e. vo = vL = VL and v 4 = - VL , respectively. As a result, the TRIAC voltage is determined as vT = vo v 4 VL – (- VL ) = 2 VL . Moreover, v 4 is nearly constant because R 1 is set to be as high as several MΩ. The DIAC triggering voltage VD is set to be 32 V in this paper, which is much less than VL ≈ 210 V. The capacitor voltage v 4 has been determined by the previous switching stage, which will be explained in the next few paragraphs.
TRIAC-On Mode [t2, t3]: As v 5 reaches VD , the DIAC and TRIAC are turned on, and C 5 is immediately discharged so that v 5 becomes zero, as shown in Fig. 4 (b). At the same time, the capacitor voltage of C 4 is resonated with L 2 and other filter elements, and its voltage v 4 is increased from - VL at t = t 2 to VL at t = t 3 , as shown in Fig. 5 . Note that v 4 is kept constant until the TRIAC is turned on again at the next negative polarity of source voltage. As soon as v 4 reaches VL , the TRIAC is turned off because the time derivative of the capacitor voltage is eventually zero, i.e.,
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Therefore, the TRIAC is kept turned off during [ t 3 , t 6 ], where its voltage becomes negative at t = t 5 due to a reversed turning on of the full bridge diode.
The control time Tc , as shown in Fig. 5 , can be derived from (6), assuming ic = Ic for a half cycle, as follows:
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From (7), Tc can be normalized by R 1 C 5 , as follows:
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As shown in Fig. 6 , β , which is proportional to Tc , can be controlled by either the manual dimming volume resistor R 1 or the control current Ic so that the LED power can eventually be varied.
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An example of theoretical normalized control time Tc /(R1 C5) w.r.t. Ic for various R1 when VD =32 V and VL = 210 V.
- C. Operating Principle of the Control Circuit
In order to feed an appropriate Ic of (8) against variations in the LED voltage VL , a control circuit is introduced, as shown in Fig. 7 , where the input and output of the proposed circuit are connected to vo and v 5 of Fig. 1 , respectively.
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Proposed control circuit for LED power regulation.
The proposed control circuit is composed of a negative peak detector for detecting the envelope of the load voltage, a low pass filter for eliminating harmonic voltage ripples higher than the source frequency of 50 Hz or 60 Hz, an integrator to accumulate the control error signals, and a current mirror for converting the control voltage vc to the control current ic .
As shown in Fig. 5 , vo and v 5 alternatively change every half cycle. Therefore, it is not feasible to derive a transfer function from the proposed control circuit as it is. Instead, the envelope behavior of vo and v 5 is considered in this section.
The resistors R 6 and R 7 constitute a mathematical comparator as follows:
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where the constant DC supply voltage Vcc is used to generate the reference voltage Vref . In (9b), a non-linear negative peak detector is approximated to a rectifier for the envelope of each peak voltage
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.
The low pass filter and integrator have the following transfer functions, respectively:
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where a positive offset current is provided through R 5 in the low pass filter because the negative peak detector is a current sink.
The current mirror provides the control current Ic of (8), regardless of the polarity, in proportion to vc as follows:
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where Vγ and Vσ are the cut-in voltage (≅ 0.6 V) and saturation voltage (≅ 0.2 V) of a bipolar junction transistor, respectively.
As can be seen from (11a) and (11b), the current mirror operates nearly symmetrically w.r.t. v 5 , which is essential for symmetrical control of each half cycle. In (11e), the DC offset term of (11d) is omitted from the transfer function of Ic ( s ) of (8) because this offset is relatively small and can be cancelled by the integrator. Therefore, only the change of the mirror current im is considered.
As shown in Fig. 8 , the overall closed-loop transfer function of the proposed TRIAC dimming LED driver can be found from (9)-(11) as follows:
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Overall block diagram of the proposed TRIAC dimming LED driver including the control circuit.
In (12), the LED system transfer function Gp ( s ) has a negative gain as identified from (3) and (8). In other words, Tc increases as Ic increases, which results in decreases of Cv and Vo . The LED voltage VL , which is the final control goal, is indirectly controlled by Vo (≅ αVL ) from (12).
In many cases, the power regulation of LED drivers is not necessarily very fast. Thus, the proposed control circuit is designed to be slow enough so that it can be quite robust to switching noise and disturbances. Then, assuming that the low pass filter and LED system are fast enough when compared to the integrator, the loop gain of (12a) becomes as follows:
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As identified from (13c), the proposed LED driver is always stable and its first-order time constant can be adjusted by the control gain.
III. DESIGN OF THE PROPOSED TRIAC DIMMING LED DRIVER
- A. Main Circuit
As shown in Fig. 1 , the proposed LED driver includes a passive-type LC 3 LED driver [24] ; hence, the main power circuit parameters for 60 W of power were chosen in a similar way to those of the references [24] , as listed in the Table I .
CIRCUIT PARAMETERS OF THE PROPOSED MAIN POWER CIRCUIT
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CIRCUIT PARAMETERS OF THE PROPOSED MAIN POWER CIRCUIT
Concerning the TRIAC dimmer in Fig. 1 , a small value of C 5 and a large value of R 1 are highly recommended for reducing the capacitor size and power loss in R 1 . Thus, C 5 and R 1 are chosen as 10 n F and 1.0 ~ 3.0 MΩ, respectively. The worst case power dissipation in R 1 is roughly (2 VL ) 2 / R 1 ≅ (2·210) 2 / 1M ≅ 176.4 m W, which is well below 1/4 W. The value of C 4 is selected as 1.0 μ F, considering the range of variable switched capacitance. The breakover voltage VD of the DIAC is selected as 32 V, considering the commercial availability of the DIAC.
To confirm LED dimming by a volume resistor R 1 , a PSIM simulation was performed, as shown in Fig. 9 . As R 1 increases, Tc increases according to (7), and Cv decreases, which results in a decrease of the LED power, as shown in Fig. 9 . In this way, LED dimming by a volume resistor can be achievable for a wide range of source voltages, like a conventional dimming lamp. For a constant LED power PL = 60 W, R 1 should be appropriately varied between 1.0 and 3.0 MΩ for a source voltage of 190 V < Vs < 250 V, which is a ± 30 V variation of the rated source voltage of 220 V. For a constant source voltage of Vs = 220 V, the LED power can be varied from 40 W to 80 W.
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Simulation results of the LED power w.r.t. R1 for various Vs.
- B. Control Circuit
To sense the envelope of each peak voltage
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, as shown in Fig. 7 , a large value for R 6 is recommended for reducing the power loss in the resistor; hence, R 6 is set to 4.7 MΩ so that the worst case power dissipation in R 6 can be roughly 10 m W. In other words,
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which is much lower than 1/4 W. In the steady state, the v f 2 of (9b) should be zero, assuming that R 5 is large enough, so that the input voltage of the integrator can be zero. Thus, for a given VL that is determined from [24] , R 7 is calculated as 336 k Ω, as follows:
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Harmonic voltage components higher than the third harmonic of the source frequency fs are assumed to be eliminated by the low pass filter. In other words, the time constant of the low pass filter, R 4 C 7 is approximately 1 m s, which results in the selection of R 4 = 10 kΩ and C 7 = 0.1 µ F. For Vcc = 15V, R 5 is selected as 2.0 MΩ to provide a positive offset current of about 7.5 µ A, which is a requisite for maintaining the non-negative polarity of v f 3
In the current mirror of Fig. 7 , the maximum value for I 1 of Fig. 1 is calculated as 0.42 m A from (6) when R 1 = 1.0 MΩ and
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As can be seen from Fig. 9 , the maximum value of R 1 for 190 V < Vs < 250 V is 2.9 MΩ, which corresponds to almost a third of I 1 , i.e. 0.14 m A; hence, the maximum control current Ic,max = Im,max becomes 0.28 m A to give this current difference. Then, R 2 is approximately calculated from (11d) as 43.2 k Ω, where Vγ = 0.7 V and the maximum value of vc is 13.5 V.
Finally, the integrator is designed, where the time constant of this integrator R 3 C 6 can be determined from (13c). From (9a), K is calculated to be 0.0667, and the system gain G p 0 is experimentally determined to be 2.3 × 10 5 . Therefore, R 3 C 6 becomes 14 m s, and the values of R 3 and C 6 are selected as 300 k Ω and 47 n F, respectively, considering a sufficiently slow response time of 400 m s.
- C. DC Power Supply
To provide the control circuit with supply voltages of Vcc and - Vcc , a new DC power supply circuit is introduced, as shown in Fig. 10 . Because the source voltage is very high when compared to the DC supply voltage, a new capacitive voltage divider of C 8 and C 9 is used. This simple circuit constitutes a step-down capacitive transformer, which may be replaced with a conventional inductive transformer and provides a galvanic isolation from the source voltage. In this paper, it is assumed that Vcc and - Vcc are symmetrical. In other words, C 10 = C 11 , and the zenor diode voltage Vz is the same.
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Proposed capacitive transformer type DC power supply. (a) Original circuit. (b) Thevenin’s equivalent circuit.
By applying Thevenin’s theorem to Fig. 10 (a), an equivalent circuit is obtained, as shown in Fig. 10 (b), where the parameters are determined as follows:
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The analysis of Fig. 10 (b) is straightforward if the input current of a half cycle is found for a given Vz . This analysis is already available [43] - [44] , assuming that C 10 >> Cth and that the full bridge rectifier circuit is replaced with the proposed positive and negative rectifiers. Then, the average current of the positive DC side power supply Ip becomes as follows, neglecting the diode forward voltage drop [44] - [45] :
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In (16), I p 0 corresponds to the shorted load circuit where Vz = 0, and V p 0 corresponds to an open load circuit where Ip = 0.
As can be seen from Fig. 11 , the average DC current Ip varies as the source voltage changes for Vs = 190 V, 220 V, and 250 V, respectively. When Vs = 190 V, for a given Vz = Vcc = 15 V, Ip becomes its minimum value Iop,min , which should be larger than the required load current of the positive power supply Ip,req . Meanwhile, when Vs = 250 V, Ip becomes its maximum Iop,max , which means that the zenor diode current, which is the difference between Ip and the required load current, becomes large. Because the zenor diode current should be neither zero nor too large, the operating voltage Vop and the operating current Iop are chosen to be half of V p 0 and I p 0 at the normal source voltage of Vs,norm = 220 V, as follows:
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The Vz - Ip curve of the proposed DC power supply circuit.
On the other hand, the minimum DC current Iop,min at the minimum source voltage of Vs,min = 190 V should always be larger than the required load current Ip,req , as follows:
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In this paper, the required DC power is identified as Vop = Ccc = 15 V and Ip,req = 1.5 m A at fs = 60 Hz; hence, V p 0 is selected as 30 V. From (17)-(18), C 8 and C 9 are calculated as 0.099 µ F and 0.932 µ F, respectively. Hence, C 8 and C 9 are selected as 0.1 µ F and 1.0 µ F, considering commercial product availability. To filter out the ripple in the supply voltage Vcc , both C 10 and C 11 are selected as 10 µ F, which is about ten times greater than Cth .
The design parameters of the proposed control circuit and DC power circuit are summarized in Table II .
CIRCUIT PARAMETERS OF THE PROPOSED CONTROL CIRCUIT AND DC POWER SUPPLY
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CIRCUIT PARAMETERS OF THE PROPOSED CONTROL CIRCUIT AND DC POWER SUPPLY
IV. EXPERIMENTAL VERIFICATIONS
As shown in Fig. 12 , a prototype of the proposed LED driver was fabricated in accordance with the proposed design procedure, as listed in Tables I and II . The core material in the two inductors L 1 and L 2 of Fig. 12 was silicon steel plate core, and the internal resistance of the fabricated inductors was measured as 7 Ω. Because the proposed LED driver can be used for high LED power applications whose power level is as high as 60 ~ 100 W, two slightly large inductors are of no practical concern due to the large accommodation space of industrial lighting applications. These applications generally require high efficiency and a long lifespan for an LED driver.
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A prototype of the proposed LED driver with two inductors L1 and L2 and an LED array.
- A. LED Dimming
As shown in Fig. 13 , the LED dimming of the proposed LED driver without a control circuit is experimentally verified. It is well matched with the simulation results of Fig. 9 . Slight discrepancies between the experimental and simulation results come mainly from the internal resistances of L 1 and L 2 . The value of PL can be set appropriately by modulating the volume resistor R 1 . For instance, PL can be changed from 76 W to 40 W at Vs = 220 V, where over 2.7 MΩ of R 1 cannot be used for the LED dimming range because v 5 in Fig. 5 cannot reach VD within the control time Tc .
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Experimental results of LED power with respect to R1 for various Vs.
As can be seen from Fig. 13 , R 1 was selected to satisfy PL = 60 W: R 1 = 0.75 MΩ, 1.63 MΩ, and 2.4 MΩ for Vs = 190 V, 220 V, and 250 V, respectively. Based on these values, the experimental waveforms of vs , vo , v 4 , and v 5 were measured, as shown in Fig. 14 , where Tc increased as Vs increased, as anticipated from Fig. 5 .
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The experimental waveforms of vs, vo, v4, and v5 for Vs = 190 V, 220 V, and 250 V at fs = 60 Hz. (a) Vs = 190 V: R1 = 0.75 MΩ. (b) Vs = 220 V: R1 = 1.63 MΩ. (c) Vs = 250 V: R1 = 2.4 MΩ.
- B. LED Power Regulation
As shown in Fig. 15 , the experimental waveforms of v 5 , vc , iL , and vL were measured to verify the LED power regulation by the proposed control circuit. When Vs = 190 V, Vc became -15.0 V, which is the minimum value of vc . However, when Vs > 190 V, the LED power regulation began, which is identified by vc > 0. For instance, vc = 8.5 V for Vs = 220 V, and vc = 12.3 V for Vw = 250 V. In this way, PL was found to be well regulated for 190 V < Vs < 250 V by the proposed control circuit. The time constant of the control circuit was measured as 0.4 s, as shown in Figs. 15 (e) and (f), which can be varied, as can be seen from (13c).
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The experimental waveforms of v5, vc, iL, and vL for Vs = 190 V, 220 V, and 250 V at fs = 60 Hz. (a) Vs = 190 V: time scale = 5 ms. (b) Vs = 220 V: time scale = 5 ms. (c) Vs = 250 V: time scale = 5 ms. (d) Vs = 190 V: time scale = 1 s. (e) Vs = 220 V: time scale = 1 s. (f) Vs = 250 V: time scale = 1 s.
The LED power and total efficiency of the proposed LED driver were also measured, as shown in Fig. 16 (a), where the maximum LED power variation was well mitigated to within ± 2% and the maximum efficiency was between 93.3% and 91.1% for 190 V < Vs < 250 V. This power variation, ± 2%, of the proposed LED driver is quite negligible in practice. As shown in Fig. 16 (b), the measured results of the PF and THD satisfy the global standards for 190 V < Vs < 250 V [45] - [46] . Furthermore, all of the harmonics of the source current is satisfy the IEC61000-3-2 class C standard, as shown in Fig. 17. The measurement results for each Vs are summarized in Table III .
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Experimental results of the PL, η, PF, and THD w.r.t. the Vs at fs = 60 Hz. (a) The LED power PL and efficiency η. (b) The PF and THD.
MEASURED RESULTS FOR SOURCE VOLTAGE VARIATION (190 V
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MEASURED RESULTS FOR SOURCE VOLTAGE VARIATION (190 V < VS < 250 V)
V. CONCLUSION
The proposed TRIAC dimming LED driver by variable switched capacitance has been verified for 60 W LED applications. The LED power can be successfully regulated to within ± 2% for a wide range of 190 V < Vs < 250 V. The measured THD, PF, and power efficiency were 6.3%, 0.94, and 92.3% at Vs = 220 V, respectively. The temperature increase of the LED driver was merely 6℃. With this novel TRIAC dimming LED driver, high efficiency and a long lifespan were achieved, since these are inherent merits of passive-type LED drivers. In addition, LED dimming and LED power regulation were successfully realized. Thus, the proposed LED driver is expected to be utilized in industrial lighting applications such as streets, factories, parking garages, and emergency stairs.
Acknowledgements
This work was supported by a Korea Micro Energy Grid (K-MEG) of the Korea institute of Energy Technology Evaluation and Planning (KETEP) grant funded by the Korean government Ministry of Trade, Industry and Energy (MOTIE). (No. 2011T100100024).
BIO
Eun-Soo Lee was born in Korea, in 1986. He received his B.S. degree in Electrical Engineering from Inha University, Incheon, Korea, in 2012, and his M.S. degree in Nuclear and Quantum Engineering from the Korea Advanced Institute of Science and Technology (KAIST), Daejeon, Korea, in 2014. Since 2014, he has been working toward his Ph.D. degree at KAIST. He has developed LED drivers and wireless power transfer systems. His current research interests include power converters, wireless power transfer systems, and LED drivers.
Yeung-Hoon Sohn was born in Korea, in 1990. He received his B.S. and M.S. degrees in Electrical Engineering from the Korea Advanced Institute of Science and Technology (KAIST), Daejeon, Korea, in 2012 and 2014, respectively. Since 2014, he has been working toward his Ph.D. degree at KAIST. He has developed DC-AC converters for plasma discharge and wireless power transfer systems. His current research interests include DC-AC converters for plasma discharge, wireless power transfer systems, and analog circuit design.
Duy Tan Nguyen was born in Vietnam, in 1987. He received his B.S. degree in Electrical Engineering from the Ho Chi Minh City University of Technology, Ho Chi Minh City, Vietnam, in 2010. Since 2013, he has been working toward his M.S. degree in Nuclear and Quantum Engineering from the Korea Advanced Institute of Science and Technology (KAIST), Daejeon, Korea. From 2010 to 2011, he was an Embedded Automobile Software Engineer at Gate Technology, Ho Chi Minh City, Vietnam. From 2011 to 2013, he was an Embedded Engineer at Koda System, Hanam, Korea, where he conducted research on power measurement instruments.His current research interests include power converters, inverters, wireless power transfer systems, and LED drivers.
Jun-Pil Cheon was born in Korea, in 1987. He received his B.S. degree in Electrical Engineering from Kwangwoon University, Seoul, Korea, in 2013, and his M.S. degree in Nuclear and Quantum Engineering from the Korea Advanced Institute of Science and Technology (KAIST), Daejeon, Korea, in 2015. He has developed LED drivers and wireless power transfer systems. His current research interests include power converters, wireless power transfer systems, and LED drivers.
Chun-Taek Rim (M’90–SM’11) was born in Korea, in 1963. He received his B.S. degree in Electrical Engineering from the Kumoh National Institute of Technology (KIT), Gumi, Korea, in 1985, and his M.S. and Ph.D. degrees in Electrical Engineering from the Korea Advanced Institute of Technology (KAIST), Daejeon, Korea, in 1987 and 1990, respectively. Since 2007, he has been an Associate Professor of Nuclear and Quantum Engineering, and an Adjunct to Aerospace Engineering in Power Electronics at KAIST. He is currently developing various wireless power technologies including inductive power transfer systems for on-line electrical vehicles and leading the Nuclear Power Electronics and Robots Lab (PEARL) at KAIST. From 1990 to 1995, he was a Military Officer at the Ministry of National Defense, Korea, and from 1995 to 2003, he was a Senior Researcher at the Agency for Defense Development, Daejeon, Korea. From 1997 to 1999, he was with Astrium Ltd., Portsmouth, U.K. From 2003 to 2007, he was a Senior Director in the Presidential Office, Seoul, Korea. He was involved in developing Korea’s first airborne and spaceborne synthetic aperture radars. His current research interests include wireless electric vehicles, wireless power systems for robots and bio-medical applications, and general unified modeling of power electronics. He has authored or coauthored 118 technical papers, written five books, and holds more than 117 patents (awarded and pending). He has won three prizes awarded by the Korean government. He has been the Chair of the Wireless Power Committee of KIPE, since 2010, and the Chair of the EV Charger Committee of KIEE, since 2011. He is now an Associate Editor of IEEE Transactions on Power Electronics and the Journal of Emerging and Selected Topics in Power Electronics (J-ESTPE), a Guest Editor of the Special Issue on Wireless Power Transfer of the IEEE Transactions on Power Electronics and the J-ESTPE. He is also the General Chair of the 2014 IEEE VTC-Workshop on Wireless power (WoW) and the 2015 IEEE WoW.
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