This study proposes a novel onecycle control scheme with a plugin repetitive controller for load compensator. The novelty of this scheme lies in the combination of high dynamics and the simplicity of a onecycle controller and good steadystate harmonic suppression ability of the repetitive controller. In addition, the proposed scheme can reduce the effect of the harmonics in phase voltage for the existence of the repetitive controller. Finally, experimental results on a threephase, fourwire, threelevel load compensator are reported to validate the effectiveness of the proposed control scheme.
I. INTRODUCTION
Development of the power system has resulted in a huge growth in nonlinear loads, such as adjustable speed drives, electric arc welders, and switching power supplies, which usually generate large amounts of harmonic currents in both industrial and domestic fields. Consequently, line current harmonics is one of the greatest challenges in power systems because it causes voltage distortion and increases power loss
[1]
,
[2]
.
An easy solution to this problem is to employ a passive filter. However, such filters are often heavy, large in size, and can be easily affected when the impedance of the grid changes
[3]
. In contrast, a load compensator (LC) is a better solution because of its smaller size and weight compared with the passive filter, as well as its insensitiveness to the grid parameters
[1]

[3]
.
The goal of LC is to generate a current with the same magnitude but the opposite phase to the harmonic that the nonlinear loads generated. A typical controller for LCs consists of two parts: a harmonic extractor that extracts the harmonic components of load currents to generate the reference for the current controller, and a doubleloop controller that forces the output current of the LC to follow the reference and controls the DClink voltage
[4]
,
[5]
. Therefore, both current controller and harmonic extractor can affect LC performance. The harmonic extractor has already been widely employed by filters
[6]

[8]
; schemes based on the instantaneous reactive power theory
[9]
or Discrete Fourier Transformation (DFT)
[10]
. However, all these schemes have problems in balancing the steadystate and transient performance of its output. Thus, the harmonic extractor degrades both the accuracy and the transient behavior of LCs.
Alternatively, an indirect method is introduced in
[11]

[13]
, where the line current is sensed and sinusoidally regulated as the same phase of the grid voltage. Without the harmonic extractor, this scheme is free from tracking errors and delays that the harmonic extractor causes and can be implemented with only one set of current sensors. However, an additional set of highperformance voltage sensors for the grid voltage is needed because the reference of the current is generated directly from the grid
[12]
or from the dq reference frame that needs the information from the grid
[13]
.
Onecycle control (OCC) based LCs
[14]

[16]
do not explicitly require information on the grid and load current; thus, these LCs can be implemented with only line current sensors and DClink voltage sensors. Moreover, semiconductor devices operate at a constant switching frequency, which simplifies the design of the output filter. However, the control bandwidth of OCC based LC is limited because its bandwidth is equivalent to a proportional controller that forces the current to follow the waveform of the grid voltage. A detailed model of OCC based LC will be discussed in section II. Therefore, the OCC based LC cannot compensate high order harmonics, and can be easily affected by distorted grid voltage.
The design of the current controller becomes a challenging task because LCs need to generate a highorder harmonics current. The bandwidth of the current loop has to be sufficiently wide. In the literature, various current controllers have been developed, such as proportionalintegral (PI) control
[17]
,
[18]
, hysteresis control
[19]
,
[20]
, proportionalresonant (PR) control
[21]
,
[22]
, and vector PI (VPI) control
[23]
,
[24]
. The bandwidth of PI control is limited, which is making it unsuitable for LCs. Although hysteresis control is simple and robust, it also has flaws—the varying switching frequency poses huge difficulty difficulties in the design of the output filter. Moreover, hysteresis control also has problems in balancing the accuracy of the current output and switching frequency. The PR controller can provide a high bandwidth for the current controller with a constant switching frequency. However, undesired frequency peaks usually appear in the closedloop frequency response because of the delay in the digital implementation of the controller
[23]
. In addition, the complexity and computation burden also increase significantly when tracking highorder harmonics because each resonant controller can only regulate one harmonic component. In
[23]
, a VPI controller based on a fundamental reference frame is introduced. This new scheme can greatly reduce the number of resonant controllers and eliminate the peaks from delay. Unfortunately, this scheme can only work under a threephase threewire system with a balanced load, and the performance of the controller under LCL filter is has not yet been reported.
Repetitive controller based on internalmode principals is introduced in
[25]
. The repetitive controller can regulate all harmonics with one controller because the harmonics of line current are periodic signals, and the delay caused by the digital implementation can be easily compensated. Applying repetitive controllers to LCs under a typical structure with two parts have been attempted many times
[26]
,
[27]
. However, as discussed before, LC performance is still degraded by the harmonic extractor.
In this paper, a modified onecycle control scheme with plugin repetitive controller is proposed. By combining the two controllers, the proposed scheme is capable of greatly increasing the harmonic rejection ability of the LC. In addition, the repetitive controller can reduce the effect of harmonics from the phase voltage. The desired features of onecycle controller is retained because the main structure of the system is still OCC based—no phase lock loop (PLL) and harmonic extractor are needed for the LC, and the switching device works at a constant frequency.
The remaining parts of this paper are organized as follows: The configuration and design of the proposed controller is discussed in Section II. A comparison between the performance of the proposed controller and that of the existing OCC controller are given in Section III. The description of the experimental setup and the result of experiments are given and summarized in Section IV. Finally, the main conclusions are highlighted in Section V.
II. PROPOSED REPETITIVE CONTROLLER
 A. System Configuration
A typical circuit of neutral point clamp (NPC) based on a threelevel threephase fourwire load compensator with an input LCL or L filter is shown in
Fig. 1
. Repetitive control is an excellent way to eliminate all the harmonics from the system because all the harmonics in the AC system are periodic. The control system configuration is depicted in
Fig. 2
. A bandpass filter is used to extract the fundamental components of the line current
i_{ref}
, and the error signal for the repetitive controller is generated by subtracting the line current with its fundamental components. The repetitive control is separated from the OCC current loop because the repetitive controller is used as a “plugin” structure and only deals with the error left by the onecycle control so that fast dynamic performance can be obtained.
Set up of the system.
Control system configuration.
 B. Model of Current Loop of Existing OCC Scheme
To design the repetitive controller of the proposed OCC based LC, the basic working principle of the existing OCC based LC is first explained and the model of its current loop is established.
A threephase fourwire system can be regarded as three independent singlephase systems. Therefore, one such system is used as an example for analysis, as shown in
Fig. 4
.
Onecycle control is based on a doubleloop structure, which is similar to other control schemes. The voltage loop regulates two DC voltages with two PI controllers, and the output of these voltages is defined as
V
_{m}
_{1}
and
V
_{m}
_{2}
. The two sawtooth waveforms with peaks of
V
_{m}
_{1}
and
V
_{m}
_{2}
are generated using an integrator with a reset and an adder (
Fig. 3
). Similar to the twolevel case present in
[28]
, the key control equation of the existing onecycle controller is given in
where
d
_{1}
and
d
_{2}
represent the duty ratios of high output and low output of an inverter leg, which represents the line current. A detailed implementation of onecycle control scheme for a threephase, fourwire threelevel LC is given in Appendix A.
Control block diagram of existing OCC scheme.
Model of one phase in a threephase fourwire load compensator
Output voltage
v_{o}
of the inverter is expressed using an average model as follows:
where
U
_{dc}
_{1}
and
U
_{dc}
_{2}
represent the voltages of the upper and lower capacitors respectively.
It can be assume that the outputs of the two voltage loops are constants when analyzing the current loop because the bandwidth of the voltage loop is low compared with the current loop. Thus, as shown in Appendix A, the output of the voltage loop is given in
The emulated resistance
R
_{e}
represents the effective perphase load resistance seen by the AC source.
Combining Eqs. (1), (2), and (3) yields
Eq. (4) shows that the magnification of onecycle control is
R
_{e}
. Thus, the control diagram of the current loop is depicted in
Fig. 5
(a), where
G
_{0}
represents the transfer function of the filter.
Control diagram of the existing onecycle control.
If the grid voltage
v
_{s}
has no distortion, then the active power balance of the whole system yields
where
i_{sf}
represents the real part of the fundamental component of
i
_{s}
. Magnification of the onecycle control is also
R
_{e}
, and thus the control diagram can be transformed into
Fig. 5
(b) through replacing
v
_{s}
with
i
_{sf}
. Therefore, the current loop of the existing OCC is a proportional controller that lacks the ability to track highorder harmonics.
Fig. 5
(b) shows that
v
_{s}
works as a reference of the current system loop, and the nonlinear load current
i_{l}
is regarded as the disturbance. Thus, if the grid voltage
v
_{s}
is distorted, then the performance will be greatly degraded because the control system cannot suppress the harmonic component of phase voltage
v
_{h}
, which is injected from the reference as shown in
Fig. 5
(c). Consequently, the controller has no ability to suppress the error from the distorted phase voltage.
 C. Design of Plugin Repetitive Controller
The current loop of
Fig. 2
can be redrawn in the zdomain with additional details, as shown in
Fig. 6
(a). The phase difference between the fundamental of the line current and phase voltage can be neglected because the onecycle controller exhibits good performance at the fundamental frequency of the system. Thus, the output of bandpass filter
i_{ref}
and the real part of the fundamental component
i_{sf}
can be combined. The control system can be simplified through combining these two components, as shown in
Fig. 6
(b). The load current is treated as a disturbance. This structure is a classical plugin repetitive control. The plant of the repetitive controller
P
(
z
) can be considered as a closeloop transfer function of onecycle control as
[29]
shows:
Control diagram of the proposed control.
The parameters of LC is is listed in
TABLE I
and the design of the repetitive controller is based on them.
PARAMETERS OF LOAD COMPENSATOR
PARAMETERS OF LOAD COMPENSATOR
As the core of the repetitive controller, the modified internal model 1/(1
Q
(
z
)
z
^{N}
), which integrates the error on cycle bases, is designed first. The sampling frequency of the load compensator is 10 kHz, and the fundamental frequency of the system is 50 Hz. One repetitive control cycle contains
N
= 200 error sampling. The
Q
(
z
) filter, which can increase the robustness of the repetitive control, is set as a lowpass filter or a constant near 1. In this case,
Q
(
z
) is set as 0.9.
Repetitive control can achieve high gain under the fundamental and harmonic frequencies, but such high gain on high frequency may affect the system stability. Therefore, a filter
F
(
z
) is added to eliminate the error signal from the bandwidth of the current loop and thus maintain the stability of the controller. Due to the existence of the delay stage
z^{N}
which makes the control system causal, an advance stage
z^{k}
is added together with
F
(
z
) to the diagram to compensate for the phase lag of
P
(
z
) and
F
(
z
).
Various
R
_{e}
should be considered because the response of the onecycle control is determined using
R
_{e}
, which is based on the nonlinear load.
Fig. 7
shows that advance stage
z
^{2}
can compensate the phase lag of
P
(
z
) within the bandwidth of the current loop under various
R
_{e}
. To evaluate the stability of the proposed control scheme, the transfer function from error signal
i
_{err}
to reference signal
i
_{sf}
can be expressed as
Phasefrequency characteristic of P(z) and z^{2}.
The characteristic equation of the system is
To achieve system stability, all the roots of the above must be inside the unity circle that is centered at the origin of the zplane. A sufficient condition for system stability is presented in
[30]
:
Define
H
(
e^{jωt}
)=
Q
(
e^{jωt}
)
F
(
e^{jωt}
)
e^{jωt}
P
(
e^{jωt}
). Eq. (9) means that the end of vector
H
(
e^{jωt}
) should never exceed the unity circle. The Nyquist plot of
H
(
e^{jωt}
) under various
R
_{e}
are given in
Fig. 8
. The entire locus remains well within the unity circle, as seen in
Fig. 8
.
Nyquist plot of H(e^{jωt}) under different R_{e}.
 D. DCLink Voltage Control Loop
The goal of the outer DClink voltage loop is to keep the DClink voltage of the LC constant through a simple PI regulator, whose output is the amplitude of the sawtooth waveforms
V
_{m}
_{1}
,
V
_{m}
_{2}
as follows:
where
K_{pdc}
and
K_{idc}
are the proportional and integrator gains of the PI controller,
U_{dc}
* is the reference of the DClink voltages, and
U
_{dc}
_{1}
and
U
_{dc}
_{2}
are the measured DClink voltages. The model of the voltage loop given in Appendix B can be expressed as
A and
ω
_{0}
can be expressed as
where
V_{s}
is the root mean square (RMS) value of the phase voltage, and
U_{dc}
and
V_{m}
are the quiescent operation points of he voltage loop.
Based on the instructions in
[31]
, the proportional gain of the controller
K_{pdc}
is derived as
to transform the bandwidth voltage loop into
f_{c}
. The corner frequency of the PI controller is set as
f_{c}
/10 to achieve sufficient phase margin for the controller. Thus, the integrator gain of the controller is derived as
 E. Frequency Adjustment
Harmonic rejection ability of the repetitive controller can be degraded because the grid frequency varies in a narrow range. Thus, a frequency adjustment block should be added to adjust the sampling time and make the error samplings per period
N
a constant when the grid frequency changes.
The filtered current
i_{ref}
is compared with 0 to reshape the waveform into a square wave. A timer detects the highlevel length of the square, which is equal to half of the grid period. The output of the timer is then divided with
N
/2, which is the right number of samplings per half period. After the division, the result is set as the new sampling time. Frequency adjustment block is shown in
Fig. 9
.
Frequency adjustment block.
III. PERFORMANCE OF PROPOSED CONTROL
 A. Harmonic Rejection Ability
The transfer function of the repetitive controller in
Fig. 6
(b) is
The transfer function of existing OCC in
Fig. 5
(b) is
The open loop gain of 
G
(
z
) and 
G_{rp}
(
z
)
G
(
z
) are compared in
Fig. 10
, which indicates that the proposed controller provides higher gains at harmonic frequencies than the existing onecycle controller. Therefore, the proposed controller has better harmonic suppressing ability than the existing onecycle controller.
Open loop gain of G_{rp}(z)G(z) (blue) and G(z)(red).
 B. Sensitivity to Phase Voltage Distortion
Section II shows that the existing onecycle controller lacks the ability to suppress distortion from the phase voltage. Investigating the effect of voltage harmonics on the proposed control is necessary. The input of the repetitive controller is from the bandpass filter, and thus contains no harmonics from the grid. To understand the suppression ability of the repetitive controller, the phase voltages are separated into two parts: fundamental component
v_{sf}
and harmonic component
v_{sh}
. The former, which contains no harmonics, is combined with the output of the bandpass filter. The diagram of the control blocks is shown in
Fig. 11
.
Control diagram of repetitive control under distorted line voltage.
The transfer function
M
(
z
) from harmonic voltage
v_{sh}
to error signal
i_{err}
can be expressed as
The transfer function of
M
(
z
) in the existing onecycle control in
Fig. 5
c can be expressed as
The amplitudefrequency characteristics of M(z) is drawn in
Fig. 12
(
R
_{e}
=1).
M
(
z
) has a smaller amplitude with the repetitive controller under harmonic frequencies. This characteristic indicates that most of the distortion from the harmonic component in phase voltage can be suppressed using repetitive control.
Magnitudefrequency between i_{err} and v_{sh}.
Laboratory prototype.
IV. EXPERIMENTAL RESULTS
 A. Experimental Setup
A scaleddown laboratory prototype of LC was built to test the performance of the proposed control. This prototype was tested on a threephase system that had a phase voltage of 80 V. The reference voltage of both DC links is set as 160 V. To test the performance of the proposed control under a distorted voltage and its ability to suppress the effect of grid frequency variations, a Chroma programmable AC source 61512 is used as power source for the whole system. More detailed parameters used for this prototype can be found in
TABLE I
.
The nonlinear load of the system is a threephase diode rectifier with two resistors on the DCside. The neutral point of the rectifier is connected to the system, as shown in
Fig. 14
.
Nonlinear Load.
The controller is programmed with an existing onecycle control
Fig. 3
and a proposed control as
Fig. 2
with the same switching frequency. The performance of both control schemes are compared under two scenarios: ideal phase voltage and distorted phase voltage.
 B. Time and Spectrum Results under Ideal Phase Voltage
A set of experiments was conducted under ideal phase voltage to compare the performance of the two control schemes. Under this condition, the results are shown in
Fig. 15
with voltage and currents of phase A. The existing onecycle control cannot handle the step change of the line current because of the limited bandwidth in the current loop. Therefore, spikes appear in the waveform of line current, as shown in
Fig. 15
(a). The proposed control scheme has a high gain under harmonics through employing a plugin repetitive controller. Thus, the current spikes are eliminated using the proposed control scheme, as shown in
Fig. 15
(b).
Comparison of existing onecycle control and proposed control.
Fig. 16
compares the current spectra obtained from the two control schemes with the International Electrotechnical Commission (IEC) standard. The 11th and 13thorder of harmonics in the existing OCC scheme exceeds the limitation of the IEC standard, whereas the current spectra of the proposed control meet the requirement of the IEC standard, as shown in
Fig. 16
. The line current total harmonic distortion (THD) is significantly reduced from 14.8% to 3.6% using the proposed control scheme. The proposed scheme presents better harmonicelimination capability over the existing control and can reduce the amplitudes of loworder harmonics, which the existing control cannot do.
Measured current spectra at ideal phase voltage.
 C. Time and Spectrum Result under Distorted Phase Voltage
In practical circumstances, especially in lowvoltage applications, phase voltage is normally distorted. Thus, a set of experiments was performed to compare the performance of the two controls under distorted phase voltage.
The experiments are from a Chroma 61612 programmable threephase AC source. A 5th order of harmonics whose amplitude is 20% of the fundamental is then injected into the base voltage.
Fig. 17
demonstrates the results of the experiments. The existing onecycle control almost loses the ability of harmonic suppression. In addition to the spikes, a large amount of 5thorder harmonics also appears in the current waveform. The proposed control can cancel out the effect of phase voltage harmonics using a repetitive controller that leads to good performance. Little spikes and 5thorder harmonics appear in the current waveform.
Fig. 18
compares the spectra of the line current of the two controls with the IEC standard. For the existing control scheme, the amplitude of the 5thorder harmonics of the existing control is 29% and greatly exceeds the IEC standard, which is mostly from the injected voltage harmonics that the control scheme does not suppress. Under the proposed control scheme, the amplitude of the 5thorder harmonics is reduced to 3.5%, which meets the IEC standard. The THD of the line current is reduced from 36% to 7.2% through replacing the existing onecycle control with the proposed control scheme. The proposed control shows better rejection ability of phase distortion than the existing OCC and can work effectively even with a highly distorted phase voltage.
Comparison of existing onecycle control and proposed control under distorted phase voltage.
Measured current spectra at distorted phase voltage.
 D. Frequency Variation
A set of experiments was conducted with different grid frequencies to test the harmonic rejection ability of the proposed control under various grid frequencies. The results of the experiments can be found in
Fig. 19
.
Test of the proposed controller under various grid frequencies.
The results show that the proposed control scheme retains harmonic rejection ability when grid frequency varies. The THD of the line current is less than 3.5%, which suggests that the proposed control has the ability to adjust the variation of the grid frequency.
 E. Dynamic Performance
The dynamic performance of the proposed controller is also evaluated under step load changes.
Fig. 20
shows the transient response of line current
i_{s}
. A step change of the nonlinear load from 50% to 100% is performed. In the first cycle after the transient of load current, the system behaves similarly to the existing onecycle control, and the amplitude quickly changes because the repetitive controller needs one cycle for output change. Moreover, the repetitive control does not affect the fast dynamic of the oncycle control. Finally, the repetitive controller begins to change its output, and the line current soon becomes sinusoidal.
Dynamic performance of the system.
V. CONCLUSION
A novel onecycle control scheme for a threephase, fourwire, threelevel load compensator based on a plugin repetitive controller was proposed. The voltage loop of this scheme is similar to the existing onecycle control, in which a plugin repetitive controller is added to the current loop. The detailed design of parameters of the repetitive controller is presented in this study through analyzing the loop gain and phase shift of the onecycle control. A series of experiments was conducted to evaluate the performance of the proposed controller. A comparison between the performance of the proposed controller and that of the existing OCC confirmed that the former offers a superior harmonic suppression capability and lower sensitivity to the phase voltage distortion than the existing onecycle controller, which suggests that the proposed scheme may be a good candidate under such condition.
Acknowledgements
This work is supported by the National Natural Science Foundation of China (NSFC) (#51177147 and #51177149).
BIO
Jian Hu was born in Nanjing, China, in 1990. He received his B.S. in Electrical Engineering degree from Southeast University, Nanjing, China. He is currently working toward his Ph.D. degree in the College of Electrical Engineering, Zhejiang University, Hangzhou, China. His research interests include power electronics equipment, renewable energy, power quality and parallel operation of the inverters.
Zhaohui Sun was born in Zhejiang, China. He received his B.S. degree in Electrical Engineering from Zhejiang University, Zhejiang, China, in 2013, and is currently working toward his Ph.D. degree at the same university. His current interests include the application of advanced control methodologies in power electronic converters and the application of the DC microgrid.
Hao Ma was born in Hangzhou, China, in 1969. He received his B.Sc., M.Sc., and Ph.D. degrees in Electrical Engineering from Zhejiang University, Hangzhou, China, in 1991, 1994, and 1997, respectively. He is currently a Professor at the College of Electrical Engineering, Zhejiang University. From September 2007 to September 2008, he was a Delta Visiting Scholar at North Carolina State University, Raleigh, USA. His research interests include advanced control in power electronics, fault diagnosis of power electronic circuits and systems, and application of power electronics.
Guozhu Chen (M’03) was born in Hubei, China, in 1967. He received his B.S. degree in Electrical Engineering from Hangzhou Commerce University, Hangzhou, China, in 1988, and the M.S. and Ph.D. degrees in Electrical Engineering from Zhejiang University, Hangzhou, China, in 1992 and 2001 respectively. Since 1992, he has been with the faculty of the College of Electrical and Engineering at Zhejiang University, China, where he was an Associate Professor from 2000 to 2005, and a Professor since 2005. From January 2001 to April 2004, he was a Visiting Scholar in the University of California, Irvine, USA. His current research interests include highpower electronics applications and their digital control; active power quality control such as APF, UPQC, SVC, dSTATCOM and dFACTS; grid connection of renewable energy/distributed power generation; and power electronic system integration. He holds more than 20 Chinese patents, and has contributed to more than 160 academic papers.
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