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MPPT Control and Architecture for PV Solar Panel with Sub-Module Integrated Converters
MPPT Control and Architecture for PV Solar Panel with Sub-Module Integrated Converters
Journal of Power Electronics. 2014. Nov, 14(6): 1281-1292
Copyright © 2014, The Korean Institute Of Power Electronics
  • Received : December 28, 2013
  • Accepted : July 22, 2014
  • Published : November 20, 2014
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About the Authors
Jaber A. Abu Qahouq
Department of Electrical and Computer Engineering, The University of Alabama, Alabama, USA
jaberq@eng.ua.edu
Yuncong Jiang
Department of Electrical and Computer Engineering, The University of Alabama, Alabama, USA
Mohamed Orabi
APEARC, Aswan University, Aswan, Egypt

Abstract
Photovoltaic (PV) solar systems with series-connected module integrated converters (MICs) are receiving increased attention because of their ability to create high output voltage while performing local maximum power point tracking (MPPT) control for individual solar panels, which is a solution for partial shading effects in PV systems at panel level. To eliminate the partial shading effects in PV system more effectively, sub-MICs are utilized at the cell level or grouped cell level within a PV solar panel. This study presents the results of a series-output-connection MPPT (SOC-MPPT) controller for sub-MIC architecture using a single sensor at the output and a single digital MPPT controller (sub-MIC SOC-MPPT controller and architecture). The sub-MIC SOC-MPPT controller and architecture are investigated based on boost type sub-MICs. Experimental results under steady-state and transient conditions are presented to verify the performance of the controller and the effectiveness of the architecture.
Keywords
I. INTRODUCTION
As one of the most important renewable energy sources, photovoltaic (PV) solar energy system utilization has been expanding each year. Over the last few decades, global demand for generation of green energy has been increasing continuously [1] . According to a report from the US Department of Energy, the production of renewable energy electricity in the US in 2011 was twice that in 2010 [2] .
Commonly, a residential PV system is composed of PV panels connected in series and a central power stage, as illustrated in Fig. 1 (a). A single centralized power converter with maximum power point tracking (MPPT) control is utilized in this architecture. The total output voltage ( Vpv ) and total output current ( Ipv ) from the PV panels connected in series are used as MPP tracking variables.
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Series-connected PV panels with (a) centralized MPPT architecture and (b) MIC MPPT architecture.
The disadvantage of the system in Fig. 1 (a) is that the string current will be limited by the smallest current generated from one of the panels if one or several panels are mismatched. Panel mismatch in the PV system can be introduced by partial shading, PV panel aging, or manufacturing process variations [3] - [6] .
On the other hand, the PV system architecture illustrated in Fig. 1 (b) targets solving mismatch conditions at the panel level with the aid of a module integrated converter (MIC) for each panel [7] - [9] . The mismatch effects on PV panels could be reduced by performing a separate MPPT function for each individual PV panel. This is known as distributed MPPT (DMPPT) architecture. The panel-level DMPPT structure is unable to alleviate the partial mismatch and shading effects within a single PV panel if some PV cells in a panel are mismatched or shaded.
Further improvement in PV solar system architecture has been investigated to eliminate panel-level mismatch effects using cell-level or grouped-cell-level MPPT control topologies to avoid losing the energy caused by using the bypass diodes concept [10] , [11] . In [11] , a buck power converter was used. Because of the voltage step-down characteristics of the buck topology, more PV cells need to be connected in series to form a cell group (a group of 24 cells was used in [11] ). A higher number of cells in a cell group reduces the efficiency of the PV system under mismatch or partial shading conditions. The concept of connecting sub-MIC (boost power converter) in series and performing MPPT at the cell level within each PV panel was proposed in [10] . The proposed concept could eliminate or reduce the effects of cell mismatch conditions. However, in both [10] and [11] , each cell or group of cells requires a dedicated MPPT controller with associated sensors, thereby increasing cost and size.
Another important aspect in PV systems is the algorithm type of the MPPT controller [12] - [18] . Examples of controller algorithms include perturb and observe (P&O) algorithm [12] , [13] , incremental conductance algorithm [14] - [16] , and neural network (N-N) algorithm [17] . However, the controller with N-N algorithm might not be a viable candidate for sub-MIC MPPT control because the cost of an individual N-N controller is high compared with that of the P&O MPPT algorithms or incremental conductance MPPT algorithms.
Between the P&O and the incremental conductance algorithms, an MPPT controller that utilizes P&O algorithm can achieve lower cost and good performance using single sensor MPPT method. For example, [19] presented MPPT controller that achieves optimal power extraction by maximizing the output voltage or output current from the power converter. In [20] , the MPPT controller senses and maximizes the PV panel voltage to achieve optimal power extraction. In [21] , only a single output current sensor was used to achieve the MPPT. These techniques introduce only one sensor to achieve MPP of each converter.
As mentioned earlier, the main disadvantage of the sub-module control scheme is that it assigns individual power converter and controller to each cell group or each cell which increases the cost of the PV module. N power converters are needed for a PV module with N groups of PV cells. If conventional MPPT techniques are used, the numbers of voltage and current sensors are 2N and the number of analog-to-digital converter (ADC) channels is 2N. In addition, 2N registers in a microcontroller are needed to store the sensed current and voltage information from the ADCs. If the advanced techniques of single sensor are used, then N sensors, N channel ADC, and N register are needed.
This study aims to investigate cost-effective sub-MIC architecture with series-output-connection (SOC) MPPT control at PV cell level or grouped cell level, namely, sub-MIC SOC-MPPT controller and architecture. A digital MPPT controller for performing sub-MIC SOC-MPPT with series connection at the output is presented. In the presented sub-MIC SOC-MPPT controller and architecture, only one sensor at the system output terminal is needed for the MPPT function of N cells or groups of cells. The controller algorithm is developed for use with both current load type and voltage load type (e.g., battery). When a voltage load type is used, a current sensor is needed and the load current is maximized. When a current load type is used, a voltage sensor is needed and the load voltage is maximized. The system is depicted in Fig. 2 . Series-connected cell groups are connected to sub-MICs named “ Power Converter 1,..., Power Converter N.
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Block diagram of the sub-MIC SOC-MPPT controller and architecture with voltage type load or current type load.
The advantages of the MPPT controller and architecture include the following:
  • MPPT is performed at the cell level or at the grouped cells level through sub-MICs. The system can extract more power under partial shading and mismatch conditions. The energy harvesting efficiency is higher than when MPPT is performed at the panel level.
  • Controller cost and power consumption are reduced as a result of using only a single output parameter sensor instead ofNsensors, one ADC instead of2NADCs, and one digital controller and fewer conditioning circuitries (needed for sensors, ADCs, and controllers) for a PV system.
  • Reduced noise: Conventional MPPT controllers sense PV panel voltage and current which have high-frequency noise. Thus, low-pass filter circuits are often used to guarantee clean and error-free signals. Utilizing the load signal at the output of the DC stage ensures a cleaner sensed signal.
  • Reduced errors (improved accuracy): Digital domain multiplication operation usually results in truncation errors, which are avoided in the controller because it does not require multiplication.
Section II discusses the algorithm of the sub-MIC SOC-MPPT controller. A theoretical analysis is presented in Section III. Experimental prototype results are presented in Section IV to evaluate the MPPT controller and architecture performance under steady-state and transient conditions. Section V concludes this study.
II. SOC-MPPT CONTROLLER ALGORITHM DESCRIPTION
The SOC-MPPT controller algorithm is developed for two types of loads. For voltage type load, the sensed variable M(k) is the load current, whereas the sensed variable M(k) is the load voltage for the current type load. When the algorithm starts, the duty cycles of the sub-MICs are set as D1 , D2 ,..., DN . In the first operation mode (Mode I), the SOC-MPPT controller adjusts/perturbs the duty cycles ( Di ) of all sub-MICs in the same direction (all increment or all decrement) in order to converge to a maxima under the existing difference between the duty cycles (the difference between the duty cycles remains unchanged in this operation mode). In Mode I, the variable value M(k) is compared with its previous value M(k−1) from the previous algorithm iteration to yield the change Mdiff = M(k)−M(k−1) . Similarly, the change in duty cycle Ddiff = D1(k)−D1(k−1) is obtained. Note that obtaining Ddiff for any of the sub-MICs (sub-MIC for cells group 1 is used as an example) is enough because all duty cycles in this operation mode are perturbed in the same direction. If the signs of Mdiff and Ddiff are the same, each duty cycle is incremented by ΔD and the variable “ Flag1 ” is set to “ 1 ” in order for the algorithm to remember the last perturbation direction of the duty cycles. If the signs of Mdiff and Ddiff are opposite, each duty cycle is decremented by ΔD and “ Flag1 ” is set to “0” in order for the algorithm to remember the last perturbation direction of the duty cycles.
As illustrated in Fig. 3 , the value of “ Flag1 ” is used when Mdiff = 0, which could happen because the ADC resolution is insufficient to observe a change in load voltage as a result of the last duty cycles perturbation. In this case, the duty cycles are perturbed in the same direction as in the past iteration and the voltage values are not swapped. This step is equivalent to increasing the duty cycles perturbation step size. For operation safety, the duty cycle values are always compared and limited to a minimum value ( Dmin ) and a maximum value ( Dmax ). The variable “ a ” is incremented each time the duty cycles are incremented; the variable “ b ” is incremented each time the duty cycles are decremented. When variables “ a ” and “ b ” are larger than the selected threshold values R and S (e.g., R=4 and S=4 ), the controller switches to the second mode of operation (Mode II, illustrated in Fig. 3 ). In Mode II, the SOC-MPPT controller perturbs the duty cycle of each sub-MIC sequentially to detect the needed difference between the duty cycles. In Mode II of the algorithm, the duty cycle of the sub-MIC connected to the first group of cells is perturbed, whereas the other sub-MIC duty cycles are kept constant. The variable Flag2 in Mode II serves a similar purpose as the variable Flag1 in Mode I. Variable c is incremented each time a positive duty cycle perturbation is generated; variable d is incremented each time a negative duty cycle perturbation is generated.
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SOC-MPPT main algorithm flowchart.
When the values of c and d are larger than a selected value U and V (e.g., U=4 and V=4 ), the index variable “ x ” is incremented by “1,” which moves the algorithm operation to perturb the second (or next) sub-MIC duty cycle. When the index variable “ x ” is equal to N (number of the channels in the system), the algorithm switches from Mode II back to Mode I.
III. THEORETICAL ANALYSIS
This section presents an analysis of the controller operation. For the PV system with a battery load ( Fig. 2 ), the output voltage ( VL ) is relatively constant or varies slowly compared with the MPPT control operation, but could also have faster transients. The analysis assumes constant load voltage; however, the experimental section will also demonstrate the operation under load voltage transients. The output power of the system ( Pout ) is proportional to the load current ( IL ), as given by
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The MPPT controller aims to maximize the load current. Assuming that power losses in power converters are negligible, maximizing the load current is equivalent to maximizing each cell group power. For the ith cell group, the cell group voltage ( Vpv-i ) is a function of the sub-MIC output voltage ( Vi ) and its duty cycle ( Di )
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The ith cell group current ( Ipv-i ) is a function of Vpv-i [22] , as given by
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In Eq. (3), Isc-i is the PV cell group photon current, which is the same as the short circuit current, Io is the diode saturation current, q is electron charge, T is the temperature, A is the ideality factor, and k is the Boltzmann constant [23] . The current of the group of PV cells is also a function of IL , as given by
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Based on Eqs. (2) to (4), the load current is expressed as follows:
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Equations (6) and (7) are the first and second derivatives of IL with respect to Di :
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Parts 1 and 2 of Eq. (7) are negative, which results in d 2 IL / dDi 2 < 0 . Applying the concave theorem [24], Eq. (5) is a concave down curve, with maximum IL at dIL / dDi = 0 . This characteristic of Eq. (5) enables the algorithm to track MPP accurately by sensing IL , similar to the conventional P&O algorithm that utilizes the concave curve for PV power versus voltage. When load current IL is maximized, each sub-MIC optimal duty cycle of each group of PV cells is calculated as follows:
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Solving Eq. (8) yields the optimal duty cycle (D i-opt ) of each PV cell group power converter
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If all PV cell groups and their sub-MICs have identical characteristics, Mode I of the algorithm is enough to locate the optimal duty cycle based on the concave function of Eq. (5). In this case, D1-opt = D2-opt =...= DN-opt , where in Eq. (9), Isc-1 = Isc-2 = ...= Isc-N and Vi = VL/N . When the PV cell groups are mismatched, Mode I algorithm speeds up the tracking process, while Mode II locates each sub-MIC optimal duty cycle. If a current load type is used as illustrated in Fig. 2 , a similar conclusion can be reached.
IV. EXPERIMENTAL RESULTS
An evaluation experimental prototype (illustrated in Fig. 4 ) was developed in the laboratory to evaluate the sub-MIC SOC-MPPT controller and architecture. The prototype includes three DC-DC boost power converters with their output connected in series, a TMS320F28335 micro-controller (which has more capabilities and calculation power than needed and therefore in an actual real product a much lower cost application-specific controller hardware can be developed), Agilent solar array simulators (SAS), and an electronic load (Chroma 63030). In this experiment, the electronic load is used once as a current load type ( Cond. A in Fig. 4 ) and once as a voltage/battery load type ( Cond. B in Fig. 4 ). Under Cond. A , the load voltage is sensed and fed to the ADC of the controller. Under Cond. B , the load current is sensed and fed to the 12-bit ADC of the controller. The microcontroller perturbs the sub-MIC duty cycles with 0.5% perturbation step size. A point worth mentioning is that under both load conditions, the loads are not always kept constant, i.e., the results in this study are also obtained when load transients are triggered to verify the effectiveness of the system even when the load varies.
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High-level schematics of the experimental prototype circuit (Cond. A: current load type, Cond. B: voltage load type).
Three channels from the SAS are used to emulate the behavior of the three cell groups, with each channel emulating a string of ten PV cells connected in series. The PV cell type P-Maxx-1400mA from SiliconSolar® is emulated. SAS is used in this experiment because different combinations of mismatch conditions can be set such that the operation of the presented control scheme and architecture can be evaluated within controlled laboratory environment for consistent results that can be analyzed and compared. The emulated PV cell Groups A, B, and C are illustrated in Fig. 5 at the input of the boost converters. In the rest of this section, the PV cell groups are referred to as GA (PV cells Group A), GB (PV cells Group B), and GC (PV cells Group C).
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Experimental results with 0.3 A current load type under mismatched irradiance conditions.
- A. Load “Cond. A” under Mismatched Irradiance Level of PV Cell Groups (current Load Type).
The experiment is first performed with a constant current load of 0.3 A and with mismatched conditions for the three PV cell groups. The parameters of the PV cell groups include the following:
GA: Voc =5.5 V, Vmp =5.0 V, Imp =1.2 A, Isc =1.4 A.
(represents 100% irradiance level, 1000 W/m 2 )
GB: Voc =4.8 V, Vmp =4.0 V, Imp =0.6 A, Isc =0.8 A.
(represents 50% irradiance level, 500 W/m 2 )
GC: Voc =5.0 V, Vmp =4.5 V, Imp =1.0 A, Isc =1.2 A.
(represents 90% irradiance level, 900 W/m 2 )
where Voc is the open circuit voltage of the PV cell group, Isc is the short circuit current of the cell group, Vmp is the maximum power point voltage of the cell group, and Imp is the maximum power point current of the cell group.
Initially, the SOC-MPPT algorithm is not triggered to start and the voltage and current operating points of each cell group are not at the desired maximum power points, as shown in Figs. 5 (a) and 5 (b) waveforms (fixed lines before the time duration T 1 ). The SOC-MPPT algorithm is then triggered to start in Mode I, as marked by period T 1 . The duty cycles of the three sub-MICs are perturbed in the same direction during T 1 until the duty cycles oscillate around a point, which indicates that a possible MPP using this mode has been reached (this would have been the MPP of PV cell groups were matched/under the same irradiance level). During this mode, the currents in the three PV cell groups increase, as shown in Figs. 5 . Because of the mismatch conditions between the cell groups, Mode I (duration T 1 ) of the controller moves the operating points of GA and GC closer to its MPP; however, the operating points of GB deviate from its MPP. In Mode II (duration T 2 ), the controller increases the voltage of GA and GC, but decreases the voltage of GB. After T 2 , the operating points (expressed in the form of voltage and current point) of each PV cell group is approximately at (5 V, 1.2 A), (4 V, 0.6 A), and (4.5 V, 1.0 A), which correspond to the maximum power points set by SAS. The total tracking time from the algorithm start time to reaching the steady-state condition took 1200 ms in this case.
The sensed voltage signal sent into the ADC of the controller is shown in Fig. 5 (a), where the top three traces represent the input voltage from cell groups GA, GB, and GC. Two observations can be obtained from this voltage waveform: (1) the signal obtained after the output filter capacitor is clean without low-pass filter and (2) the output voltage signal value is maximized through MPP tracking with the current load type as discussed in the previous sections.
Fig. 6 shows the power of each PV cell group reaching their maximum values, and the load power is thus maximized. In Figs. 6 (a) and (b), after the SOC-MPPT controller is started, the power of GA increases by 40%, GB power is maintained at the maximum power value, and GC power increased by 50%.
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Experimental results with 0.3 A current load type under mismatched irradiance conditions.
- B. Load “Cond. A” Under Load Transient (Current Load Type)
Figs. 7 and 8 show the MPPT controller tracking results with 0.4 A to 0.3 A load current transient. The decrease in the output current leads to a decrease in the output current of the cell groups. Therefore, the operating points of the cell groups initially deviate from the MPPs before the controller converges again to the new MPP values. The dynamic tracking time took approximately 600 ms.
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Experimental results with load current transient from 0.4 A to 0.3 A.
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Experimental results of GC voltage, current, and power waveforms with load current transient from 0.4 A to 0.3 A.
- C. Load “Cond. B” under Mismatched Irradiance Level of PV Cell Groups (Voltage/Battery Load Type)
The next part of the experiment is performed with a voltage/battery load of 20 V and mismatched irradiance level conditions for different PV cell groups. Initially, the MPPT algorithm is not triggered to start and the voltage and current operating points of each cell group are not at the desired maximum power points, as shown in Figs. 9 (a) and 10 (a) (fixed lines before the time duration T 1 ). After the SOC-MPPT controller is started, the voltage of GA drops to 5 V, the voltage of GB drops to around 4 V, and the voltage of GC drops to 4.5 V. The voltage of each cell group corresponds to the maximum power point voltage set by SAS. The total power absorbed by the load form Fig. 9 (b) is around 12 W. With 12.8 W power generated by the PV cell groups, the power stage efficiency is around 93.5% under this operating condition.
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Experimental results with 20 V voltage/battery load under mismatched irradiance levels.
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Experimental results with 20 V voltage/battery load under mismatched irradiance levels.
Figs. 9 (b) and 10 (a) show that the power values of GA and GB increased by 20% and 30%, respectively. The power of GC increased by 10% after starting the controller. The total tracking time from the algorithm start time to reaching the MPPs is around 800 ms in this case.
- D. Load “Cond. B” under Load Transient (Voltage/Battery Load Type)
Fig. 11 shows the MPPT controller tracking results with 20 V to 25 V load voltage transient. The increase in load voltage leads to a decrease in output current of cell groups. Hence, the operating points of all cell groups initially deviate from the MPPs. The SOC-MPPT controller could recover the operating points of each cell group to the new MPPs after the transient within a duration of 200 ms under this transient case.
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Experimental results under load voltage transient from 20 V to 25 V.
- E. Tracking Efficiency, Power Stage Efficiency, and Total System Power Conversion Efficiency of Sub-MIC SOC-MPPT Architecture
To further evaluate the performance of the presented sub-MIC SOC-MPPT controller and architecture, the tracking efficiency, power stage efficiency, and total system power conversion efficiency data are recorded by changing the load current from 0.3 A to 0.5 A for the current type load case and from 20 V to 40 V for the voltage/battery type load. The irradiance conditions of the cell groups are set to be the same at the beginning of sub-section A in this section (Section IV) .
The presented sub-MIC SOC-MPPT architecture used in this study senses the output voltage or output current and maximizes the load power Pout_L . The total system power conversion efficiency ( Ɛ ) is defined as the load power Pout_L divided by the maximum available power from all cell groups under certain irradiance level, as given by Eq. (10):
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where the PA_max , PB_max , and PC_max is the maximum available power from each solar cell group under certain shading condition.
The total system power conversion efficiency takes into account the power stage (sub-MIC) efficiency and the tracking efficiency of the controller for the input PV cell groups. The PV system performance based on total system power conversion efficiency must be evaluated because the final objective is to deliver higher power to the load. As observed from Figs. 12 (a) and 12 (b), the tracking efficiency of the MPPT controller remained above 95% and the power stage efficiency ranged from 92% to 95%, which resulted in a system power conversion efficiency range of 91% to 92%. Higher power stage efficiency can be achieved with better design and components that will increase total system efficiency. The tracking efficiency could also be improved by using higher resolution digital hardware and smaller perturbation step size for the duty cycles. The hardware used in this study is only for comparison and evaluation purposes.
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Experiment data for tracking efficiency, power stage efficiency, and total system power conversion efficiency.
- F. Comparison between Panel-Level Architecture and Sub-MIC SOC-MPPT Controller and Architecture System Power Conversion Efficiency
For the purpose of comparison, another experiment setup is built in the laboratory for panel-level MPPT architecture. Unlike the experiment setup shown in Fig. 4 , only one power converter is used in the panel-level MPPT architecture to perform MPPT for the three cell groups (cell groups are directly connected in series). In the testing, the irradiance level of PV cell group C varied from full irradiance to 30% irradiance level. Given that all the cell groups are connected in series, varying the irradiance level of one cell group is sufficient to cause mismatched condition effects in the PV cell string. The results show that the power conversion efficiency decreases significantly as the irradiance level mismatch percentage increases in the conventional panel-level MPPT system. Figure 13 (a) shows comparisons between the total system power conversion efficiency of the presented sub-MIC SOC-MPPT architecture and total system power conversion efficiency of the panel-level MPPT architecture with a voltage/battery load (20 V). Fig. 13 (b) shows comparisons between the total system power conversion efficiency of the presented sub-MIC SOC-MPPT architecture and the total system power conversion efficiency of the panel-level MPPT architecture with current load type (0.3 A).
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Total system power conversion efficiency between the panel-level MPPT architecture and sub-MIC SOC-MPPT architecture.
V. CONCLUSIONS
The results and analysis of sub-MIC SOC-MPPT controller and architecture concept have been presented in this study. With a single output parameter sensor, a single ADC, and one digital MPPT controller, the presented architecture and algorithm are able to optimize the performance of a PV system with multiple PV cell groups. The theoretical assumption and operation of the SOC-MPPT controller and architecture are tested and verified by experimental results under steady-state and transient operations. Compared with panel-level MPPT control and architecture, the presented architecture could maintain high tracking efficiency and total system power conversion efficiency under mismatching and partial shading conditions.
In general, sub-MIC PV solar methods result in system initial cost increase compared with conventional methods mentioned earlier in this study, including the ones with and without bypass diodes. This is in order to generate more power from the same PV solar panels under mismatch and partial shading conditions. Therefore, a tradeoff exists between the cost and the harvested power/efficiency. The cost increase and efficiency are a function of the number of sub-MICs. The higher the number of sub-MICs, the higher the cost and the higher the amount of harvested power under mismatch and partial shading conditions. The controller and system that are evaluated in this study target cost reduction in the sub-MIC methods, especially when the number of sub-MICs in the system increases, by using the sub-MIC SOC-MPPT controller and architecture concept. However, based on the power converter and controller technology cost to date, the initial cost is still higher compared with that of the other conventional methods.
Possible future work can focus on developing hybrid PV solar systems that utilize a combination of bypass diode and sub-MIC concepts to further minimize the cost difference. Moreover, the decrease in the cost of the controller technology and power converter technology will naturally reduce the cost difference further.
Therefore, to make the sub-MIC architectures more cost effective in the future, progress in several areas might be needed. Examples of these areas include lower cost controller architectures that require less sensing and processing (as in this study), lower cost hardware-specific controllers and logic, lower cost power converters and power devices, and hybrid PV solar system architectures with cost-to-performance tradeoffs.
Acknowledgements
This work is funded in part by the U.S. Department of Agriculture (USDA) under USDA Project #58-3148-0-204 and in part by the Egyptian Science and Technology Development Funds (STDF) under STDF Project #1954. Any opinions, findings, and conclusions or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the views of the funding agencies.
BIO
Jaber A. Abu Qahouq received the B.Sc. degree (with first class honors) from Princess Sumaya University (PSUT)/Royal Scientific Society (RSS), Amman, Jordan, in 1998, and the M.S. and Ph.D. degrees from the University of Central Florida (UCF), Orlando, Florida, in 2000 and 2003, respectively, all in Electrical Engineering/Electronics. He is currently an associate professor at the Department of Electrical and Computer Engineering, The University of Alabama, Tuscaloosa. He was with Intel Corporation from August 2005 to January 2008. From January 2004 to August 2005, he was a visiting assistant professor and instructor with the School of Electrical Engineering and Computer Science, UCF, and was an adjunct faculty at UCF from January 2002 to December 2003. He was a research assistant/associate with the Florida Power Electronics Center, UCF, from 1999 to 2003. From 1998 to 1999, he was with the Royal Scientific Society (RSS), Electronic Services and Training Center (ESTC), Amman, Jordan. He led and worked on several projects funded by the NSF, USDA, Army Research Lab, NASA, Astec Power/Emerson, Intel, the University of Central Florida, and the University of Alabama, among others. Dr. Abu Qahouq is actively serving as a reviewer to several journal and conference publications including IEEE Transactions and conferences, chaired several conference sessions over the years, served as a technical program committee member of the IEEE PESC 2007 conference, as a review committee member of the IEEE ISCAS 2008 conference, as a technical program committee member of the IEEE ICECS 2009, 2010, and 2011 conferences, as a technical program committee member of the IEEE ECCE 2010, 2011, 2012, and 2013 conferences, a technical program committee member of the IEEE APEC 2013, 2014 and 2015 conferences, and as a member of the Intel mobile platforms patent committee (when he was with Intel Corporation), among others. Dr. Abu Qahouq is an editorial board member of the Advances in Electronics Journal, the International Scholarly Research Notices Journal, and served as an Editorial Board Member of the ISRN Electronics Journal. Dr. Abu Qahouq received the Division Recognition Award from the Systems Technology Lab, Corporate Technology Group, Intel Corporation in 2006, the IET Premium Award for Best Paper in 2009, the IEEE Outstanding Graduate Student Award in 2002, and the King of Jordan Royal Watch in 1998, among others. He has published many refereed journal and conference papers (100+) and holds several patents (fifteen US patents granted and many others pending as of June 2014). He is a senior member of IEEE.
Yuncong Jiang received the B.S. in Electrical Engineering (with honors) from the Shanghai University of Electric Power, Shanghai, China in 2009. He received the Ph.D. degree in Electrical Engineering from The University of Alabama, Tuscaloosa, USA, in 2013. He received Graduate Council Fellowship and Research and Creative Activity Fellowship from the University of Alabama in 2009 and 2011, respectively. His research interests include analog and digital control in power electronics, renewable energy research, power delivery system design, maximum power point tracking techniques in solar power systems, and DC-AC inverter design.
Mohamed Orabi received the M.S. degree from El-Minia University, El-Minia, Egypt, in 2000 and the Ph.D. degree from Kyushu University, Fukuoka, Japan, in 2004. He is currently an associate professor at Aswan University, Aswan, Egypt. He is the former director of the Aswan Power Electronics Application Research Center (APEARC), Aswan University. He has had industrial work experience with Enpirion Inc. and Altera Corp. for several years, where he was the senior manager of Altera-Egypt Technology Center. He has published more than 175 papers in international conferences and journals. His research interests include power electronics applications, including switched power supply DC-DC and AC-DC power factor correction converters, integrated power management, modeling and analysis of nonlinear circuits, and power converter design and analysis for renewable energy applications. Dr. Orabi is a reviewer for several IEEE journals and conferences under PELS, IES, IAS, CAS, Suitable Energy, and IET-PE Transactions and Conferences. He served as session chair of many related international conferences. He is an editorial board member of the International Journal of Electric Power Components and Systems, the Advances in Power Electronics Journal, and the International Journal on Advanced Electrical Engineering. He is a member of the Upper Egypt Industrial Training Council. Dr. Orabi has been invited to be a speaker for community and industrial workshops inside and outside Egypt. He was the recipient of the 2002 Excellent Student Award of the IEEE Fukuoka Section, the Best Paper Award of the 28th Annual Conference of the IEEE IES (2002), the IEEE-IES Student Grant from the 2003 IEEE International Symposium on Industrial Electronics, and the Best Young Research Award from the IEICE Society, Japan, in 2004. Dr. Orabi received the South Valley University Encouragement Award for 2009 and the National Encouragement Award in 2010 for his achievements in Engineering Science. He is a senior member of IEEE.
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