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Analysis and Design of a PFC AC–DC Converter with Electrical Isolation
Analysis and Design of a PFC AC–DC Converter with Electrical Isolation
Journal of Power Electronics. 2014. Sep, 14(5): 874-881
Copyright © 2014, The Korean Institute Of Power Electronics
  • Received : December 30, 2013
  • Accepted : May 03, 2014
  • Published : September 28, 2014
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About the Authors
Chia-Ching Lin
Department of Electrical Engineering, Far East University, Tainan City, Taiwan
Lung-Sheng Yang
yanglungsheng@yahoo.com.tw
Ren-Jun Zheng
Department of Electrical Engineering, Far East University, Tainan City, Taiwan

Abstract
This study presents a single-phase power factor correction AC–DC converter that operates in discontinuous conduction mode. This converter uses the pulse-width modulation technique to achieve almost unity power factor and low total harmonic distortion of input current for universal input voltage (90 V rms to 264 V rms ) applications. The converter has a simple structure and electrical isolation. The magnetizing-inductor energy of the transformer can be recycled to the output without an additional third winding. The steady-state analysis of voltage gain and boundary operating conditions are discussed in detail. Finally, experimental results are shown to verify the performance of the proposed converter.
Keywords
DCMPFCPWMTHDi
I. INTRODUCTION
DC power sources are widely used in industrial products and consumer electronics, such as battery chargers, DC power supplies, uninterruptible power supplies, inverters, and instruments. Thus, AC–DC power conversion is an important consideration. Diode-bridge or thyristor rectifiers can realize AC–DC power conversion, but such rectifiers will result in power pollution, including pulsating input current, low power factor, and high total harmonic distortion of input current(THD i ). Several power factor correction (PFC) AC–DC converters have been investigated to address these issues. These converters possess non-isolated and isolated topologies. Non-isolated topologies include the boost [1] - [4] , buck [5] - [7] , buck-boost [8] - [10] , Cuk [11] , SEPIC [12] , [13] , and ZETA types [14] . These converters are operated in continuous conduction mode and discontinuous conduction mode (DCM) for different output-power applications. Isolated topologies include forward [15] - [17] and flyback types [18] - [20] . The forward types achieve low output voltage ripple and high THD i . Nevertheless, this converter requires the third winding to recycle the magnetizing-inductor energy of the transformer. The flyback types are shown in Fig. 1 (a). This converter achieves high power factor and low THD i . Moreover, flyback types have a simple structure and low cost but have low efficiency because of the transformer leakage inductor. The clamping method is presented in [21] , [22] to recycle leakage inductor energy. However, this method makes the power circuit complicated.
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(a) Conventional single-phase AC–DC flyback converter and (b) proposed single-phase AC–DC converter.
We propose a single-phase PFC AC–DC converter, as shown in Fig. 1 (b). The proposed converter circuit configuration is very simple. The configuration includes only a set of input filter Lf Cf , a diode-bridge rectifier, a transformer Tr , an inductor L 1 , an output diode Do , and an output capacitor Co . The proposed converter does not have the transformer leakage inductor issue associated with the flyback converter. Moreover, transformer magnetizinginductor energy can be recycled to the output without an additional third winding. This converter is operated in DCM by using the pulse–width modulation technique to achieve high power factor and low THD i for universal input-voltage applications.
II. OPERATING PRINCIPLES
The equivalent circuit of the proposed converter is shown in Fig. 2 . The transformer is modeled as a magnetizing inductor Lm and an ideal transformer. Some key waveforms in a half line-source period are shown in Fig. 3 . The operating principle is analyzed as 0 < ωt < π, where ω is the line angular frequency, because of the symmetrical characteristics of the single-phase system.
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Equivalent circuit of proposed converter.
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Key waveforms of the proposed converter for 0<ωt<π.
Mode 1, [kTs, tk1]: S 1 is switched on. The current- flow path is shown in Fig. 4 (a). The line source energy is transferred to the magnetizing inductor Lm of the transformer and the inductor L 1 . Thus, the currents iLm and i L 1 are increased linearly. Given that magnetizing inductor Lm is significantly larger than inductor L 1 , the magnetizing-inductor current iLm becomes lower than inductor current i L 1 . The energy stored in magnetizing inductor Lm is the residual magnetism of the transformer. The energy stored in output capacitor Co is discharged to load R . This mode ends when S 1 is switched off.
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Current flow path of the proposed converter for 0<ωt<π.
Mode 2, [tk1, tk2]: S 1 is switched off. The current-flow path is shown in Fig. 4 (b). The energies stored in magnetizing inductor Lm and inductor L 1 are released to output capacitor Co and load R . The currents iLm and i L 1 are decreased linearly. This mode ends when the currents iLm and i L 1 are equal to zero. Therefore, the transformer residual magnetism can be released to empty during each switching period.
Mode 3, [tk2, (k+1)Ts]: S 1 remains switched off. The current-flow path is shown in Fig. 4 (c). The energies stored in magnetizing inductor Lm and inductor L 1 are empty at t = tk2 . The energy stored in output capacitor Co is discharged to load R . This mode ends when S 1 is switched on at the beginning of the next switching period.
III. STEADY-STATE ANALYSIS
Given that the single-phase system is symmetrical, the following analysis is discussed for 0 < ωt < π. For simplicity, the effect of the input filter is neglected. The line voltage is given by
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where Vrms and Vm are the root-mean-square value and line voltage amplitude, respectively. The line voltage is considered a piecewise constant during each switching period because switching frequency fs is larger than line frequency f 1 . If m is the switching number within [0, π/ ω ], then m is equal to fs /2 f 1 . The following analysis is considered during switching period [ kTs , ( k +1) Ts ], where k = 0, 1, ….., m -1. The magnetizing inductor Lm is ignored in the following analysis because it is significantly larger than inductor L 1 .
When S 1 switched turned on, the voltage across inductor L 1 is obtained as
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where es(tk) is the input-voltage level during switching the period [ kTs , ( k +1) Ts ], and the turns ratio of transformer n = N 2 / N 1 . Then,
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The inductor current i L 1 is given by
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When t is equal to t k 1 , the peak value of inductor current i L 1 is
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where ton = t k 1 kTs = dTs .
When S 1 is switched off, the voltage across inductor L 1 is given by
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Then,
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By solving (7), we derive the inductor current i L 1 as follows:
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Given that i L 1 ( t k 2 ) = 0, the peak value of inductor current i L 1 is
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where tr,k = t k 2 t k 1 .
Using (5) and (9), time duration tr,k can be given by
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- A. Power Factor Correction
As shown in Fig. 3 , the average value of unfiltered input current i N 1 in one switching period Ts can be computed as
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where i L 1 p is the inductor current peak value for each switching period. Substituting (1) and (5) into (11), we derive the following equation:
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The average value of unfiltered input current i N 1 is sinusoidal and in phase with the input voltage. Moreover, the harmonic components of current i N 1 are distributed over the switching frequency multiples. The harmonic components are easily filtered out by using input filter Lf Cf . The input filter cutoff frequency is significantly lower than the switching frequency.
- B. Voltage Gain
From Fig. 3 , the average value of the output-capacitor current ico during [ kTs , ( k +1) Ts ] can be obtained as
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Substituting (1), (5), and (10) into (13) yields
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The average value of output–capacitor current ico during a half line-source period [0, π/ ω ] is written as follows:
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Given that m is larger than 1, equation (15) is approximated as:
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The output voltage differential equation is given by
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The DC model equation is written as
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where Vo and D are the DC quantities of vo and d , respectively.
The normalized inductor time constant is then defined as
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Substituting (19) into (18), the voltage gain is derived as
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- C. Boundary Condition
The current i L 1 must be zero in each switching period to ensure that the proposed converter is operated in DCM. From Fig. 3 , time duration ts,k is obtained as
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When the maximum value of ts,k is equal to Ts and | es | is equal to Vm , the proposed converter is operated in boundary conduction mode. Therefore, substituting ts,k = Ts and | es | = Vm into (21) can determine the boundary voltage gain as
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Using (20) and (22), the curves of voltage gain and boundary voltage gain are shown in Fig. 5 . When the voltage gain M is equal to its boundary voltage gain Mbc , the boundary normalized inductor time constant τ L 1 B is given by
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Voltage gain and boundary voltage gain (under n = 0.5).
τ L 1 B is plotted in Fig. 6 . We can observe that the proposed converter is operated in DCM when τ L 1 < τ L 1 B .
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Boundary operating condition.
IV. SELECTIONS OF INDUCTOR AND CAPACITOR
- A. Selection of Inductor L1
The appropriate τ L 1 B is selected under the required voltage gain to ensure that the proposed converter is operated in DCM. The inductor L 1 needs to satisfy the following inequality:
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- B. Selection of Output Capacitor Co
Using (14), the average value of output–capacitor current ico during one switching period is simplified as follows:
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Substituting (18) into (25), output–capacitor current ico is expressed as
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Therefore, the output voltage ripple in one switching period is given by
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Then, the output voltage ripple function during time interval [0, π/ ω ] is obtained as
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Using (28), the output voltage ripple during time interval [0, π/ ω ] is derived as
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Thus,
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Output capacitor Co must satisfy the following inequality to meet the following output voltage ripple percentage specification:
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V. EXPERIMENTAL RESULTS
The prototype circuit is applied in the laboratory to demonstrate the performance of the proposed converter. Electrical specifications and circuit components are set as follows:
  • - Input voltageVrms= 90 V to 264 V (Vm= 127 V to 373 V)
  • - Output voltageVo= 100 V
  • - Line frequencyf1= 60 Hz
  • - Switching frequencyfs= 50 kHz
  • - Output powerPo= 20 W to 100 W (R= 100 Ω to 500 Ω)
  • - TransformerTr:n= 0.5 (60 turns:30 turns), core ETD–49,Lm= 850μH
  • - Input filterLf= 3.6 mH andCf= 330 nF
  • - SwitchS1: IXFR34N80
  • - DiodeDo: DSEC30–04A
The voltage gain M is varied from 0.27 to 0.79 according to the electrical specifications. Substituting M = 0.79 and n = 0.5 into (22), the maximum duty ratio Dmax is derived as 0.61. Substituting Dmax = 0.61 into (23), τ L 1 B is obtained as 0.038. Using (24), the inductor L 1 is given by
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The inductor L 1 is 60 μ H, and the core is EI-40. Thus, τ L 1 is equal to 0.03 at full load R = 100 Ω and is equal to 0.006 at light load R = 500 Ω. Substituting the two values of τ L 1 and n = 0.5 into (20), the operating area of the experimental prototype is shown in Fig. 7 . The proposed converter is operating in DCM.
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Operating range of the prototype circuit.
Under the operating conditions Vrms = 90 V and R = 100 Ω, M and τ L 1 are derived as 0.79 and 0.03, respectively. Substituting M = 0.79, n = 0.5, and τ L 1 = 0.03 into (20), duty ratio D is obtained as 0.55. The ripple percentage of Vo is selected as 5%. From (31), the output capacitor inequality is given by
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Thus, output capacitor Co is selected as 600 μ F.
The control circuit is shown in Fig. 8 . Figs. 9 and 10 show the experimental waveforms under Vrms = 115 V, Vo = 100 V, Po = 100 W and Vrms = 230 V, Vo = 100 V, Po = 100 W, respectively. In Figs. 9 (a) and 10 (a), we observe that input current is sinusoidal and is in phase with input voltage. The current waveforms of the transformer primary and secondary sides i N 1 and i N 2 are shown in Figs. 9 (b) and 10 (b), respectively. The waveforms are taken at the peak value of input voltage. The current i N 2 drops to zero during each switching period, which indicates that the transformer residual magnetism is released to empty during each switching period. The currents i L 1 and iDo are shown in Fig. 9 (c) and 10 (c), respectively. We observe that the proposed converter is operated in DCM. The waveform v S 1 across the switch drain source is shown in Figs. 9 (d) and 10 (d). The measured efficiencies of the proposed converter and flyback converter are compared in Fig. 11 . We observe that efficiency is improved in the proposed converter. The measured power factor and THD i are shown in Fig. 12 . The measured power factor is higher than 0.96, whereas the measured THD i is lower than 5.8%.
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Control circuit of the proposed converter.
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Experimental waveforms at 115–Vrms line voltage: (a) es and is, (b) iN1 and iN2, (c) iL1 and iDo, (d) vS1.
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Experimental waveforms at 230–Vrms line voltage: (a) es and is, (b) iN1 and iN2, (c) iL1 and iDo, (d) vS1
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Measured efficiency for the proposed converter and conventional flyback converter.
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Measured results: (a) power factor and (b) THDi.
VI. CONCLUSIONS
The forward and flyback PFC AC–DC converters are efficient choices for electrical isolation because of their simple structure. However, the forward AC–DC converter cannot achieve high power factor and low THD i . Additionally, this converter requires a third winding to recycle transformer magnetizing inductor energy. The flyback AC–DC converter can achieve high power factor and low THD i . Nevertheless, the transformer leakage inductor results in low efficiency. Therefore, we present a single-phase AC–DC converter that has a simple structure and is operated in DCM to achieve high power factor and low THD i . A steady-state analysis is conducted. We implement a hardware circuit with simple control logic in the laboratory. The experimental results reveal the performance of the converters. The measured efficiencies reveal that the proposed converter exhibited higher efficiency than the conventional flyback converter.
Acknowledgements
The authors gratefully acknowledge the financial support from the National Science Council of Taiwan under project NSC 102-2221-E-269-010.
BIO
Chia-Ching Lin was born in Taiwan, R.O.C., in 1959. He graduated from the Department of Electrical Engineering , Far East University, in 1980. He received his M.S. degree in Electrical Engineering from National Cheng-Kung University in 2006. He is currently with the Department of Electrical Engineering, Far East University, Tainan, where he is an Assistant Professor. His research interests are power factor correction and dc-dc converters..
Lung-Sheng Yang was born in Taiwan, R.O.C., in 1967. He received his B.S. degree in Electrical Engineering from National Taiwan Institute of Technology, Taiwan, his M.S. degree in Electrical Engineering from National Tsing-Hua University, Taiwan, and his Ph.D degree in Electrical Engineering from National Cheng-Kung University in 1990, 1992, and 2007, respectively. He is currently with the Department of Electrical Engineering, Far East University, Tainan, where he is an Assistant Professor. His research interests are power factor correction, dc-dc converters, renewable energy conversion, and electronic ballasts.
Ren-Jun Zheng was born in Taiwan, R.O.C., in 1987. He received his B.S. and M.S. degrees from the , and 2007, respectively. He is currently with the Department of Electrical Engineering, Far East University, in 2011 and 2013, respectively. His research interests include power factor correction converter and electronic ballasts.
References
Tahami F. , Poshtkouhi S. , Ahmadian H. M. 2011 “Piecewise affine control design for power factor correction rectifiers,” Journal of Power Electronics 11 (3) 327 - 334    DOI : 10.6113/JPE.2011.11.3.327
Yao K. , Ruan X. , Mao X. , Ye Z. 2012 “Reducing storage capacitor of a DCM boost PFC converter,” IEEE Trans. Power Electron. 27 (1) 151 - 160    DOI : 10.1109/TPEL.2011.2105507
Wang J. M. , Wu S. T. , Jiang Y. , Chiu H. J. 2011 “A dual-mode controller for the boost PFC converter,” IEEE Trans. Ind. Electron. 58 (1) 369 - 372    DOI : 10.1109/TIE.2010.2051391
Kimy Y. C. , Jin L. , Lee J. , Choi J. 2010 “Direct digital control of single-phase AC/DC PWM converter system,” Journal of Power Electronics 10 (5) 518 - 527    DOI : 10.6113/JPE.2010.10.5.518
Alonso J. M. , Costa M. A. D. , Ordiz C. 2008 “Integrated buck-flyback converter as a high-power-factor off-line power supply,” IEEE Trans. Ind. Electron. 55 (3) 1090 - 1100    DOI : 10.1109/TIE.2007.908530
Itoh R. , Ishizaka K. , Oishi H. , Okada H. 1999 “Single-phase buck rectifier employing voltage-reversal circuit for sinusoidal input current waveshaping,” IEE Electr. Power Appl. 146 (6) 707 - 712    DOI : 10.1049/ip-epa:19990469
Jang Y. , Jovanovic M. M. 2011 ”Bridgeless high-power-factor buck converter,” IEEE Trans. Power Electron. 26 (2) 602 - 611    DOI : 10.1109/TPEL.2010.2068060
Cheng H. L. , Hsieh Y. C. , Lin C. S. 2011 “A novel single stage high-power-factor AC/DC converter featuring high circuit efficiency,” IEEE Trans. Ind. Electron. 58 (2) 524 - 532    DOI : 10.1109/TIE.2010.2047825
Andersen G. K. , Blaabjerg F. 2006 “Current programmed control of a single-phase two-switch buck-boost power factor correction circuit,“ IEEE Trans. Ind. Electron. 53 (1) 263 - 271    DOI : 10.1109/TIE.2005.862252
Alonso J. M. , Vina J. , Vaquero D. G. , Martinez G. , Osorio R. 2012 “Analysis and design of the integrated double buck-boost converter as a high-power-factor driver for power-LED lamps,“ IEEE Trans. Ind. Electron. 59 (4) 1689 - 1697    DOI : 10.1109/TIE.2011.2109342
Fardoun A. A. , Ismail E. H. , Sabzali A. J. , Al-Saffar M. A. 2012 “New efficient bridgeless Cuk rectifiers for PFC applications,” IEEE Trans. Power Electron. 27 (7) 3292 - 3301    DOI : 10.1109/TPEL.2011.2182662
Ismail E. H. 2009 “Bridgeless SEPIC rectifier with unity power factor and reduced conduction losses,” IEEE Trans. Ind. Electron. 56 (4) 1147 - 1157    DOI : 10.1109/TIE.2008.2007552
Mahdavi M. , Farzanehfard H. 2011 “Bridgeless SEPIC PFC rectifier with reduced components and conduction losses,” IEEE Trans. Ind. Electron. 58 (9) 4153 - 4160    DOI : 10.1109/TIE.2010.2095393
Zhang H. , Zhang Y. , Ma X. 2012 “Distortion behavior analysis of general pulse-width modulated zeta PFC converter operating in continuous conduction mode,” IEEE Trans. Power Electron. 27 (10) 4212 - 4223    DOI : 10.1109/TPEL.2012.2191161
Chang L. K. , Liu H. F. 2005 “A novel forward AC/DC converter with input current shaping and fast output voltage regulation via reset winding,” IEEE Trans. Ind. Electron. 52 (1) 125 - 131    DOI : 10.1109/TIE.2004.841103
Nagao M. 2000 “A novel one-stage forward-type power factor correction circuit,” IEEE Trans. Power Electron. 15 (1) 103 - 110    DOI : 10.1109/63.817368
Daniele M. , Jain P. K. , Joos G. 1999 “A single-stage power factor corrected AC/DC converter,” IEEE Trans. Power Electron. 14 (6) 1046 - 1055    DOI : 10.1109/63.803398
Singh B. , Chaturvedi G. D. 2007 “Analysis, design and development of a single switch Flyback buck-boost AC-DC converter for low power battery charging applications,” Journal of Power Electronics 7 (4) 318 - 327
Zhang J. , Lu D. D. C. , Sun T. 2010 “Flyback-based single stage power-factor-correction scheme with time-multiplexing control,” IEEE Trans. Ind. Electron. 57 (3) 1041 - 1049    DOI : 10.1109/TIE.2009.2028336
Lazaro A. , Barrado A. , Sanz M. , Salas V. , Olias E. 2007 “New power factor correction AC-DC converter with reduced storage capacitor voltage,” IEEE Trans. Ind. Electron. 54 (1) 384 - 397    DOI : 10.1109/TIE.2006.888795
Siu K. W. , Lee Y. S. 2000 “A novel high-efficiency flyback power-factor-correction circuit with regenerative clamping and soft switching,” IEEE Trans. Circuits Syst. I, Fundam. Theory Appl. 47 (3) 350 - 356    DOI : 10.1109/81.841917
Papanikolaou N. P. , Tatakis E. C. 2004 “Active voltage clamp in flyback converters operating in CCM mode under wide load variation,” IEEE Trans. Ind. Electron. 51 (3) 632 - 640    DOI : 10.1109/TIE.2004.825342