This study analyzes the mathematical relationship between DClink voltage and system parameters for shunt active power filters (APFs). Analysis and mathematical deduction are used to determine the required minimum DClink voltage for APF. A novel adaptive DClink voltage controller for the threephase fourwire shunt APF is then proposed. In this controller, the DClink voltage reference value will be maintained at the required minimum voltage level. Therefore, power consumption and switching loss will effectively decrease. The DClink voltage can also adaptively yield different DClink voltage levels based on different harmonic currents and grid voltage levels and thus avoid the effects of harmonic current and grid voltage fluctuation on compensation performance. Finally, representative simulation and experimental results in a threephase fourwire centersplit shunt APF are presented to verify the validity and effectiveness of the minimum DClink voltage design and the proposed adaptive DClink voltage controller.
I. INTRODUCTION
The rapid development of power electronics technology over the past decades resulted in the wide installation of power electronic devices. A large number of harmonic currents were injected into the grid; these currents consequently degraded power quality and negatively affected power systems
[1]
. As a result, harmonic control has become a widely studied issue
[2]
. Active power filters (APFs) can detect and compensate system harmonics and reactive power in real time, thus reducing the harmonic effect on the grid and ensuring efficient operation
[3]
. Compared with passive filters, APFs exhibit superior dynamic response, realtime capability, and controllability, which make these filters ideal for compensating harmonics and improving power quality
[4]
.
To ensure the proper operation of APFs, DClink voltage must be stabilized at a sufficiently high level, which ensures that the APF production of compensating current strictly adheres to control requirements to achieve the desired compensation effect
[5]
. However, high DClink voltage requires large capacity to withstand capacitor voltage. This requirement significantly increases power consumption. Moreover, high DClink voltage increases switching loss and switching noise
[6]
,
[7]
. Therefore, the design of DClink voltage value is an important task that requires detailed quantitative analysis and specification.
Only a few studies have investigated the APF control algorithm with DClink voltage control
[8]

[10]
, and discussion on the mathematical deduction of the minimum DClink voltage for APF is limited. In
[11]
, the effect of DClink voltage on APF compensation characteristic was examined by focusing on the 5th negative and 7th positive harmonic sequences. The lowest required DClink voltage is presented for the linear modulation range. However, focusing only on the 5th and 7th harmonics is insufficient, and the method used to determine a DClink voltage was extremely complex to implement. In
[12]
, the influence of DClink voltage on APF the performance was analyzed, and a specification of the DClink voltage rated value was presented. However, the Fourier transform analysis of harmonic current to obtain the expression used in this research only focused on a specified harmonic. Thus, various harmonics in practical applications may present a potential problem. In
[13]

[15]
, a minimum DClink voltage design for a power quality compensator and threephase fourwire APFs with and without a neutral inductor were proposed. However, the influence of DClink voltages, which were larger than the minimum value, on system performance was not investigated. Based on the analysis in
[13]

[15]
, an adaptive DClink voltage controller in which the DClink voltage can be adaptively changed according to different reactive power compensations was deduced and proposed for the LC coupling hybrid APF with and without a neutral inductor
[16]
,
[17]
. However, the inherent influence between the reactive power compensation and the DClink voltage control was not discussed, and the proposed adaptive DClink voltage control algorithm did not consider the harmonic current.
An adaptive DClink voltage control algorithm for the threephase fourwire centersplit shunt APF remains lacking. In practical applications, grid voltage level varies under certain conditions, such that a large fluctuation may occur. The existing literature is deficient in that no mathematical deduction considered the APF DClink voltage, the load harmonic current, and grid voltage level, and most shunt APF topologies operate at a fixed DClink voltage level
[5]
–
[12]
[18]

[21]
. In such case, changes in load may affect the performance of APFs with a fixed DClink voltage. Moreover, APF compensation performance may not be guaranteed when the load harmonic current and grid voltage level fluctuate. Power consumption and switching loss are directly proportional to DClink voltage
[22]
, which suggests that APF will incur a large power consumption and high switching loss if high DClink voltage is used, and vice versa. Therefore, if the DClink voltage can be adaptively changed according to the variation of harmonic current and grid voltage level, the APF can operate under different minimum required DClink voltage level s, such that compensation performance can be guarantee with low power consumption and switching loss.
The remainder of this paper is organized as follows: Section II presents a threephase fourwire centersplit shunt APF and its corresponding singlephase equivalent circuit model. Section III takes this model as a basis to analyze the relationship between DClink voltage and system parameters, such that the required minimum DClink voltage for APF can be deduced. Section IV presents the adaptive DClink voltage controller for threephase fourwire shunt APFs. Sections V and VI discuss the simulation and experimental verification of the minimum DClink voltage deduction and the proposed adaptive DClink voltage controller, respectively. Finally, Section VII concludes.
II. THREEPHASE FOURWIRE CENTERSPLIT SHUNT APF AND ITS SINGLEPHASE CIRCUIT MODEL
The circuit of the threephase fourwire centersplit shunt APF is shown in
Fig. 1
.
u_{SX}
is the grid voltage, and
u_{CX}
is the inverter voltage.
i_{SX}
,
i_{LX}
, and
i_{CX}
are the grid, load, and compensating currents for each phase, respectively, where subscript
x
denotes phases
a
,
b
,
c
, and
n
.
C_{dc}
and
U_{dc}
are the DClink capacitor and DClink voltages, respectively, and the upper and lower DClink capacitor voltages are
U_{dcU}
=
U_{dcL}
= 0.5
U_{dc}
.
L_{S}
is the grid inductor and is normally neglected because of its relatively low value. The nonlinear load is composed of a threephase fullbridge rectifier and a resistance
R_{L}
, which serves as a harmonicproducing load. The LCL filter that consists of
L_{C}
,
L_{G}
, ad
C_{F}
is used to filter out the harmonics at switching frequency.
R_{d}
is used to suppress the resonance peak of the LCL filter at resonance frequency and to maintain system stability.
Circuit of the threephase fourwire centersplit shunt APF.
The singlephase equivalent circuit model from the threephase fourwire centersplit shunt APF circuit configuration is shown in
Fig. 2
.
u_{S}
is the grid voltage,
u_{C}
is the inverter voltage,
u_{L}
is the inductor voltage, and
i_{C}
is the compensating current. An LCL filter behaves in a manner similar to an inductor at a lowfrequency range below 2.5 kHz, and the common APF output current requirement depends on the 50th harmonic; thus, only the frequency range below 2.5 kHz have to be considered in control system design
[23]
. As a result, the LCL filter can reasonably be simplified as an inductor in the lowfrequency range. The inductance value of this filter is determined by
L
=
L_{C}
+
L_{G}
, whereas
R
is the equivalent resistance of the inductor.
III. MINIMUM DCLINK VOLTAGE DEDUCTION FOR THE THREEPHASE FOURWIRE SHUNT APF
According to Kirchhoff’s voltage law, the following voltage equation can be obtained by employing the singlephase equivalent circuit in
Fig. 2
:
APF singlephase equivalent circuit model.
To facilitate a detailed analysis, the grid and inverter voltages are defined as
where
U_{sn}
is the effective value of the grid voltage;
U_{c1}
and
U_{cn}
are the effective values of the fundamental and
n^{th}
components of the inverter voltage, respectively;
ω
is the fundamental angular frequency; and
θ
and
φ
represent the initial phase angles of each component.
Assuming that the nonlinear load current
i_{L}
is composed of the load fundamental current
i_{L1}
and the load harmonic current
i_{Lh}
, we derive
where
I_{L1}
and
I_{Lh}
are the effective values of the fundamental and
n^{th}
harmonic currents, respectively.
Assuming that the APF output current
i_{C}
is composed of the fundamental component
i_{C1}
and the harmonic component
i_{Ch}
, we derive
The fundamental current
I_{C1}
, which maintains the DClink voltage and system power loss, is very small (
I
_{c1}
≈ 0 ) under a steadystate situation, such that the fundamental component of the APF output current
i_{C1}
can be simply neglected under a steady state (
i_{C1}
= 0)
[16]
. To compensate the load harmonics, the effect of the nonlinear loads on power grid is eliminated by ensuring that the compensating harmonic current generated by APF is equal to the harmonic component of load current. Therefore, the APF output current
i_{C}
can be rewritten as
Substituting (2), (3), and (6) into (1), the voltage equation becomes
According to Euler’s formula, the grid voltage, inverter voltage, and compensating current can be expressed as
where Re [*] is the operation symbol for extracting the real part of plural.
Substituting (8) into (7), the voltage equation becomes
In (9), the corresponding parts on both sides of the equation are the same frequency sinusoidal vector. Thus, Equation (10) can be derived when the real part extracting operation symbol Re is removed from either side of Equation (9).
In (10), the real and imaginary parts on both sides of the equation are equal. Thus, the following equations can be obtained:
The mold length of the inverter output voltage vector is defined as
According to (11) and (12), the maximal mold length of the inverter voltage vector can be expressed as
To provide sufficient DClink voltage to compensate the load harmonic current, the relationship between the DClink voltage and the maximal value of inverter voltage mold is given by
where
m
denotes the modulation index.
APF must be capable of producing a voltage that exceeds the maximal value of the inverter voltage vector mold to compensate the harmonic current produced by the nonlinear load completely. Substituting (13) into (14), the minimum DClink voltage for the singlephase equivalent circuit model is obtained as
Some conclusions can be inferred from (15). First, with different grid voltage levels, coupling inductor values, equivalent resistances of the inductor, modulation indexes, and harmonic current contents, the APF requires different minimum DClink voltage levels for operation. In addition, the value of the output inductor and its equivalent resistor affect the pulsewidth modulation inverter output voltage component and the required minimum DClink voltage, which should be considered in designing the output LCL filter. The modulation index is also an important factor to determine the minimum DClink voltage level. Thus, the required DClink voltage when using the Space Vector Pulse Width Modulation (SVPWM ) modulation method (
m
= 1.1547)
[24]
is lower than that when using the triangular PWM method (
m
= 1).
The current harmonics in each phase can be independently compensated in the threephase fourwire APF
[25]
. Thus, the final required minimum DClink voltage for the threephase fourwire centersplit APF will be the maximum among the calculated minimum values of each phase, as expressed in (15). Thus, the deduced minimum DClink voltage expression can be used for both balanced and unbalanced loads.
IV. MINIMUM DCLINK VOLTAGE DEDUCTION FOR THE THREEPHASE FOURWIRE SHUNT APF
Equation (15) can be rewritten as
The right side of (17) can be written as
In (18), Δ
U
can be considered as the load harmonic contents that have to be compensated, as determined by the harmonic current. Δ
U
will increase when the harmonic current increases but decrease when the harmonic current decreases. In practical applications, the harmonic current frequently varies. Thus, the required minimum DClink voltage will change with harmonic current variation. However, the APF topologies operate at a fixed DClink voltage level in most existing studies
[5]
–
[12]
. According to the minimum DClink voltage deduction, when the harmonic current decreases, a low DClink voltage can facilitate normal APF function, which indicates that a fixed DClink voltage results in additional power consumption and switch loss. Moreover, when the harmonic current increases, the DClink requires a higher voltage level to ensure normal operation. In other words, a fixed DClink voltage may result in an insufficient DClink voltage that affects the normal operation and compensation effect of APF.
Based on (17) and (18), the left side of (17) can be written as
Equation (19) shows that Δ
U
can also be considered as the capability of APF to output a harmonic compensating current. Therefore, when the current modulation method in which the modulation index
m
is fixed has been determined, both DClink voltage and grid voltage level affect the APF output compensating current capability and consequently influence APF compensation performance. Increasing the DClink voltage can increase Δ
U
and thus improve APF compensation capability. Conversely, decreasing the DClink voltage will reduce Δ
U
and thus diminish APF compensation capability. Similarly, decreasing the grid voltage level increases Δ
U
larger and thus improves APF compensation performance, whereas increasing the grid voltage level decreases Δ
U
and thus deteriorates APF compensation performance.
In the literature, APF topologies operate at a fixed DClink voltage level
[5]
–
[12]
. However, in industrial applications, the grid voltage level is not constant. Such level may vary under certain circumstances and may even exhibit large fluctuations. Thus, APF is generally designed to function normally under the condition of grid voltage level fluctuation within ±10% . When the grid voltage level drops, low DClink voltage can still achieve comparable compensation capability. That is, fixed DClink voltage results in additional power consumption. Furthermore, when the grid voltage level increases, the capability of the APF output compensating current will decrease at a fixed DClink voltage. Assuming that the effective value of the grid voltage is
U_{sn}
= 220 V, the modulation index is
m
= 1.1547, and the LCL output filter inductance is
L
= 0.45 mH
[23]
. These system parameters are listed in
Table I
of Section V. The increase in APF output compensating current with increasing grid voltage level is shown in
Fig. 3
. When the APF is operated under normal condition
U_{sn}
= 220 V, the peak value of the APF output 5th harmonic compensating current is
i_{5th}
= 14.5 A. When the effective values of the grid voltage increase to
U_{sn}
= 225, 231, 236, and 242 V, the values of the APF output 5th harmonic compensating current decrease to
i_{5th}
= 13.8, 13.1, 12.3, and 11.5 A at a percentage decline of approximately 4.83%, 9.66%, 15.17%, and 20.69%, respectively. Furthermore, the peak value of the APF output 7th harmonic compensating current is
i_{7th}
= 7.25 A when
U_{sn}
= 220 V. When the effective values of the grid voltage increase to
U_{sn}
= 225, 231, 236, and 242 V, the values of the APF output 7th harmonic compensating current decrease to
i_{5th}
= 6.87, 6.5, 6.01, and 5.5 A at a percentage decline of approximately 5.24%, 10.34%, 17.11%, and 23.14%, respectively. A similar phenomenon occurs in other order harmonic compensating currents. In this situation, the APF output compensating current capability decreases. Consequently, compensation performance may not be guaranteed.
Capability of APF compensating current change with various grid voltage levels.
To solve the abovementioned problems, an adaptive DClink voltage controller for the threephase fourwire shunt APF is proposed in this section. This controller consists of three main blocks: determination of minimum DClink voltage, adaptive reference DClink voltage level, and DClink voltage feedback PI controller blocks. The proposed adaptive DClink voltage control block diagram for the threephase fourwire shunt APF is shown in
Fig. 4
.
Proposed adaptive DClink voltage control block diagram for the threephase fourwire shunt APF.
 A. Determination of Minimum DClink Voltage
The required minimum DClink voltage
U_{dcmin}
for APF can initially be calculated according to the deduction in Section III. Based on the grid voltage level, coupling inductor value, modulation index, and harmonic current contents, the required minimum DClink voltage value for APF is set from (1) to (16). When The minimum DClink voltage value is affected by other factors, such as the change in the inductance and resistance values at different temperatures during operation. When these factors are considered, a voltage margin
U_{dcmar}
, which is shown in Equation (20), would be added to the minimum DClink voltage level to avoid an insufficient DClink voltage level even when the parameters of the output inductance filter and its equivalent resistance exhibit a 20% variation. This condition enhances the reliability of the block and absolutely guarantees the normal operation of APF.
To implement the adaptive DClink voltage control function,
U_{dcref}
=
U_{dcmin}
+
U_{dcmar}
can be simply treated as the initial reference DClink voltage.
 B. Adaptive DClink Voltage Reference Level
Based on Equation (18), the reference DClink voltage can be written as
Equation (21) shows that the reference DClink voltage
U_{dcref}
is determined by Δ
U
and
U_{sn}
. An adaptive controller can be designed to adjust the DClink voltage reference value when the harmonic current and grid voltage level fluctuate.
Given that Δ
U
changes with harmonic current variation, determining different values requires the minimum DClink voltage level. The adaptive DClink voltage controller will adjust the DClink voltage value when the harmonic current content changes, thus maintaining the DClink voltage at the required minimum DClink voltage and avoiding a case in which DClink voltage is insufficient.
However, the required minimum DClink voltage may frequently change as the load harmonic current varies, which randomly occurs. In this situation, the frequent change causes a rapid DClink voltage fluctuation, which deteriorates APF operational performance. To mitigate this problem, the initial reference DClink voltage will not be reset until a significant change in load is detected, such that the reference DClink voltage can be maintained as a constant value within a specific range.
The controller will adaptively yield different DClink voltage reference levels not only when the harmonic current changes, but also when the grid voltage level changes. The APF output harmonic current capability after applying the adaptive controller is shown in
Fig. 5
. Compared with that in
Fig. 3
without the adaptive controller, the peak value of the APF output 5th harmonic compensating current is still maintained at approximately
i_{5th}
= 14.4 A, although the effective value of the grid voltage increases to
U_{sn}
= 225, 231, 236, and 242 V. In addition, the APF output 7th, 11th, 13th, 17th, and 19th harmonic compensating currents are also maintained at approximately
i_{7th}
= 7.25 A,
i_{11th}
= 4 A,
i_{13th}
= 2 A,
i_{17th}
= 1.75 A, and
i_{19th}
= 1 A, respectively. This result shows that when the adaptive voltage controller is applied, the APF output compensating capability is unaffected by grid voltage level fluctuation.
Capability for APF compensating current change with various grid voltages when the adaptive voltage controller is applied.
Nevertheless, the DClink reference voltage may frequently change as the grid voltage varies occasionally. To mitigate this problem, the final reference DClink voltage is classified into certain levels for selection. This classification depends on the different ranges of grid voltage level, as shown in
Fig. 4
, such that the reference DClink voltage can be maintained as a constant value within a specific range
[26]
. In this way, the problem with DClink voltage reference value fluctuation under adaptive voltage control method can be addressed. Finally, when the modulation index
m
and Δ
U
determined by harmonic current are fixed, the DClink voltage reference value will be automatically adjusted with the variation of grid voltage level. The DClink voltage reference value range is shown in
Fig. 6
.
DClink voltage reference value range when using the adaptive voltage controller.
The switching loss of the switching device can be classified as turnon and turnoff losses. Equation (22) gives the total turnon and turnoff power losses
[22]
, where
U_{dc}
,
I_{CM}
,
I_{CN}
,
t_{RN}
,
t_{FN}
, and
f_{SW}
are the DClink voltage, maximum collector current, rated collector current, rated rise time, rated fall time, and switching frequency, respectively. Thus, a higher APF DClink voltage results in a higher the switching loss, and vice versa
[15]
[22]
. If the DClink voltage adaptively yields at the minimum DClink voltage level according to different harmonic currents and grid voltage levels, the APF performance, power consumption, and switching loss will be optimized.
 C. DClink Voltage Feedback PI Controller
The APF can effectively control the DClink voltage by feedbacking the DClink voltage error signal as a positive fundamental active current component. The PI controller is applied to the DClink voltage control loop. The DClink capacitor can obtain energy and maintain a constant value through appropriate control. The difference between the DClink reference voltage and the actual DClink voltage is regulated by a PI regular. After regulation, the signal is added to the instantaneous positive fundamental active current component. Therefore, the reference current signal contains a fundamental active current, which indicates that the compensating current contains a fundamental active current component. This condition ensures the energy exchange between the DC and AC sides of APF and maintains the DClink voltage at a reference level.
Through this adaptive controller, the DClink voltage reference value will be initially set in the required minimum value, which may reduce power consumption and switching loss on the premise that APF operates normally. Another contribution of this controller is that once the harmonic current and grid voltage level change, the DClink voltage reference value will be adaptively adjusted. The DClink voltage reference value will first change according to the change in harmonic current. Then, the DClink voltage reference value will increase as the grid voltage level increases to ensure efficient APF compensation performance. The DClink voltage reference value will also decrease when the grid voltage level decreases, thereby reducing power consumption and switching loss. Thus, the optimal control of the DClink voltage is achieved.
V. SIMULATION AND EXPERIMENTAL VERIFICATION OF MINIMUM DCLINK VOLTAGE DEDUCTION
Simulations and experiments are performed on the threephase fourwire shunt APF to verify the performance of the proposed controller. Simulation studies are conducted in MATLAB. A threephase fourwire centersplit shunt APF prototype is also implemented in the laboratory to verify the simulation results (
Fig. 7
). The simulated and experimental system parameters are listed in
Table I
. The PI controller is applied to the current control loop, and SVPWM modulation is applied to generate control signals in switches. In this section, the minimum DClink voltage deduction is initially verified by simulations and experiments.
Without APF, the source currents contain a large amount of harmonics, and the total harmonic distortions (THDs) of the simulation and experimental load current are 24.39% and 25.13%, respectively. Therefore, the source currents are serious distortions. The values of every order harmonic current are listed in
Table II
. Evenorder harmonics are generally largely offset in the threephase system and can thus be ignored in the calculation process. Given that the load harmonic current beyond the 40
th
order is small the required minimum DClink voltage calculation will consider only up to the 40
th
harmonic order for simplicity.
Threephase fourwire centersplit shunt APF prototype.
SYSTEM PARAMETERS
HARMONIC CURRENTS
Based on the abovementioned deduction and related system parameters, the required minimum DClink voltage for the APF can be calculated by using Equations (1) to (15). The required minimum DClink voltages are
U_{dcref}
= 626.39 V in simulation and
U_{dcref}
= 628.38 V in the experiment.
Simulation DClink voltage, as well as compensating and source currents when U_{dc}=610V .
Simulation DClink voltage, as well as compensating and source currents when U_{dc}=630V .
In simulation, when the DClink voltage is 610 V, which is lower than the required minimum value of 626.39 V. The THD of the source current after compensation is 13.34%, which does not satisfy the international standard (THD < 8% for IEEE5191992
[27]
). The simulated compensating and source currents when the DClink voltage
U_{dc}
= 610 V are shown in
Fig. 8
.
When the DClink voltage increases to
U_{dc}
= 630 V, which is higher than the required minimum value of 626.39 V, the APF can operate at both inverter and rectifier modes to achieve efficient compensation performance with THD = 6.48%, which meets international standards
[27]
. The compensating and source currents when the DClink voltage
U_{dc}
= 630 V are shown in
Fig. 9
. The harmonics of the load current are significantly compensated. Meanwhile, the source current distortion is almost eliminated, whereas the source current is nearly sinusoidal.
Similar results are also obtained in experiments. When the DClink voltage is 610 V, which is lower than the required minimum value of 628.38 V, the THD of the source current after compensation is 14.80%. The THD value does not satisfy the international standard because the APF is still operating at an insufficient DClink voltage level. Moreover, when the reference voltage is further decreased to 590 V, the compensating current is seriously distorted, which distorts the supply current. The THD of the source current soars to 45.16%, a value that is even worse than that without compensation.
Fig. 10
shows the experimental compensating and source currents after compensation when the DClink voltage is
U_{dc}
= 590 V. The DClink voltage is unstable and uncontrollable. In this case, APF is operating at a poor state, which will negatively affect the power grid, the load, and the APF itself.
Experimental DClink voltage, as well as compensating and source currents when U_{dc}=590V .
Experimental DClink voltage, as well as compensating and source currents when U_{dc}=630V .
When the DClink voltage increases to
U_{dc}
= 630 V, which is higher than the required minimum value of 628.38 V, the APF achieves an efficient compensation effect with THD = 7.23%, which satisfies international standards
[27]
.
Fig. 11
shows the experimental compensating and source currents after compensation when the DClink voltage is
U_{dc}
= 630 V.
When the DClink voltages are increased to
U_{dc}
= 650, 670, 690, 710, and 730 V, the THDs of the simulated source current are 6.23%, 6.08%, 5.87%, 5.81%, and 5.72%, respectively, whereas the THDs of the experimental source current are 7.11%, 6.92%, 6.77%, 6.58%, and 6.52%, respectively. These THD values obviously meet international standards.
Table III
shows the simulation and experimental compensation results of APF with different DClink voltages.
COMPENSATION PERFORMANCES
COMPENSATION PERFORMANCES
The results in
Table III
show that when the DClink voltage is lower than the required minimum value, the APF is operating in the rectifier mode, and the variation in THD is large when the DClink voltage is enhanced. As the DClink voltage becomes closer to the required minimum value, the compensating performances improves. However, the compensation effect is not realized. Once the DClink voltage is higher than the required minimum value, the APF can achieve superior compensation performance, in which the THD meets international standards and stabilizes. These simulation and experimental results verify the proposed APF minimum DClink voltage deduction. Given the different grid voltage levels, coupling inductor values, and load current contents, the APF requires different minimum DClink voltages for operation.
Based on the simulation and experimental results in
Table III
, the tradeoff relationship between the THD and the DClink voltage is shown in
Fig. 12
. When the DClink voltage is higher than the required minimum value, increasing the value of the DClink voltage alone cannot significantly improve the compensation effect. By contrast, power consumption and switching loss are directly proportional to the DClink voltage
[22]
, such that they may increase APF power consumption and loss. Compensation performance can be improved by adjusting the controller parameters or by applying better control algorithms (e.g., improved repetitive control
[28]
, predictive control
[29]
, and fuzzy control
[30]
), instead of increasing the DClink voltage. Thus, APF power consumption and loss will not increase, and the APF can still operate in an ideal state, thus compensating the harmonic of load current and eliminating the harmonic pollution.
Relationship between source current THD and DClink voltage
VI. SIMULATION AND EXPERIMENTAL VERIFICATION OF PROPOSED ADAPTIVE DCLINK VOLTAGE CONTROLLER
The minimum DClink voltage design block was verified in Section V. In this section, the adaptive reference DClink voltage level block will be verified by simulations and experiments. The system parameters listed in
Table I
are applied to maintain the consistency of the simulations and experiments.
The effect of the DClink voltage controller when the harmonic currents change is analyzed. The fundamental and harmonic currents used to calculate THD do not correspondingly increase exponentially when harmonic currents change. Thus, the use of THD to compare APF performance before and after the harmonic currents change is inappropriate. Therefore, the singleorder harmonic elimination rate
R
%, which is shown in Equation (23), is used to analyze APF performance.
The harmonic currents of a load with a resistance
R_{L}
= 15 ohm are
i_{5th}
= 8.58 A,
i_{7th}
= 4.29 A,
i_{11th}
= 3.43 A,
i_{13th}
= 2.45 A,
i_{17th}
= 2.14 A, and
i_{19th}
= 1.71 A. After the compensation of APF with the minimum DClink voltage
U_{dcref}
= 630 V, the harmonic currents are
i_{5th}
= 0.26 A,
i_{7th}
= 0.21 A,
i_{11th}
= 0.58 A,
i_{13th}
= 0.25 A,
i_{17th}
= 0.52 A, and
i_{19th}
= 0.41 A. According to the harmonic elimination rate calculation in (23), the harmonic current elimination rates of each order are 96.97%, 95.11%, 83.19%, 89.79%, 79.71%, and 76.11%.
When the load resistance changes to
R_{L}
= 7.5 ohm, the fundamental and harmonic currents increase. According to the abovementioned analysis and deduction, the APFrequired minimum DClink voltage increases. Without the adaptive DClink voltage controller, the DClink voltage remains at
U_{dcref}
= 630 V. The experiment waveform is shown in
Fig. 13
(a). The harmonic current elimination rates in every order harmonic are 96.14%, 95.01%, 85.82%, 85.89%, 78.63%, and 73.92%, as listed in
Table IV
. The harmonic current elimination rates for every order harmonic current are lower than the values before the load changes. This result indicates that APF compensation capability decreases with the fixed DClink voltage when harmonic current increases.
Experiment waveform when the load changes. (a) Without adaptive voltage controller. (b) With adaptive voltage controller.
HARMONIC CURRENT COMPENSATION WITH AND WITHOUT ADAPTIVE DCLINK VOLTAGE CONTROLLER WHEN LOAD CHANGES
HARMONIC CURRENT COMPENSATION WITH AND WITHOUT ADAPTIVE DCLINK VOLTAGE CONTROLLER WHEN LOAD CHANGES
Once the adaptive voltage controller is applied, the DClink voltage value will be adaptively adjusted with harmonic current changes. According to the deduction, the DClink voltage increases to a new required minimum voltage value of
U_{dcref}
= 645 V. The experiment waveform is shown in
Fig. 13
(b). The harmonic elimination rates are listed in
Table IV
. When the DClink voltage increases to its new minimum voltage with the adaptive controller, the harmonic current elimination rates are 96.92%, 95.21%, 89.32%, 86.71%, 80.13%, and 75.96%, which are almost consistent with the values before the load changes. Thus, the adaptive voltage controller can maintain the DClink voltage at the required minimum value with the variation of harmonic current, thus avoiding the insufficient DClink voltage situation and ensuring the harmonic compensation capability of APF.
Thereafter, the effect of the DClink voltage controller when the grid voltage level changes is analyzed. The condition without the adaptive reference DClink voltage level block is studied. Based on the verified minimum DClink voltage design block, the initial minimum DClink voltage is set at
U_{dc}
= 630 V, which ensures the ideal operation of APF with minimal power consumption and switching loss status. With the fixed DClink voltage level,
Fig. 14
presents the change in compensating and source currents when the grid voltage level changes at
t
= 0.3
s
by 10% and 10% in the simulation. Correspondingly, the experimental results when the grid voltage level varies are shown in
Fig. 15
.
Table V
outlines the compensation performance. The simulation and experimental results reflect the effect of the changes in grid voltage level on compensation performance. When the DClink voltage is fixed, the THD of the source current after compensation will only slightly decrease with a 10% decrease in grid voltage level. Furthermore, when the grid voltage level increases by 10% , the compensating and source currents become seriously distorted because of the insufficient output capability of the fixed DClink voltage. Meanwhile, the DClink voltage oscillates and thus becomes unstable and uncontrollable. Hence, the compensation performance cannot be guaranteed, and the system runs under a poor state.
Simulation waveform without adaptive voltage control when grid voltage level varies ±10% , variation occurs at t = 0.3s . (a) Grid voltage level changes by 10% . (b) Grid voltage level changes by +10% .
Experiment waveform without adaptive voltage control when grid voltage level varies ±10% . (a) Grid voltage level changes by 10% . (b) Grid voltage level changes by +10% .
COMPENSATION PERFORMANCE WITHOUT ADAPTIVE VOLTAGE CONTROLLER WHEN GRID VOLTAGE LEVEL CHANGES
COMPENSATION PERFORMANCE WITHOUT ADAPTIVE VOLTAGE CONTROLLER WHEN GRID VOLTAGE LEVEL CHANGES
Once the adaptive voltage control block is applied, the DClink voltage reference value will be adaptively adjusted with the variation of grid voltage level. The simulation and experimental results are shown in
Figs. 16
and
17
, respectively. The compensation performance with the adaptive controller is presented in
Table VI
.
The figures show that when the grid voltage level decreases by 10% from 220 V to 198 V, the DClink voltage level adaptively decreases to a lower value of 580 V, and the THD is unchanged. Meanwhile, DClink voltage becomes significantly lower than the fixed voltage of 630 V without the adaptive voltage control block. That is, a low DClink voltage can still realize compensation. Power consumption and switching loss can be effectively decreased compared with the case with fixed DClink voltage. Given that power consumption and switching loss are directly proportional to the DClink voltage
[22]
, low DClink voltage can save on power consumption and reduce switching loss. Moreover, when the grid voltage level increases by 10% from 220 V to 242 V, the DClink voltage level adaptively increases to a higher value of 680 V, and the THD basically remains unchanged. Compared with that in the case without the adaptive voltage block, this increase may avoid the output compensating current distortion caused by the insufficient output capability of APF when the grid voltage level increases, thus ensuring the operation of the APF and its satisfactory compensation performance.
Simulation waveform with adaptive voltage control when grid voltage level varies ±10% , variation happens in t = 0.3s . (a) Grid voltage level changes 10% . (b) Grid voltage level changes +10% .
Experiment waveform with adaptive voltage control when grid voltage level varies ±10% . (a) Grid voltage level changes by 10% ; (b) Grid voltage level changes by +10% .
COMPENSATION PERFORMANCE WITH ADAPTIVE VOLTAGE CONTROLLER WHEN GRID VOLTAGE LEVEL CHANGES
COMPENSATION PERFORMANCE WITH ADAPTIVE VOLTAGE CONTROLLER WHEN GRID VOLTAGE LEVEL CHANGES
VII. CONCLUSIONS
This study proposed an adaptive DClink voltage controlled in the threephase fourwire shunt APF. The required minimum DClink voltage for APF was deduced, and its minimum DClink voltage design block was built to implement the adaptive DClink voltage controller. The simulation and experimental results proved that once the DClink voltage exceeds the minimum value, increasing its value alone will not significantly improve the compensation effect but will increase power consumption and switching loss. Thus, the DClink voltage reference will be initially set to the required minimum value. Power consumption and switching loss can be effectively decreased on the premise that the APF operates normally.
The adaptive reference DClink voltage control block with different harmonic currents and grid voltage levels was also built. The adaptive voltage control block can adaptively adjust the DClink voltage reference value when the harmonic current and grid voltage level fluctuate to guarantee the operation of APF and maintain an ideal compensation performance, while reducing power consumption and switching loss compared with the traditional fixed DClink voltage control. The viability and effectiveness of the required minimum DClink voltage deduction and the proposed adaptive DClink voltage control for the threephase fourwire shunt APF were proven by both simulation and experimental results. Therefore, the proposed adaptive DClink voltage controller is an optimal solution in practical applications.
BIO
Yu Wang was born in Guangdong, China, in 1984. He received his B.E. in Electronic Information Engineering from Nanchang Hangkong University, Nanchang, China, in 2007, and his M.E. in Detection Technology and Automation from Guangxi University, Nanning, China, in 2010. From 2010 to 2011, he worked for TCL Corporation, China, as an electrical engineer. Since 2011, he has been with the School of Electric Power, South China University of Technology, Guangzhou, China, where he is currently working toward his Ph.D. degree in Power Electronics. His current research interests include active power filter and modern control theory.
YunXiang Xie was born in Hunan, China, in 1965. He received his B.S., M.S., and Ph.D. degrees in Electrical Engineering from Xi’an Jiaotong University, Xi’an, China, in 1985, 1988, and 1991, respectively. Since 1991, he has been working in the School of Electric Power, South China University of Technology, Guangzhou, China, where he is currently a Full Professor. His research interests include active power filter, Vienna rectifier, and matrix rectifier.
Blaabjerg F.
,
Teodorescu R.
,
Liserre M.
,
Timbus A. V.
2006
“Overview of control and grid synchronization for distributed power generation systems”
IEEE Trans. Ind. Electron.
53
(5)
1398 
1409
DOI : 10.1109/TIE.2006.881997
Duarte L. H. S.
,
Alves M. F.
2002
“The degradation of power capacitors under the influence of harmonics”
in Proc. IEEE 10th Int. Conf. Harmonics Quality Power
Vol. 1
334 
339
Tumbelaka H. H.
,
Borle L. J.
,
Nayar C. V.
,
Lee S. R.
2009
“A grid currentcontrolling shunt active power filter”
Journal of Power Electronics
9
(3)
365 
376
Izhar M.
,
Hadzer C. M.
,
Syafrudin M.
,
Taib S.
,
Idris S.
2004
“Performance for passive and active power filter in reducing harmonics in the distribution system”
in IEEE Power and Energy Conference
104 
108
Bin X.
,
Ke D.
,
Yong K.
2009
“DC voltage control for the threephase fourwire shunt splitcapacitor active power filter”
in IEEE Electric Machines and Drives Conference
1669 
1673
Luo A.
,
Shuai Z. K.
,
Shen Z. J.
,
Zhu W. J.
,
Xu X. Y.
2009
“Design considerations for maintaining dcside voltage of hybrid active power filter with injection circuit”
IEEE Trans. Power Electron
24
(1)
75 
84
DOI : 10.1109/TPEL.2008.2005501
Gu B.G.
,
Nam K.
2006
“A DClink capacitor minimization method through direct capacitor current control”
IEEE Trans. Ind. Appl.
42
(2)
573 
581
DOI : 10.1109/TIA.2006.870036
Vodyakho O.
,
Mi C. C.
2009
“Threelevel inverterbased shunt active power filter in threephase threewire and fourwire systems”
IEEE Trans. Power Electron
24
(5)
1350 
1363
DOI : 10.1109/TPEL.2009.2016663
Li Y.
,
Li G.
2013
“A novel hybrid active power filter with a highvoltage rank”
Journal of Power Electronics
13
(4)
719 
728
DOI : 10.6113/JPE.2013.13.4.719
Choi W.H.
,
Lam C.S.
,
Wong M.C.
,
Han Y.D.
2013
“Analysis of dclink voltage controls in threephase fourwire hybrid active power filters”
IEEE Trans. Power Electron.
28
(5)
2180 
2191
DOI : 10.1109/TPEL.2012.2214059
Tarkiainen A.
,
Pollanen R.
,
Niemela M.
,
Pyrhonen J.
2004
“DClink voltage effects on properties of a shunt active filter”
in IEEE 35th Annual Power Electronics Specialists Conference
3169 
3175
Zhao G.
,
Liu J.
,
Yang X.
,
Wang Z.
2008
“Analysis and specification of DC side voltage in parallel active power filter regarding compensation characteristics of generators”
in IEEE Power Electronics Specialists Conference
3495 
3499
Lao K.W.
,
Dai N. Y.
,
Liu W.G.
,
Wong M.C.
2013
“Hybrid power quality compensator with minimum DC operation voltage design for highspeed traction power systems”
IEEE Trans. Power Electron
28
(4)
2024 
2036
DOI : 10.1109/TPEL.2012.2200909
Lam C.S.
,
Cui X.X.
,
Choi W.H.
,
Wong M.C.
,
Han Y.D.
2012
“Minimum inverter capacity design for LChybrid active power filters in threephase fourwire distribution systems”
IET Power Electron.
5
(7)
956 
968
DOI : 10.1049/ietpel.2011.0436
Lam C.S.
,
Cui X.X.
,
Wong M.C.
,
Han Y.D.
2012
“Minimum DClink voltage design of threephase fourwire active power filters”
in IEEE Control and Modeling for Power Electronics
1 
5
Lam C.S.
,
Choi W.H.
,
Wong M.C.
,
Han Y.D.
2012
“Adaptive DClink voltagecontrolled hybrid active power filters for reactive power compensation”
IEEE Trans. Power Electron
27
(4)
1758 
1772
DOI : 10.1109/TPEL.2011.2169992
Lam C.S.
,
Wong M.C.
,
Choi W.H.
,
Cui X.X.
,
Mei H.M.
,
Liu J.Z.
2014
“Design and performance of an adaptive lowDCvoltagecontrolled LChybrid active power filter with a neutral inductor in threephase fourwire power systems”
IEEE Trans. Ind. Electron.
61
(6)
2635 
2647
DOI : 10.1109/TIE.2013.2276037
Rahmani S.
,
Hamadi A.
,
Mendalek N.
,
AlHaddad K.
2009
“A new control technique for threephase shunt hybrid power filter”
IEEE Trans. Ind. Electron.
56
(8)
2904 
2915
DOI : 10.1109/TIE.2008.2010829
Mikkili S.
,
Panda A. K.
2011
“PI and fuzzy logic controller based 3phase 4wire shunt active filters for the mitigation of current harmonics with the IdIq control strategy”
Journal of Power Electronics
11
(6)
914 
921
DOI : 10.6113/JPE.2011.11.6.914
Luo A.
,
Tang C.
,
Shuai Z. K.
,
Zhao W.
,
Rong F.
,
Zhou K.
2009
“A novel threephase hybrid active power filter with a series resonance circuit tuned at the fundamental frequency”
IEEE Trans. Ind. Electron.
56
(7)
2431 
2440
DOI : 10.1109/TIE.2009.2020082
Hamad M. S.
,
Masoud M. I.
,
Williams B. W.
2014
“Medium voltage 12pulse converter: output voltage harmonic compensation using a series APF”
IEEE Trans. Ind. Electron.
61
(1)
43 
52
DOI : 10.1109/TIE.2013.2248337
Wong M. C.
,
Tang J.
,
Han Y.D.
2003
“Cylindrical coordinate control of three dimensional PWM technique in three phase four wired trilevel inverter”
IEEE Trans. Power Electron.
18
(1)
208 
220
DOI : 10.1109/TPEL.2002.807133
Liu C.
,
Dai K.
,
Duan K.
,
Kang Y.
2013
“Application of a ctype filter based LCFL output filter to shunt active power filters”
Journal of Power Electronics
13
(6)
1058 
1069
DOI : 10.6113/JPE.2013.13.6.1058
Wang W.
,
Luo A.
,
Xu X.
,
Fang L.
,
Chau T. M.
,
Li Z.
2013
“Space vector pulsewidth modulation algorithm and DCside voltage control strategy of threephase fourswitch active power filters”
IET Power Electron.
6
(1)
125 
135
DOI : 10.1049/ietpel.2012.0391
Khadkikar V.
,
Chandra A.
,
Singh B. N.
2009
“Generalized single phase pq theory for active power filtering: simulation and DSPbased experimental investigation”
IET Power Electron.
2
(1)
67 
78
DOI : 10.1049/ietpel:20070375
Wu L. H.
,
Zhuo F.
,
Zhang P. B.
,
Li H. Y.
,
Wang Z. A.
2007
“Study on the influence of supplyvoltage fluctuation on shunt active power filter”
IEEE Trans. Power Del.
22
(3)
1743 
1749
DOI : 10.1109/TPWRD.2007.899786
1993
“IEEE Recommended Practices and Requirements for Harmonic Control in Electrical Power Systems,”
IEEE Std 5191992
1 
112
Grino R.
,
Cardoner R.
,
CostaCastelló R.
,
Fossas E.
2007
“Digital repetitive control of a threephase fourwire shunt active filter”
IEEE Trans. Ind. Electron.
54
(3)
1495 
1503
DOI : 10.1109/TIE.2007.894790
Han Y.
,
Xu L.
2011
“Design and implementation of a robust predictive control scheme for active power filters”
Journal of Power Electronics
11
(5)
751 
1758
DOI : 10.6113/JPE.2011.11.5.751
Suresh Y.
,
Panda A. K.
,
Suresh M.
2012
“Realtime implement of adaptive fuzzy hysteresisband current control technique for shunt active power filters”
IET Power Electron.
5
(7)
1188 
1195
DOI : 10.1049/ietpel.2011.0371