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Bi-Directional Multi-Level Converter for an Energy Storage System
Bi-Directional Multi-Level Converter for an Energy Storage System
Journal of Power Electronics. 2014. May, 14(3): 499-506
Copyright © 2014, The Korean Institute Of Power Electronics
  • Received : October 16, 2013
  • Accepted : February 17, 2014
  • Published : May 28, 2014
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About the Authors
Sang-Hyup Han
Department of Electrical Engineering, Kyungpook National University, Daegu, Korea
Heung-Geun Kim
Department of Electrical Engineering, Kyungpook National University, Daegu, Korea
kimhg@knu.ac.kr
Honnyong Cha
School of Energy Engineering, Kyungpook National University, Daegu, Korea
Tae-Won Chun
Department of Electrical Engineering, University of Ulsan, Ulsan, Korea
Eui-Cheol Nho
Department of Electrical Engineering, Pukyong National University, Busan, Korea

Abstract
This paper proposes a 3 kW single-phase bi-directional multi-level converter for energy storage applications. The proposed topology is based on the H-bridge structure with four switches connected to the DC-link. A simple phase opposition disposition PWM method that requires only one carrier signal is also suggested. The switching sequence to balance the capacitor voltage is considered. The topology can be extended to a nine-level converter or a three-phase system. The operating principle of the proposed converter is verified through a simulation and an experiment.
Keywords
I. INTRODUCTION
Grid-connected converter systems are increasingly becoming important as a result of the increasing demand on renewable energy [1] - [3] . The prospect of vehicles plugging into electric grids, known as plug-in electric vehicles, reinforces the undeniable economic benefits that result in the independence from petroleum and the displacement of gasoline by electricity. The importance of the trend in future power systems will further intensify. Thus, converters for grid-connected operation should meet the following requirements.
  • 1) The converter has to generate a pure sinusoidal output voltage.
  • 2) The converter output current should possess low total harmonic distortion (THD).
Two-level PWM converters are traditionally used for grid-tied inverter systems. In the case of a two-level converter, the converter switching frequency should be high or the inductance of the output filter inductor has to be sufficient to satisfy the required THD for two-level converters. To address the problems associated with two-level converters, multi-level converters (MLCs) are introduced for grid-connected converters. Several MLC topologies have been suggested. These topologies can be mainly classified into three types, as shown in Fig. 1 : neutral point clamped type, flying capacitor type, and cascaded type [4] - [7] .
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Topologies of MLC: (a) Neutral point clamped type. (b) Flying capacitor type. (c) Cascaded type.
MLCs are advantageous because their switching frequency and device voltage rating can be significantly lower than those of a traditional two-level converter under the same output voltage. Therefore, switching loss can be reduced significantly, and converter efficiency can be increased [8] - [10] .
In this paper, a circuit based on the H-bridge topology with four switches connected to the DC-link is proposed as MLC topology. Fig. 2 shows the proposed MLC. The power flow is bi-directional, and the power factor of the ac side is controllable. The number of the active switches is similar to that of traditional MLCs, as shown in Fig. 1 . However, the switches in the H-bridge of the proposed converter (T A + , T A - , T B + , and T B - ) are turned on and off once at the fundamental 60/50 Hz frequency. The voltage stress the switches in the H-bridge is twice the number of switches in the DC-link (T P + , T P - , T N + , and T N - ). Thus, a relatively slow and high voltage rating switch is used in the H-bridge, and a fast and low voltage rating switch is used in the DC-link.
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Proposed grid-connected bi-directional multi-level converter for application to the energy storage system.
II. OPERATING PRINCIPLE OF THE PROPOSED MULTI-LEVEL CONVERTER
- A. Topology of Multi-Level Converter
The proposed MLC is composed of two DC-link capacitors (C 1 , C 2 ) and four switching devices (T A + , T A - , T B + , T B - ) for the H-bridge, as well as four active switches (T P + , T P - , T N + , T N - ) located between the DC-link and the H-bridge, as shown in Fig. 2 . The voltage across the switching devices in the DC-link is V DC /2. These devices are switched at switching frequency. Meanwhile, the voltage across the switching devices in the H-bridge is V DC . These devices are switched at a frequency of the fundamental component of the output voltage (e.g., 50 or 60 Hz).
Thus, the switches in the DC-link and the H-bridge can be strategically selected based on the rated power of the converter system to reduce system cost and increase efficiency. Table I shows the output voltage according to the switching states.
OUTPUT VOLTAGES ACCORDING TO SWITCHING STATES
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OUTPUT VOLTAGES ACCORDING TO SWITCHING STATES
- B. Operating Modes and the Proposed PWM Strategy
The output voltage of the proposed MLC shown in Fig. 2 consists of five levels (V DC , V DC /2, 0, -V DC /2, and -V DC ) based on the switching states of the converter. The four operating modes depend on the instantaneous value of the reference voltage and the maximum value of the carrier signal. Table II shows the possible converter output voltage levels according to the operating modes.
OPERATING MODES OF THE PROPOSED MLC
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OPERATING MODES OF THE PROPOSED MLC
For the N-level NPC type multi-level converter, (N-1) triangular carrier signals with the same frequency and amplitude are used to occupy contiguous bands that range from +V DC to -V DC . A single sinusoidal reference signal is compared with each carrier signal to determine the output voltage for the converter. Three dispositions of the carrier signal are considered in generating the PWM signal [11] - [13] .
  • 1) Phase disposition (PD), in which all carriers are in a phase;
  • 2) Alternative phase opposition disposition (APOD), in which each carrier is phase shifted by 180˚ from its adjacent carrier; and
  • 3) Phase opposition disposition (POD), in which the carriers above zero voltage are 180˚ out of phase with those below a zero voltage.
Fig. 3 shows the reference and carrier signal arrangements for PD, APOD, and POD modulations.
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Carrier and reference signal arrangements for: (a) Phase disposition (PD). (b) Alternative phase opposition disposition (APOD). (c) Phase opposition disposition (POD).
A new PWM strategy based on POD modulation that requires only one carrier signal ( vcarrier ) is proposed. The detailed PWM strategy is depicted in Fig. 4 . If the reference signal is positive, then the switch pair (T A + , T B - ) is turned on; otherwise, the switch pair (T A - , T B + ) is turned on. Thus, the switches comprising the H-bridge converter are turned on and off once during the reference signal period. The voltage across the switch in the H-bridge at the blocking state is V DC . The switches (T P - , T N + ) are operated complementarily to the switches (T P + , T N - ).
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PWM strategy based on a POD with a single carrier signal.
The generation of the PWM signal for the DC link switches can be explained as follows:
Mode 1: a signal subtracted from the reference signal by V c is compared with the carrier signal. If ( vref -V c )> vcarrier , then T P + and T N - are turned on. If ( vref -V c )< vcarrier , then the switch T P + or T N - is alternately turned off.
Mode 2: the reference signal is directly compared with a carrier signal. If vref vcarrier , then the switch T P + or T N - is alternately turned on. If vref vcarrier , then the switches T P + and T N - are turned off.
Mode 3: - vref is directly compared with a carrier signal. If - vref vcarrier , then the switch T P + or T N - is alternately turned on. If - vref vcarrier , then the switches T P + and T N - are turned off.
Mode 4: a signal subtracted from - vref by V c is compared with the carrier signal. If (- vref -V c )> vcarrier , then the switches T P + and T N - are turned on. If (- vref -V c )< vcarrier , then the switch T P + or T N - is alternately turned off.
The proposed PWM method is simple because only one carrier signal is used to generate four PWM signals.
- C. Voltage Balancing of the DC-Link Capacitor
One of the important issues on MLC is the voltage balance of the DC-link capacitor [14] , [15] . The voltage across capacitors C 1 and C 2 should be equally balanced to V DC /2. However, the midpoint voltage fluctuates when C 1 and C 2 continuously charge and discharge. If the capacitor voltage is unbalanced, the output voltage becomes asymmetrical, resulting in a high harmonic content in the grid current.
To solve this problem, the switching state should be selected appropriately, as shown in Fig. 5 . If only one switch in the DC-link is turned on, the output voltage becomes V DC /2. The DC-link switches (T P + , T N - ) are alternately turned on at mode 2 and alternately turned off at mode 1 to balance the DC-link capacitor voltage. The switches (T P - , T N + ) are operated complementarily to the switches (T P + , T N - ). Therefore, the switching sequences of modes 1 and 2 are (a)-(b)-(a)-(c) and (b)-(d)-(c)-(d), respectively. The switching sequences of modes 3 and 4 are similar to those of modes 1 and 2.
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Switching states of the proposed converter in a positive half cycle: (a) state 1 : vAB = VDC. (b) state 2 : vAB = VDC/2. (c) state 3 : vAB = VDC/2. (d) state 4 : vAB = 0.
- D. Control Strategy
Fig. 6 shows the block diagram of the current control. A proportional-resonant (PR) controller with a stationary frame is used for the current controller. If the DC-link voltage is controlled by a proportional-integral controller, the voltage controller output can be treated as the active power reference. Thus, if the reactive power reference is given, then the grid current reference can be calculated as follows:
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, where Is * = P * / ( Vs cos ϕ * ), ϕ * = tan -1 ( Q * / P * ) .
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Block diagram of current control.
The PR controller is a good candidate for reference tracking in a stationary frame because the grid current, which is the control object of the current controller, is a fixed frequency AC (50 or 60 Hz). No steady state error is required and transforming the axes is unnecessary because the gain of the PR controller at a selected resonant frequency is infinite [16] , [17] .
- E. Extensions for the Nine-Level and Three-Phase Five-Level Converters
Notably, although the number of the switching devices in the proposed five-level converter is the same as that of the conventional cascaded H-bridge MLC, the switches in the H-bridge of the proposed MLC are switched at a low frequency (60 Hz). Moreover, unlike the cascaded H-bridge MLC, the proposed five-level inverter requires only one isolated voltage source, V DC .
A nine-level converter, which is extended from the five-level converter shown in Fig. 2 , is proposed in this paper to maximize the effectiveness of the proposed MLC. The overall circuit diagram is shown in Fig. 7 . As shown in Fig. 7 , the proposed converter requires 12 active devices for the nine-level converter, but 16 active devices are required for the cascaded H-bridge MLC. Therefore, the number of switching devices in the proposed MLC can be reduced significantly as the number of voltage level increases.
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Proposed 9-level converter topology.
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Proposed three-phase five-level converter topology.
A unit cell can be produced as a module and the extension of the output voltage level is achieved simply by connecting the modules in a series. The construction of the three-phase multi-level converter is also possible.
III. SIMULATION RESULTS
The proposed 3 kVA, five-level converter is simulated to verify the operating principle. The L filter is inserted between the output of the converter and the grid. The electrical specification of the proposed converter is summarized in Table III . Fig. 9 shows the waveforms of the proposed five-level converter. The grid current is satisfactorily controlled in the discharging [ Figs. 9 (b) to 9 (d)] and charging modes [ Fig. 9 (e)], and the power factor can also be controlled.
ELECTRICAL SPECIFICATION OF THE PROPOSED SINGLE-PHASE FIVE-LEVEL CONVERTER
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ELECTRICAL SPECIFICATION OF THE PROPOSED SINGLE-PHASE FIVE-LEVEL CONVERTER
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Waveforms of the 5-level converter.
IV. EXPERIMENTAL RESULTS
Fig. 10 shows the grid connected multi-level converter system with the same conditions as the simulation. The voltage at the Point of Common Coupling (PCC) and the current injected to the PCC are measured. The DC link voltage is also sensed. DSP TMS320F2812 is used to implement the current controller and the voltage controller, to obtain the grid voltage phase, and to generate the PWM signals.
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Grid-connected multi-level converter system.
Fig. 11 shows the output waveforms of the proposed converter. With a five-level output voltage, the grid current is satisfactorily controlled during the discharging and charging modes. Only the waveform at unity power factor is shown for the charging mode because the power factor control function is necessary only for the discharging mode. The THD of the output current is 3.8 %.
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Experimental waveforms of the proposed converter.
V. CONCLUSIONS
This paper proposed a new multi-level converter topology based on an H-bridge converter with four switches connected to the DC-link.
The power semiconductor switching devices that configure the H-bridge circuit in the proposed multi-level converter are only responsible for the polarity reversal of the AC output voltage, and the five-level output voltages are generated by the appropriate switching of the DC-link switches. The switching devices in the H-bridge converter are synchronized according to the output voltage signal. Therefore, switching loss is smaller than that of the other converter.
The configuration of the control circuit is simple because the PWM signal is generated by using only one carrier signal. The number of the switching devices in the proposed MLC is fewer than that in the conventional multi-level converter. Thus, the reliability of the proposed system is high, and the cost of the system can be low.
A unit cell can be produced as a module, and extending output voltage level is achieved simply by connecting the module in a series. The construction of the three-phase multi-level converter is also possible.
Acknowledgements
This research was partly supported by Kyungpook National University Research Fund, 2012 and partly supported by the Power Generation & Electricity Delivery of the Korea Institute of Energy Technology Evaluation and Planning (KETEP) grant funded by the Korean Ministry of Trade, Industry, and Energy (No. 201110204 00260).
BIO
Sang-Hyup Han received his B.S. and M.S. in Electrical Engineering from Kyungpook National University, Korea, in 2010 and 2012, respectively. He is currently working towards his Ph.D. in the School of lectrical Engineering, Kyungpook National University. His research interests are power conversion and power control systems.
Heung-Geun Kim was born in Korea in 1956. He received his B.S., M.S., and Ph.D. degrees in Electrical Engineering from Seoul National University in 1980, 1982 and 1988, respectively. Since 1984, he has been with the Department of Electrical Engineering at Kyungpook National University, where he is currently a full professor and the director of the Microgrid Research Center. He was a Visiting Scholar at the Department of Electrical and Computer Engineering in the University of Wisconsin-Madison from 1990 to 1991, and at the Department of Electrical Engineering in the Michigan State University, USA from 2006 to 2007. His current research interests are ac machine control, PV power generation, and micro-grid system.
Honnyong Cha received his B.S. and M.S. degrees in Electronic Engineering from Kyungpook National University, Daegu, Korea, in 1999 and 2001, respectively, and a Ph.D. degree in Electrical Engineering from Michigan State University, East Lansing, Michigan in 2009. From 2001 to 2003, he was a Research Engineer with the Power System Technology (PSTEK) Company, An-san, Korea. From 2010 to 2011, he worked as a senior researcher at the Korea Electrotechnology Research Institute (KERI), Changwon, Korea. In 2011, he joined Kyungpook National University as an Assistant Professor of the School of Energy Engineering. His main research interests include high power dc–dc converters, dc–ac inverters, Z-source inverters, and power conversion for electric vehicles and wind power generation.
Tae-Won Chun was born in Korea in 1959. He received his B.S. degree in Electrical Engineering from Pusan National University in 1981, and his M.S. and Ph.D. degrees in Electrical Engineering from Seoul National University in 1983 and 1987, respectively. Since 1986, he has been a member of the faculty of the Department of Electrical Engineering, Ulsan University, where he is currently a full Professor. He was a Visiting Scholar at the Department of Electrical and Computer Engineering, University of Tennessee, USA . From 2005 to 2006, he also served as a visiting scholar with the Department of Electrical and Computer Engineering, Virginia Polytechnic Institute and State University, USA. His current research interests are the grid-connected inverter system and ac motor control.
Eui-Cheol Nho was born in Korea in 1960. He received his B.S. in Electrical Engineering from Seoul National University, Korea in 1984, and his M.S. and Ph.D. in Electrical and Electronic Engineering from KAIST, Korea, in 1986 and 1991, respectively. He was with the Powertech Co., Ltd., Korea, as the chief of the R&D center from 1991 to 1995. Since 1995, he has been a faculty member of the Department of Electrical Engineering, Pukyong National University. He was a visiting scholar at the Department of Electrical and Computer Engineering, University of Wisconsin, Madison, USA from 1997 to 1998 and at the Department of Electrical Engineering and Computer Science, University of California, Irvine, USA from 2005 to 2006. His current research interests include high voltage PWM converter, soft-switching converter, energy storage system, hybrid generation system, and power line conditioners, among others.
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