The conventional PhaseShift FullBridge (PSFB) converter has a serious voltage spike because of the ringing between the leakage inductance of the transformer and the parasitic output capacitance of the secondary side rectifier switches. To overcome this problem, an asynchronous active clamp technique employing an auxiliary DC/DC converter has been proposed. However, an exact analyses for designing the auxiliary DC/DC converter has not been presented. Therefore, the amount of power that is supposed to be handled in the auxiliary DC/DC converter is calculated through a precise mode analyses in this paper. In addition, this paper proposes a lossy snubber circuit with hysteresis characteristics to reduce the burden that the auxiliary DC/DC converter should take during the starting interval. This technique results in optimizing the size of the magnetic component of the auxiliary DC/DC converter. The operational principles and the theoretical analyses are validated through experiments with a 48Vto30V/15A prototype.
I. INTRODUCTION
Recently, many dcdc topologies for the distributed power supplies of telecommunication or server systems have been developed. These topologies are characterized by high power conversion efficiency and density. Among these topologies, a conventional zerovoltageswitching phaseshift fullbridge (ZVS PSFB) converter has received considerable attention for use in medium to high power applications, because it features high power conversion efficiency and a high power density
[1]

[4]
.
However, the conventional PSFB converter has a major disadvantage in terms of the ringing spike voltage across the secondaryside rectifier switches, which occurs due to the resonance between the leakage inductance of transformer and the stray output capacitance of the secondaryside rectifier switches. This brings EMI problems and an increase of the conduction loss due to using higher voltage rating switches. Furthermore, it causes heating of transformer, since the ringing is primarily damped out by the transformer resistance
[5]
.
Therefore, a snubber circuit is needed to reduce the voltage stress on the rectifier switches. Recently, many studies have been conducted on active clamp methods using an active switch on the snubber circuit. One method uses a synchronous active clamp circuit across the rectifiers. It alleviates the ringing voltage in the secondary side rectifier switches and recovers the energy which is absorbed by the clamping capacitor to the input or output of the converter every switching cycle using an active switch on the snubber circuit
[5]

[7]
.
Another method uses an asynchronous active clamp circuit. This method restores the ringing energy of the secondary side rectifier switches to the load through an auxiliary DC/DC converter. The control of the auxiliary DC/DC converter is independent from the main converter. Thus, small magnetic components can be used because of operating at a higher switching frequency than the main switch
[8]
,
[9]
.
However, an exact analyses of this technique for designing the auxiliary DC/DC converter has not been presented. In addition, this approach has common practical drawbacks such as a large ringing energy of the clamp capacitor during the starting interval and a constant clamping voltage unrelated to variation of the input voltage.
In this paper, a full bridge DC/DC converter using an asynchronous active clamp circuit attached at the secondary side of the transformer is shown in
Fig. 1
. The amount of power is calculated through precise mode analyses, and that power is supposed to be handled in the auxiliary DC/DC converter. Therefore, the optimized inductor size of the auxiliary DC/DC converter can be designed, and the large overshoot energy of the clamp capacitor for the starting interval is consumed through the resistor (R
_{Hy}
) connected in parallel with the clamp capacitor. Thus, problems such as the saturation of the magnetic devices and the destruction of the semiconductor devices due to a large current peak value on the auxiliary DC/DC converter do not occur. In addition, the proposed technique can control the clamping voltage which depends on variations of the input voltage. Therefore, the voltage across the rectifier switches can be clamped to a certain voltage level within the entire range of the input voltage. Therefore, the overall efficiency of the converter is increased because the ringing energy is recovered to the load through the auxiliary DC/DC converter. These advantages make the proposed converter well suited for highvoltage and highpower applications like the power supplies for telecommunication or server systems.
The PhaseShift FullBridge DCDC converter with the asynchronous active clamp technique.
The operations, analysis, design considerations and experimental results are presented to confirm the validity of the converter.
II. OPERATIONAL PRINCIPLES
 A. Operational Principles
Fig. 1
shows a circuit diagram of a PhaseShift FullBridge DCDC converter using the asynchronous active clamp technique with a current doubler in the secondary side. The converter also employs phaseshift control. The gates of M
_{1}
(and M
_{2}
) along with M
_{3}
(and M
_{4}
) are complimentarily turned on and off with a 50% fixed duty. In the converter, switches M
_{1}
M
_{4}
form the inverter bridge, M
_{SR1}
and M
_{SR2}
are the rectifier switches and D
_{1}
, D
_{2}
, C
_{cl}
and the Buck DCDC converter are the voltage clamping circuit. M
_{Hy}
and R
_{Hy}
operate through a lossy snubber circuit with hysteresis characteristics for the starton interval. In addition, the converter with the proposed technique detects the input voltage. The sensed input voltage is applied to the input of an Error Amplifier in order to change the clamping voltage depending on the input voltage.
 B. Mode Analysis
Fig. 2
shows the operational key waveforms of a Phase Shift Full Bridge DC/DC converter with the asynchronous active clamp technique. The converter has seven modes of operation during a half switching cycle. However, the only mode1 and mode2 are needed to calculate the amount of power which the auxiliary DC/DC converter is supposed to handle. For the sake of convenience of the mode analysis in the steady state, several assumptions are made as follows.

• The input voltage and the output voltage are constant voltage sources as VINand Vo.

• Lmis much larger than Lk(Lm» Lk).

• There is no DC offset current of the transformer magnetizing inductor Lm.

• The switch includes the internal diode and the parasitic output capacitance Coss.

• The diode includes the junction capacitance Cj.

• The transformer turn ratio is Np:Ns.
Operational Key waveforms of the PhaseShift FullBridge DCDC converter with the asynchronous active clamp technique.
Before t
_{0}
, I
_{MSR1}
= 0, and it is assumed that M
_{1}
, M
_{2}
and M
_{SR2}
are conducting.
Mode1 (t_{0}t_{1})
: M
_{1}
, M
_{2}
and M
_{SR2}
are conducting and the input voltage is applied to the primary side of the transformer. In this mode, the voltage across switch M
_{SR1}
is increased to its maximum value because of the resonance between the leakage inductance of the transformer and the parasitic output capacitance of switch M
_{SR1}
.
V
_{MSR1}
(t) and V
_{Lk}
(t) are expressed as follows:
This mode ends when V
_{MSR1}
(t) reaches V
_{cl}
.
Mode2 (t_{1}t_{2})
: At t
_{1}
, V
_{MSR1}
= V
_{cl}
, clamp circuit diode D
_{1}
is turned on, and then the rectifier switch voltage across M
_{SR1}
is clamped. M
_{1}
, M
_{2}
and M
_{SR2}
are still conducting and the clamp voltage V
_{cl}
is applied to the secondary of the transformer. Therefore, V
_{Lk}
and the current slope of the leakage inductor L
_{k}
are expressed as follows:
I
_{D1}
reaches zero at the end of this mode.
III. ANALYSIS AND DESIGN CONSIDERATIONS
 A. Power of the Clamp Circuit
Fig. 3
shows an equivalent circuit diagram that operates during Mode1 (t
_{0}
~t
_{1}
). As shown in this figure, a resonant LC circuit is formed, and both V
_{Cx}
(t) and i
_{Cx}
(t) are expressed as follows:
Equivalent circuit during Mode 1(t_{0} ~ t_{1}).
Where C
_{x}
is defined as C
_{j1}
+C
_{oss1}
.
At t
_{1}
, V
_{Cx}
(t
_{1}
) = V
_{cl}
. Therefore, t
_{1}
t
_{0}
is expressed as follows:
By substituting (7) into (6), i
_{D1pk}
(t
_{1}
) can be obtained as follows:
Fig. 4
shows an equivalent circuit diagram that operates during t
_{1}
~t
_{2}
. As shown in this figure, the current slope of the leakage inductor L
_{k}
is:
Equivalent circuit during Mode 2(t_{1} ~ t_{2}).
The current slope of the output inductor L
_{o1}
is:
The i
_{D1}
current slope is [Current slope of L
_{k}
 Current slope of L
_{o1}
]. It is expressed as follows:
From equations (8) and (11), the power of the clamp circuit can be calculated.
Fig. 5
shows the D
_{1}
current waveform during t
_{0}
~t
_{2}
. The area of A can be obtained by using the area formula of a triangle because the diode D
_{1}
current waveform is a triangle.
D_{1} current waveform during Mode 1&2(t_{0} ~ t_{2}).
The average current of D
_{1}
is obtained by multiplying the area by the switching frequency.
A RCD clamp circuit is used when the resistance value is obtained using equation (13) and the power of the clamp circuit can be derived from (14) as:
The average current is multiplied by 2 in equation (14) because diodes D
_{1}
and D
_{2}
alternate with each other during one switching period. Finally, the power of the clamp circuit is obtained in equation (15).
 B. Control Technology during the Starton Interval
During the starting interval, the current charging the output voltage to the steady state increases the ringing energy. If the auxiliary DC/DC converter operates in the starting interval, the large overshoot energy causes a large current peak in the auxiliary DC/DC converter because the output voltage does not reach the steadystate. Therefore, problems can occur such as the saturation of the magnetic devices and the destruction of the semiconductor devices on the asynchronous active clamp circuit. For these reasons, an additional circuit is required to consume the large overshoot energy using M
_{Hy}
and R
_{Hy}
during the starton interval.
Fig. 6
shows the part made up of switch (M
_{Hy}
) and resistor (R
_{Hy}
) in parallel with the clamp capacitor. This acts like an RCD snubber when switch (M
_{Hy}
) is turned on. The operational principle is shown in
Fig. 7
. As shown in
Fig. 7
(a), a lossy snubber circuit with hysteresis characteristics detects the clamp voltage (V
_{cl}
) and the sensed input voltage (V
_{in_sense}
). Resistor (R
_{5}
) and capacitor (C
_{2}
) are designed by considering the time to reach the steadystate. If the divided clamp voltage by resistors (R
_{1}
and R
_{2}
) is greater than the sensed input voltage which is divided by resistors (R
_{3}
and R
_{4}
), the switch (M
_{Hy}
) is turned on, and the clamping capacitor is discharged through resistor (R
_{Hy}
). In the opposite case, switch (M
_{Hy}
) is turned off, and the clamping capacitor is charged. When the output voltage reaches the steady state, the Buck converter is operated.
Equation (16) is the current slope of the Buck converter when switch (M
_{Hy}
) is turned on and Equation (17) is the current slope of the Buck converter when switch (M
_{Hy}
) is turned off. The current slope in equation (17) is proportional to the output voltage. Therefore, if the Buck converter operate in the starton interval, the peak current of the Buck converter will increase. To prevent such a problem, the hysteresis switch (M
_{Hy}
) and resistor (R
_{Hy}
) consume the large overshoot energy through the lossy snubber circuit in the starton interval, and the Buck converter operates when the output voltage is reached at the steadystate. Then the large peak current will not occur.
Fig. 7
(b) shows the operational key waveforms of the lossy snubber circuit with hysteresis characteristics.
Added lossy snubber circuit with hysteresis characteristic.
Lossy snubber circuit during starton interval and its Waveforms.
 C. Control Technique for the Wide Range of the Input Voltage
In most cases, the clamp voltage is higher than the input voltage which is obtained by the turn ratio of the transformer. Therefore, a circuit for detecting the input voltage is needed to control the clamp voltage depending on the input voltage.
Fig. 8
shows the method used for detecting the input voltage. The input voltage can be sensed by adding an auxiliary winding to the flyback converter for generating the auxiliary power of the IC (integrated circuit). In
Fig. 8
, the voltage command is changed according to the input voltage, and the turn ratio of the transformer. Therefore, the voltage command of the auxiliary DC/DC converter can be applied differently depending on the input voltage.
Circuit diagram for detecting the input voltage.
Fig. 9
shows the voltage control method of the clamp capacitor for coping with the wide range of the input voltage. The divided clamp voltage by the resistor is applied to the input of the Error Amplifier. Thus, it can be controlled depending on the input voltage through the negative feedback.
Control method for the wide range of the input voltage.
 D. Design Consideration
Design Procedure

1) Select the clamp voltage considering the margin under the condition of a maximum input voltage.

2) Calculate the maximum power using the average current and clamp voltage.

3) Generate the control command of the clamp capacitor to be satisfied with the entire range of the input voltage.

4) Design the hysteresis snubber circuit in the starton interval.

5) Design the auxiliary DC/DC converter with the maximum power.
IV. EXPERIMENT RESULTS
A 450W (input voltage 48V, output voltage 30V, output current 15A), 150kHz prototype of the proposed ZVS fullbridge PWM DCDC converter has been implemented to verify the principle of the operation. The parameters of the circuit are as follows:

Input voltage VIN: 36~72V

Output voltage Vo: 30V

Maximum Output Power Po(max): 450W

Magnetizing inductance Lm: 60uH

Leakage inductance Lk: 400nH

Output inductance Lo1, Lo2: 20uH

Output inductance LB: 95uH

Switching frequency of the Buck converter: 171kHz

Output capacitance Co: 10uF * 3 (30uF)

Primary switches M1M4: IPD027N10N3G

Transformer: ER 32/5/21(EPCOS)

Volume: 4172 mm3, Turn ratio(Np:Ns)=1:2

Output inductor: ER 32/5/21(EPCOS), 12 turns

Synchronous rectifiers MSR1, MSR2: IPB200N25N3G
A photograph of the prototype is shown in
Fig. 10
.
Fig. 10
(a) and
Fig. 10
(b) illustrate the controller stage and the power stage of the prototype, respectively.
Photograph of the prototype.
Fig. 11
shows the waveforms of the secondary transformer voltage (V
_{sec}
), the primary current (I
_{pri}
), the output current (I
_{Lo1}
), and the output current of the auxiliary DC/DC converter (I
_{Buck}
). When the input voltage is 42V and the clamp voltage is 90V, the wattage handled by the auxiliary DC/DC converter is calculated as 14.48W using equation (5)(15). In addition, the output power of the auxiliary DC/DC converter is 13.34W and the efficiency is 95% in Fig. 11. It can be seen that the mode analysis is accurate from the fact that the error rate is 3.3%.
Waveforms for the wattage analysis which the auxiliary DC/DC converter is supposed to handle with. [V_{in}=42V, V_{cl}=90V]
Fig. 12
shows the waveforms of the secondary transformer voltage (V
_{sec}
), the clamp voltage (V
_{cl}
), and voltage of the secondary rectifier switches, M
_{SR1}
and M
_{SR2}
. These waveforms indicate that control method has been applied to cope with the wide range of the input voltage.
Waveforms of the clamp voltage depending on the input voltage.
Fig. 13
shows the waveforms of the output voltage (V
_{o}
), the clamp voltage (V
_{cl}
), the output current of the auxiliary DC/DC converter (I
_{Buck}
), and the output current (I
_{Lo1}
) during the starting interval.
Fig. 13
(a) illustrates the waveforms of the PSFB converter employing an asynchronous active clamp circuit with the proposed technique in the starting interval. It can be seen that M
_{Hy}
and R
_{Hy}
consume the large overshoot energy through the lossy snubber circuit before the output voltage reaches the steadystate. After that, the Buck converter works. Therefore, the large peak current will not occur in the auxiliary DC/DC converter. On the other hand,
Fig. 13
(b) shows the waveforms of the conventional PSFB converter employing an asynchronous active clamp circuit. In
Fig. 13
(b), the output current of the Buck converter (I
_{Buck}
) is increased. This can cause the destruction of semiconductor devices and saturation of the magnetic devices.
Waveforms during startinginterval.
Fig. 14
illustrates the efficiency curve at V
_{in}
= 50V. The maximum efficiency is 94.87% at 8A and the efficiency at the full load (15A) is 93.24%.
Efficiency of the converter.
V. CONCLUSIONS
This paper presents an exact analyses of a ZVSFBPWM converter employing an asynchronous active clamp circuit. The wattage that is handled by the auxiliary DC/DC converter is calculated through a precise mode analysis. Therefore, the optimized inductor size of the auxiliary DC/DC converter can be designed. Moreover, the large overshoot energy during the starting interval is consumed through a lossy snubber circuit. As a result, the converter with the proposed technique can considerably improve the reliability of a system.
This paper also presents a voltage control method of the clamp capacitor to cope with the wide range of the input voltage. The converter using the proposed technique effectively reduce the voltage stress on the rectifier switches within the entire range of the input voltage. The ringing energy is recovered to the load through the Buck converter. Therefore, the overall efficiency of the converter is increased.
Finally, experiments were performed to verify the proposed technique. A converter having these advantages is expected to be well suited for high power density applications.
Acknowledgements
This work was supported by the research program 2013 of Kookmin University, Korea and also supported by the MOE(Ministry of Education), Korea, under the BK21 PLUS(Brain Korea 21 Program for Leading Universities & Students) support program (31Z20130012993) supervised by the NRF(National Research Foundation of Korea)
BIO
YongChul Lee received his B.S. degree in Electrical Engineering from Kookmin University, Seoul, Korea, in 2011, where he is presently pursuing his Ph.D. degree. His current research interests include the analysis, modeling, design, and control of power converters.
HongKwon Kim received his B.S. and M.S. degrees in Electrical Engineering from Kookmin University, Seoul, Korea, in 2011, and 2013, respectively. He is currently working for LG Electronics, Korea. His current research interests include lightemitting diode drivers, and the analysis, design and digital control of power converters.
JinHo Kim received his B.S. and M.S. degrees in Electrical Engineering from Kookmin University, Seoul, Korea, in 2010, and 2013, respectively. He is currently working for LIG Nex1, Korea. His current research interests include defense industry applications.
SungSoo Hong (S’88M’94) received his B.S. degree in Electrical Engineering from Seoul National University, Seoul, Korea, in 1980, and his M.S. and Ph.D. degrees in Electrical and Electronics Engineering from the Korea Advanced Institute of Science and Technology (KAIST), Daejeon, Korea, in 1986 and 1992, respectively. From 1984 to 1998, he was an Electronics Engineer with Hyundai Electronics Company, Korea. In 1993, he was with the Virginia Polytechnic Institute and State University, Blacksburg, VA, USA, as a Research Scientist. Since 1999, he has been a Professor in the Department of Electrical Engineering, Kookmin University, Seoul, Korea. He has also worked for the Samsung Power Electronics Center and the Samsung Network Power Center as a Research Fellow. His current research interests include modeling and control techniques for power converters, power conditioning systems for the renewable energy, and EMI analysis and reduction techniques for power electronics circuits.
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