Advanced
Wind Energy Interface to Grid with Load Compensation by Diode Clamped Multilevel Inverters
Wind Energy Interface to Grid with Load Compensation by Diode Clamped Multilevel Inverters
Journal of Power Electronics. 2014. Mar, 14(2): 271-281
Copyright © 2014, The Korean Institute Of Power Electronics
  • Received : December 01, 2012
  • Accepted : August 18, 2013
  • Published : March 30, 2014
Download
PDF
e-PUB
PubReader
PPT
Export by style
Share
Article
Author
Metrics
Cited by
TagCloud
About the Authors
Paulson Samuel
Department of Electrical Eng., Motilal Nehru National Institute of Technology, Allahabad, India
M. Kishore Naik
Depatment of Industrial Eng., University of Padua, Padua, Italy
Rajesh Gupta
Department of Electrical Eng., Motilal Nehru National Institute of Technology, Allahabad, India
rajeshgupta310@rediffmail.com
Dinesh Chandra
Department of Electrical Eng., Motilal Nehru National Institute of Technology, Allahabad, India

Abstract
Fluctuating wind conditions necessitate the use of a variable speed wind turbine (VSWT) with a AC/DC/AC converter scheme in order to harvest the maximum power from the wind and to decouple the synchronous generator voltage and frequency from the grid voltage and frequency. In this paper, a combination of a three phase diode bridge rectifier (DBR) and a modified topology of the diode clamped multilevel inverter (DCMLI) has been considered as an AC/DC/AC converter. A control strategy has been proposed for the DCMLI to achieve the objective of grid interface of a wind power system together with local load compensation. A novel fixed frequency current control method is proposed for the DCMLI based on the level shifted multi carrier PWM for achieving the required control objectives with equal and uniform switching frequency operation for better control and thermal management with the modified DCMLI. The condition of the controller gain is derived to ensure the operation of the DCMLI at the fixed frequency of the carrier. The converter current injected into the distribution grid is controlled in accordance with the wind power availability. In addition, load compensation is performed as an added facility in order to free the source currents being fed from the grid of harmonic distortion, unbalance and a low power factor even though the load may be unbalanced, non-linear and of a poor power factor. The results are validated using PSCAD/EMTDC simulation studies.
Keywords
I. INTRODUCTION
The proportion of distributed generation (DG) in modern electric power systems is steadily increasing in several countries. Wind generation is a renewable source and it is an important component of DG which has traditionally been used for energy conversion and is more recently being harnessed for grid support functions as well [1] . Different classes of power converters have been proposed for the integration of renewable energy resources into the distribution grid [2] . Multilevel inverters have been the preferred option for the high power applications in industrial drives for many years and more recently in wind power generation systems due to the fact that they can transfer high power using matured power semiconductor technology with reduced voltage stress on semiconductor switches, better waveforms and a lower THD.
The major problems faced by wind generation systems in general are variations in available power due to varying wind speeds and variations in the frequency and voltage of the generator output when synchronous generators are used with variable speed wind turbines (VSWT). To address these problems, an AC/DC/AC system is used to decouple the generator frequency and voltage from the grid frequency and voltage. In this system the power output of the synchronous generator is first rectified to DC and then a DC-AC power converter interfaces with the grid with a constant voltage and frequency operation. Thus, there are two converters in use in such a scheme; a machine side converter which converts the AC to DC and a grid side converter which interfaces with the grid at an appropriate frequency and voltage. In addition, it provides all of the needed grid support functions. For high power wind generation systems involving either a single high power wind generator or a pool of power available from a wind farm, the rating of the converter should match the maximum power transferred from the wind generation system. In this paper a three phase diode bridge rectifier (DBR) is used as a machine side converter, which is readily available in the range of the required high power ratings. However, the major problem lies with a grid side converter that requires controllable switches having large voltage and power ratings. In this paper a diode clamped multilevel inverter (DCMLI) has been considered as the grid side converter. The DCMLI is operated as a voltage source inverter (VSI) in the current control (CC) mode in order to inject a current according to the maximum available power from the wind turbine under the prevalent wind conditions. It also provides load compensation for local loads at the point of common coupling (PCC). The added duty of providing local load compensation necessitates a converter rating that is larger than the generator. Depending upon the rating of the DCMLI, it is capable of partly or fully compensating the load currents so that the source (grid) currents drawn are pure sinusoids, balanced and in phase with the PCC voltages.
Although there are three topologies for multi-level inverters, the DCMLI has an edge over the others for wind turbine applications since it requires only one DC source which matches with the fact that a three phase diode bridge rectifier connected to a synchronous generator yields only one isolated DC source. The DCMLI has a simple construction and the modified DCMLI [3] has the added advantage of a reduced number of blocking diodes. However, the usual problem of voltage balancing between the capacitors has to be addressed in order to maintain the stable operation of a DCMLI, for which two methods have been suggested [4] , [5] . These are the external balancing circuits and special PWM techniques which have their own advantages/disadvantages such as added cost for the former and increased control complexity and difficulty of control for certain operating conditions for the latter.
There are several current control methods for inverters. The hysteresis control of power converters has been very popular since it has good dynamic characteristics and easier implementation for two-level inverter [6] . However, this method suffers from the problems of variable and unequal switching frequencies for different switches in a VSI. This leads to the problem of unequal charging/discharging and unbalancing of the dc link capacitors, when extended for multilevel converter control [7] . To overcome the problem of variable and unequal switching frequencies, the ramp-comparison modulation scheme of two level inverters has great potential for the control of the multilevel inverters [8] , due to its property of a constant switching frequency which is decided by the triangular carrier frequency.
A control strategy has been proposed in this paper for the modified topology DCMLI with a reduced number of diodes for achieving the objective of the grid interface of wind power systems together with local load compensation. A novel fixed frequency current control method is proposed based on level shifted multi carrier PWM modulation for achieving the required control objectives with equal and uniform switching frequency operation. The condition for ensuring that constant frequency operation is maintained at all times has been derived for the proposed modulation method. The inverter power output to the grid is regulated to match the available power at the wind turbine, in order to evacuate the power available from the wind turbine as per the wind conditions.
II. SPEED AND POWER RELATIONS OF A WIND TURBINE
The kinetic energy in the air moving at the speed VW is given by the following equation:
PPT Slide
Lager Image
where, ρ is the air density and A is the rotor area swept by the turbine blades. The mechanical power delivered by a wind turbine is expressed as:
PPT Slide
Lager Image
where, Cp is the power coefficient defined as the ratio of the turbine power to the available wind power. The power coefficient is a function of the pitch angle β and the tip speed ratio λ which is defined as the ratio of the turbine speed at the tip of the blade to the wind speed VW , which is given by (3).
PPT Slide
Lager Image
where, ω is the turbine angular speed and R is the turbine rotor radius. The turbine power coefficient Cp , is a function of the tip-speed ratio λ , and for a fixed pitch angle β , peaks at a certain value of the rotor speed for a given value of wind speed. Hence, the objective of the power controller is to operate the turbine at an optimal rotor speed for the prevalent wind speed. The mechanical torque of the wind turbine is expressed as:
PPT Slide
Lager Image
The electrical power output from the generator is given by:
PPT Slide
Lager Image
Where ηgen and η gear are the generator and gear efficiencies.
III. WIND ENERGY INTERFACE TO THE GRID USING A VSI IN THE CURRENT CONTROL MODE
A VSI is capable of operating in either voltage or current control mode. If one is used in current control mode it can also compensate the load currents so that the source currents are sinusoidal, balanced and have the specified phase angle with respect to the PCC voltage, which improves the power factor at the PCC, irrespective of unbalancing, a low power factor and harmonic distortion of the load currents [9] . The dc link of the VSI is fed from the output of the uncontrolled diode bridge rectifier connected to the synchronous generator.
Fig. 1 shows the proposed wind generation system interfaced with the grid through a modified DCMLI [3] . It is assumed that the load is reactive, which deteriorates the power factor and has harmonic components due to the presence of nonlinear loads and/or may be unbalanced. The output terminal voltage of the synchronous generator usually has a variable magnitude and frequency due to wind speed variations. However, in the present case the terminal voltage is held constant due to the excitation controller which keeps the dc link voltage constant over the normal speed and load range. The VSI is required to inject current according to the available wind power and provide the required compensation at the PCC.
PPT Slide
Lager Image
Block diagram (shown only for single phase) of the wind generation system connected to grid through a modified DCMLI.
As the power levels of individual wind turbines increase and cross into the multi-megawatt range, the converter technology also needs to be improved to handle the increased thermal stress. It is becoming increasingly clear that the current practice of having low voltage two level converters and then stepping up the voltage in order to interface with medium voltage (MV) grids will not suffice. MV inverters are fast emerging alternatives and have been around in drives applications for several years. Instead of using several devices in series and parallel to handle the increased voltage and current stress, multi level converters offer the advantages of reductions in voltage stress, THD and current stress at medium voltage for the same power. For medium voltage distribution systems, it is desired that multi-level inverters (MLI) be used as grid side converters since they offer the promise of interfacing wind energy conversion systems (WECS) directly to the grid without the bulky and costly transformers which are being placed at the tower bases in current designs. As pointed out earlier in this paper, because of its advantages over the other topologies for wind energy conversion systems (WECS), a DCMLI has been used in this paper for grid connection of the wind turbine generator.
The DCMLI injects current in such a way that the harmonics and reactive power component of the current are supplied by the shunt connected DCMLI thus relieving the grid of the need to supply these components. As a result the grid current drawn is sinusoidal and balanced and in phase with the PCC voltage. In low wind conditions the main ac source, i.e., the grid, supplies the bulk of the power required by the load and a small part of the load power may be supplied by the wind turbine. When the wind power availability is good the operating strategy is to inject as much of the wind power as possible to the PCC, so that all or a major component of the load is supplied by wind power and the import from the grid is reduced. Thus, the DCMLI controls the power flow according to the wind power availability so as to inject the maximum amount of power into the PCC. During times when the load is more than the capacity of the wind generator, the load can be shared by both the turbine and the main source (grid).
IV. CAPACITOR VOLTAGE BALANCING STRATEGY
One of the major problems associated with all diode-clamped multilevel inverters having more than three levels is the unbalancing of the DC link capacitor voltages under the steady state. It is difficult to ensure voltage balancing of the DC link capacitors under all operating conditions including high modulation indices and large power factors, which greatly limit the practical applications of the DCMLI. The DC link capacitor voltage unbalancing is termed as the divergence of the capacitor voltages. This results in voltage collapse across some of the capacitors and voltage rise across others due to the non uniform power drawn from the DC link capacitors. As a result, the output voltage waveform quality deteriorates as the number of levels is reduced and the voltage ratings of the components are at risk of being exceeded resulting in a converter trip and operational disruption. Simulation results showing the collapse of the five-level output of a five-level DCMLI to three levels is shown in Fig. 2 .
PPT Slide
Lager Image
Output voltage of a DCMLI showing the collapse of the voltage levels.
This shows how the inner levels of the five-level voltage waveform get collapsed and the outer levels increase thus finally resulting in three-levels. This occurs within a few cycles in the absence of any control. Fig. 3 shows the divergence of the capacitor voltages with respect to time. The two existing solutions for the voltage balancing problem for the DCMLI are as follows.
  • 1) Installation of a voltage balancing circuit on the DC side of the inverter[10],[11].
  • 2) Modifying the converter switching pattern according to the control strategy[12],[13], for self-balancing of the voltages.
PPT Slide
Lager Image
Divergence of capacitor voltages in DCMLI.
The later is preferred in terms of cost as the former requires additional hardware, which adds to the system cost and complexity. For applications involving only reactive power exchange, the switching pattern modification strategies can be used for the voltage balancing problem [14] , [15] . However, the voltage self-balancing can influence the reactive power control if priority is given only to the balancing problem [16] . Moreover, switching pattern modifications cannot always be used to control the capacitor voltages as it is mainly effective at low modulation indices. Furthermore, medium and high voltage power converters intended for installation to a utility grid, require more reliable and robust operation against line faults and transients. It should also be noted that for back-to-back converter applications, the switching modification strategy requires the two converters to operate at a fixed ac voltage ratio for capacitor voltages equalization. Therefore, extra balancing circuits [17] have been used for the capacitor voltage balancing in this paper.
Fig. 4 shows the external balancing circuit for balancing the capacitor voltages.
PPT Slide
Lager Image
External balancing circuit for capacitor voltages.
The balancing circuit shown in Fig. 4 , works on the principle of transferring energy from an overcharged capacitor to an undercharged one through an energy storing inductor. In this way, the capacitor voltages at the DC link are equalized. Though the utilization of these additional balancing circuits improves the operation of multilevel inverters, the devices in these circuits have to handle high currents and voltages which may be even higher than the ratings of the devices used in the main converter.
In Fig. 4 , inductor L 1 in the upper part of the circuit is used to exchange the energy between capacitors C d1 and C d2 , using switches S 1 , S 2 and diodes D 1 , D 2 . Similarly, inductor L 2 in the lower part of the circuit exchanges the energy between capacitors C d3 and C d 4 using switches S 3 , S 4 and diodes D 3 , D 4 . The charge transfer in the balancing circuit is bidirectional in nature through the anti-parallel diodes. Therefore, this circuit could be more useful to restore voltage balancing under transient conditions. Furthermore, most of the power semiconductor switches have built in anti-parallel diodes.
A control block diagram of the hysteresis band chopper current control for the capacitor voltage control is shown in Fig. 5 . This control scheme has fast dynamics due to the chopper current feedback. For controlling V dc1 and V dc2 , current i 2 is sensed and filtered to get the average value of current i 2 . The corresponding capacitor voltages ( V dc1 and V dc2 ) are also measured and filtered to eliminate the ripples.
PPT Slide
Lager Image
Hysteresis current control for capacitor voltage balancing.
The difference of the average capacitor voltages (Δ Vdc = V dc1 - V dc2 ) is passed through the proportional voltage controller gain K , which is then added to the average current i 2 to generate the reference chopper current, ich1 ref . In this control scheme, the chopper circuit is employed to track ich1 ref in a hysteresis band. This control scheme nullifies the voltage drift due to the non-zero average values of i 2 and i 4 as well as the initial voltage imbalance in the capacitors by using the proportional gain multiplied average voltage errors. To obtain the control signals for S 3 and S 4 switches in Fig. 4 , an additional hysteresis controller is required. The controller response is simulated in Fig. 6 . It can be seen that the capacitor voltages are balanced within a few cycles.
PPT Slide
Lager Image
(a)Balancing of capacitor voltages with balancing circuit. (b) DC link voltage buildup.
V. MODELING AND CONTROL OF A DCMLI USING THE PROPOSED FIXED SWITCHING FREQUENCY CURRENT CONTROL METHOD
- A. Proposed Control Scheme for DCMLI
A n -level DCMLI helps in reducing the device voltage stress by a factor of 2/( n -1) times the required net DC link voltage. The total number of semiconductor switches required per phase is 2( n -1). However, the total number of clamping diodes is 2 for a 5 level modified DCMLI compared with the 12 diodes required per phase for a conventional DCMLI [3] .
The use of level shifted unipolar PWM results in the harmonic spectrum of the output voltage to lie at the carrier frequency and the sidebands are shifted from this center in multiples of the fundamental frequency [18] . The switching harmonics amplitude is also reduced by a factor of 1/( n -1) in the output voltage. The ripples are thus reduced to a great extent and smooth modulation is possible at a fixed switching frequency. For a n -level DCMLI, ( n -1) carriers are required which are in phase but level shifted by an appropriate value.
The carrier frequency used in this paper is 5.0 kHz. Hence, on average each switch operates at 5.0 kHz/( n -1) = 1.25 kHz for n = 5.
In this paper a fixed switching frequency current control method based on the multi-carrier level shifted PWM modulation method has been proposed to control the modified DCMLI in order to track a desired shunt current to be injected into the PCC. Fig. 7 shows the modulation method proposed in detail for one phase of the DCMLI. The four level shifted carriers are: Carrier 1 with an upper limit of +2A c and a lower limit of +A c , Carrier 2 with an upper limit of +A c and a lower limit of 0, Carrier 3 with an upper limit of 0 and a lower limit of -A c , and Carrier 4 with an upper limit of -A c and a lower limit of -2A c . The switching logic is explained below.
With reference to Fig. 1 and Fig. 7 , the following control algorithm is proposed.
PPT Slide
Lager Image
Fixed switching frequency current control method for one phase of the DCMLI.
  • 1)Seis compared with a level shifted positive maximum triangular carrier 1 with peak: Acand 2Ac.
  • If +2Ac>Sethen Sp1is ON and Sp2is OFF
  • If +2Ac
  • 2)Seis compared with a level shifted positive minimum triangular carrier 2 with peak: 0 and Ac.
  • If + Ac>Sethen Sg1is ON and Sg3is OFF
  • If + Ac
  • 3)Secompared with a level shifted negative minimum triangular carrier 3 with peak: 0 and – Ac.
  • If – Ac>Sethen Sg2is ON and Sg4is OFF
  • If – Ac
  • 4)Secompared with a level shifted negative maximum triangular carrier 4 with peak: – Acand –2 Ac.
  • If –2 Ac>Sethen Sn1is ON and Sn2is OFF
  • If –2 Ac
where, Se is the switching function obtained after multiplying the current error e with the gain K . For the other phases the references are shifted by 120˚ and 240˚. With sine-triangle PWM, the semi conductor switches operate at the frequency of the triangular carrier and produce well-defined harmonics [6] . Multiple crossings of the switching function with the triangular carrier may become a problem when the time rate of change for the switching function becomes greater than that for the slope of the carrier.
- B. System Modeling
A block diagram of the per phase equivalent of a weak distribution system with the shunt connected WECS of Fig. 1 and with the DCMLI using the proposed current control mode is shown in Fig. 8 .
PPT Slide
Lager Image
Model of the weak distribution system with shunt connected WECS using DCMLI in current control mode.
The nominal linear load is represented by Rload and Lload . The grid is represented by the voltage source vs , and the equivalent Thevenin impedance (which includes the source and feeder impedances) is represented by Rs and Ls . The shunt impedance is represented by Rf and Lf and includes the impedance of the cable/line connecting the VSI to the PCC. The PCC voltage is denoted by vpcc . The DCMLI, which works as a VSI, outputs a voltage whose magnitude is ucVdc , where uc = -1, -1/2, 0, +1/2, +1, for a five level DCMLI. The current control loop of the VSI can be modeled as discussed below [19] . Choosing a state vector as x = [ ish il ] T , the following state space equation can be obtained.
PPT Slide
Lager Image
where, Leq = LshLs + LloadLsh + LloadLs
PPT Slide
Lager Image
In the block diagram of Fig. 8 , the non-linear load is represented by a disturbance d and it is added to the nominal load current. The reference shunt current ishref is derived from the net load current ild after subtracting the reference source current isref . The calculation of the reference currents isref and ishref is discussed in the Section 6. The resultant closed loop system is an output feedback switched linear system. The switching ripple amplitude can be determined for the multi-level carrier shifted modulation by extending the method used in [19] and [20] . The proper modulation of a multi-level inverter requires a smooth switching function se ( t ). However, the control signal uc contains high frequency pulses which result in switching ripples in the shunt current ish and the load current il . The reference ishref current is a computed quantity. As a result, it is free from ripples. The contribution due to a nonlinear load is neglected in this analysis as it is assumed to be very small in comparison with the total load current.
It was reported in [18] that the spectrum of the level shifted unipolar SPWM output uc of a n-level DCMLI carries a fundamental frequency component as well as switching components at a frequency of fs and its multiples with the sidebands centered around these frequencies, where fs is the carrier signal frequency. The PWM output uc consists of two components; the fundamental component ucf and the switching component uco . Since the fundamental component ucf is the desired signal, it is used for the tracking of the reference input. The switching component uco is filtered and gets propagated through the system controller and combined with the switching function Se . Here an approximate analysis has been done to determine the ripple present in the switching function Se . It is assumed that the switching component uco is a square shaped pulse with an amplitude of 1/( n -1), i.e., equal to (1/4) of that for a 5 level inverter [19] . The Fourier series for uco can be written as:
PPT Slide
Lager Image
Using the linear system theory the expression for the ripples in the switching function can be obtained as:
PPT Slide
Lager Image
where, Gt ( s ) = [ Gf 2 ( s ) - Gf 1 ( s )] G ( s ) and θ =tan -1 {Im│ Gt ( jpωs )│/Re│ Gt ( jpωs )│.The transfer functions Gf 1 ( s ) = ish ( s )/ uc ( s ) and Gf 2 ( s ) = il ( s )/ uc ( s ) are obtained from (6) by substituting vs ( s ) = 0 . Gc ( s ) is the transfer function of the controller, k is the feed-forward gain and ωs is the carrier frequency in rad/s. The peak of the switching ripple occurs at the positive to negative transition of the square switching pulses, i.e., at t = π / ωs . The peak value of sr may be obtained from (8) as:
PPT Slide
Lager Image
The following can be written using the trigonometric relationship, sin( θ ) = Im[ Gt ( jpωs )]/│ Gt ( jpωs )│, and (9) can be reduced as:
PPT Slide
Lager Image
An analysis of the ripple present in the switching function se has been done in [19] and it has been reported that multilevel PWM may be modeled by a constant gain and a fixed delay. It can be seen that the frequency of the switching component is the same as the switching frequency and the ripple magnitude is reduced by a factor of 1/( n -1) [18] .
The feed-forward gain k is selected on the basis of the maximum ripple condition. It is observed that an increase in the gain k results in increases in both the error amplitude and the amplitude of the ripple. The gain k should be high for improvements in both the steady state and the dynamic performance of the system. Fig. 9 shows the intersection of the switching function with the level shifted carriers for a five level inverter at a specific value of the gain k .
PPT Slide
Lager Image
Error function with ripple intersecting with one triangular carrier in a five level DCMLI.
Let Vtri be the value of the level of the upper most carrier, as shown in Fig. 9 , and Ts be the time period of the carrier. Then the peak-peak magnitude Ac of any level shifted carrier for an n -level inverter will be 2 Vtri /( n –1). The time period of the ripple is the same as that of the carrier. In order for the slope of the carrier to be greater than the slope of the ripple in the switching function, the condition that must be met is as follows.
PPT Slide
Lager Image
Substituting (11) in (10), the expression for the feed-forward gain k is obtained as:
PPT Slide
Lager Image
It can be seen that as the gain is increased beyond the value obtained in (12), the magnitudes of the error function and the ripple also increase and this leads to multiple crossings on each slope of the carrier crossings. As a result, multiple switching takes place, which violates the principle of the fixed frequency switching control method.
VI. CURRENT GENERATION ALGORITHM FOR THREE-PHASE SYSTEMS
Fig. 10 shows a three-phase four-wire shunt compensated distribution system. The three-phase load shown in the figure is supplied from the voltage source vsk through a feeder with an impedance of ( Rsk , Lsk ), where k = a , b , c , denote the three-phases. The diode clamped multilevel inverter block shown in the figure represents the VSC configuration. The shunt path contains the interfacing inductance Lshk and resistance Rshk . The voltage at the grid terminal is denoted by vtk . The currents flowing through the different branches are the source current isk , the load current ilk and the current injected by shunt branch ishk . For the three-phase, four-wire configuration, the load neutral and the compensator neutral are connected to the source neutral ns . The common dc link voltage is represented by Vdc .
PPT Slide
Lager Image
Shunt compensator used in three-phase four-wire distribution system.
The data considered for the distribution system and the shunt compensator are given in Table. 1 . The load connected to the distribution system is considered to be composed of both linear and nonlinear loads. The linear load is represented by the linear elements Llk and Rlk . The nonlinear load consists of the bridge rectifier with the dc side resistance and capacitance represented by ( Rldc , Cldc ). This nonlinear load is interfaced with the grid through an input impedance represented by ( Llac , Rlac ).
SYSTEM PARAMETERS FOR 6.6 KV, 1500 KVA DISTRIBUTION SYSTEM WITH WIND GENERATION SYSTEM
PPT Slide
Lager Image
SYSTEM PARAMETERS FOR 6.6 KV, 1500 KVA DISTRIBUTION SYSTEM WITH WIND GENERATION SYSTEM
With reference to Fig. 10 , the current control of each phase current requires the generation of separate reference shunt currents ishref for each phase. The reference current generation follows the method described in [9] , [21] . Taking into account the available wind power through the generator pgen , the expression of the injected reference shunt current is derived [22] . For independent control of the shunt currents in all the three phases in Fig 10 , the references are determined using the following equations:
PPT Slide
Lager Image
where:
PPT Slide
Lager Image
ishkref and iskref ( k = a , b , c ), respectively, are the reference shunt currents and the reference source currents for the three phases. Plav is the average load power (linear plus non-linear) that is obtained by a moving average filter using continuous measurements of the instantaneous power. The averaging window can be considered to be the immediate previous half cycle [9] , [21] . The PCC terminals voltages used (13) are the fundamental frequency components of the switching frequency contaminated terminal voltage extracted online from the measurements of the actual voltages. Therefore, source reference currents iskref in (13) are free from switching ripples.
VII. SIMULATION RESULTS
Simulations have been performed in PSCAD (ver 4.2.1) software. Both conrol loops, i.e., the capacitor voltage control loop and the shunt current control loop have been implemented in separate modules developed using FORTRAN codes in PSCAD. The data considered in the simulations is given in Table I . A sampling time step of 10 μs is considered for the simulation studies. The moving average filtering of a half-cycle has been considered for the extraction of the average load power Plav in (13). A total of 1000 samples are taken in the averaging window from the immediate previous half cycle.
A frequency of fc = 5 kHz is chosen for the carriers used in the modulation process proposed in Section 3. The uppermost amplitude Vtri = 0.05 kV is considered in the simulation. The gain k = 0.945 kV/A is calculated using (12) for fixed switching conditions and the results are obtained at k = 0.9 kV/A, to ensure fixed switching frequency operation.
Varying load conditions are considered in the simulation. Initially, a combination of nonlinear and unbalanced linear loads is connected as given in Table 1 . The linear load is increased at time t = 0.2 sec with the insertion of a balanced linear load with the values given in Table 1 . The wind speed changes from 8 m/sec to 12 m/sec at t = 0.24 sec. Fig. 11 shows the five level three-phase inverter output voltages. The tracking of the shunt current to its reference is shown in Fig. 12 . The three phase compensated source currents, the load currents and the injected shunt currents are shown in Fig. 13 . It can be seen from Fig. 13 that the source current becomes balanced and sinusoidal. The unbalanced and harmonic component of the load current is supplied from the DCMLI converter supported by the wind generator system. In addition, the source current become in-phase with the grid terminal voltage, as shown in Fig. 14 , for phase-a.
PPT Slide
Lager Image
Five level inverter output voltages for three phase system.
PPT Slide
Lager Image
Shunt current tracking performance of three-phases.
PPT Slide
Lager Image
Source, load and shunt currents for three phase system.
PPT Slide
Lager Image
In-phase source current with the grid terminal voltage for phase-a.
It is seen from Fig 6 (a) and Fig. 6 (b) that the voltage across the capacitor gets balanced using the capacitor balancing algorithm as per the desirable expectations. The operation of the DCMLI at a fixed switching frequency at the calculated gain k = 0.9 kV/A is shown in Fig. 15 . The carriers and error functions shows clear intersections leading to the operation of all of the switches at 5.0 kHz. However, if the gain is increased from the calculated one k = 0.945 kV/A, then it violates condition (12) and leads to multiple crossings. This is shown in Fig. 16 when the simulation is performed at k = 1.1 kV/A and the switches operate at a frequency higher than 5.0 kHz, due the multiple crossings of the switching function with the carriers.
PPT Slide
Lager Image
Fixed switching frequency operation at 5.0 kHz at the gain k = 0.9 kV/A.
PPT Slide
Lager Image
Multiple crossings and higher switching frequency operation at the gain k = 1.1 kV/A.
The real power distribution of the load, based on (13), among the grid supply and shunt inverter is shown in Fig. 17 . It can be seen that the net load real power is supplied from the wind turbine power and the balance is supplied from the grid. At time t = 0.24 sec, when the wind turbine power increases due to increase in wind speed from 8 m/sec to 12 m/sec, the contribution of real power from the grid significantly decreases since the major part of the load is supplied from the shunt inverter. It should be noted that part of the turbine power is also consumed in meeting the inverter circuit losses.
PPT Slide
Lager Image
Distribution of load real power between grid and shunt inverter for addition of balanced load at t = 0.2 sec. and step change in the wind turbine power due to wind speed change from 8 m/sec. to 12 m/sec. at t = 0.24 sec.
VIII. CONCLUSIONS
A diode clamped multilevel inverter is well suited for the current control of a DCMLI used as the grid interface of a higher power rated wind energy conversion system, since it has only a single dc source. The proposed fixed switching frequency control leads to an equal and uniform distribution of the switching stress among the various switches. It is shown that following the proposed gain calculation method ensures the operation of the DCMLI at the fixed frequency of the carrier. With the multicarrier level shifted current control, the net switching frequency increases and the ripple magnitude is reduced leading to a higher feed forward gain and hence better control characteristics. It is shown through simulation results that the available wind power can be controlled to feed the load real power with the balance real power being supplied from the grid. In addition to real power injection, the objective of load compensation is also achieved leading to a balanced, distortion free, unity power factor source current. The voltages across the capacitors of the DCMLI remain balanced under all conditions with the proposed control method.
BIO
Paulson Samuel received his B. E. degree in Electrical Engineering from the Shri Govindram Seksaria Institute of Technology and Science, Indore, India, in 1984, and his M. E. degree in Computer Science and Engineering from the Motilal Nehru National Institute of Technology, Allahabad, India, in 1998, where he also received his Ph.D. degree, in 2013. He is presently an Associate Professor in the Department of Electrical Engineering, Motilal Nehru National Institute of Technology. From 1984 to 1990 he served as an Engineer in the National Thermal Power Corporation, New Delhi, India. Since 1990 he has served as a faculty member in the Department of Electrical Engineering, Motilal Nehru National Institute of Technology. His current research interests include power quality, distributed generation, distribution automation and the control of power converters.
M. Kishore Naik received his B.Tech. degree in Electrical Engineering from Sri Venkateswara University, Tirupati, India, India, in 2008, and his M.Tech. degree in Electrical Engineering from the Motilal Nehru National Institute of Technology, Allahabad, India, in 2010. From 2010 to 2011, he was an Assistant Professor at Amity University, Noida, India. Since January 2012, he has been working towards his Ph.D. degree at the University of Padua, Padua, Italy. His current research includes power electronics, power quality and wireless power transfer for electrical vehicles.
Rajesh Gupta received his B. E. degree from the Madan Mohan Malaviya Engineering College, Gorakhpur, India, in 1993, his M. E. degree from the Birla Institute of Technology, Ranchi, India, in 1995, and his Ph.D. degree from the Indian Institute of Technology, Kanpur, India, in 2007, all in Electrical Engineering. From 1996 to 1999, he was a Lecturer with the Govind Ballabh Pant Engineering College, Pauri Garhwal, India. He is currently an Associate Professor with the Department of Electrical Engineering, Motilal Nehru National Institute of Technology, Allahabad, India. His current research interests include control theory, power quality, distributed generation, control of power electronics systems and multilevel converters.
Dinesh Chandra received his B. E. degree in Electrical Engineering from the Madan Mohan Malaviya Engineering College, Gorakhpur, India, in 1973. He received his M. E. and Ph.D. degrees in Electrical Engineering from the Motilal Nehru National Institute of Technology, Allahabad, India, in 1979 and 2002, respectively. He is presently a Professor with the Department of Electrical Engineering, Motilal Nehru National Institute of Technology, Allahabad. His current research interests include control systems, reduced order modeling, optimization and converters control.
References
Todeschini G. , Emmanuel A. E. 2010 “Wind energy conversion systems as active filters: design and comparison of three control methods,” IET Renewable Power Generation 4 341 - 353    DOI : 10.1049/iet-rpg.2009.0147
Kasem A. H. , Al-Saadani E. F. , El-Tamaly H. H. , Wahab M. A. A. 2010 “Power ramp rate control and flicker mitigation for directly connected wind turbines” IET Renewable Power Generation 4 (3) 261 - 271    DOI : 10.1049/iet-rpg.2008.0073
Chen A. , Hu L. , He X. 2004 “A novel type of combined multilevel converter topologies” 30th Annual conf. of IEEE Industrial Electronics Society
Mishra M. K. , Joshi A. , Ghosh A. 2003 “Control schemes for equalization of capacitor voltages in neutral clamped shunt compensator” IEEE Trans. Power Del. 18 (2) 538 - 544    DOI : 10.1109/TPWRD.2003.809684
Shukla A. , Ghosh A. , Joshi A. 2008 “Control schemes for DC capacitor voltages equalization in diode-clamped multilevel inverter-based DSTATCOM” IEEE Trans. Power Del. 23 1139 - 1149    DOI : 10.1109/TPWRD.2008.915804
Brod D. M. , Novotny D. W. 1985 “Current control of VSI-PWM inverters” IEEE Trans. Ind. Appl. IA-21 (3) 562 - 570    DOI : 10.1109/TIA.1985.349711
Gupta R. , Ghosh A. , Joshi A. 2006 “Cascaded multilevel control of DSTATCOM using multiband hysteresis modulation” in Proc. IEEE PES General meeting 18 - 22
Gupta R. , Ghosh A. , Joshi A. 2008 “Generalized converter modulation and loss estimation for grid interface applications” Proc. IEEE PES General meeting
Ghosh A. , Ledwich G. 2002 Power Quality Enhancement using Custom Power Devices 1st Ed Springer USA
Chen Y. , Mwinyiwiwa B. , Wolanski Z. , Ooi B. T. 2000 “Unified power flow controller (UPFC) based on chopper-stabilized diode-clamped multi-level inverter” IEEE Trans. Power Electron. 15 (2) 258 - 267    DOI : 10.1109/63.838098
Bloh J. V. , Doncker R. W. D. 2002 “Design rules for diode-clamped multilevel inverters used in medium voltage applications” in Proc. IEEE PESC Conf. 165 - 170
Pou J. , Pindado R. , Boroyevich D. , Rodriguez P. , Vicente J. 2004 “Voltage balancing strategies for diode-clamped multilevel converters” in Proc. IEEE PESC Conf. Queensland Vol. 5 3988 - 3993
Ishida T. , Matsue K. , Sugita K. , Huang L. , Sagawa K. 2000 “DC voltage control strategy for a five-level converter” IEEE Trans. Power Electron. 15 (3) 508 - 515    DOI : 10.1109/63.844511
Chen Y. , Mwinyiwiwa B. , Wolanski Z. , Ooi B. T. 1997 “Regulating and equalizing DC capacitance voltages in multilevel STATCOM” IEEE Trans. Power Del. 12 (2) 901 - 907    DOI : 10.1109/61.584411
Kincic S. , Chandra A. , Babic S. 2002 “Five level diode-clamped voltage source inverter and its applications in reactive power compensation” in Proc. IEEE LESCOPE 86 - 92
Akagi H. , Fujita H. , Yonetani S. , Kondo Y. 2005 “A 6.6 kV transformer-less STATCOM Based on a five-level diode-clamped PWM converter: system design and experimentation of a 200 V, 10 kV laboratory model” in Proc. 14th IAS Conf. Vol. 1 557 - 546
Mishra M. K. , Joshi A. , Ghosh A. 2001 “A new closed loop control scheme for capacitor voltage equalization in shunt compensator using neutral current injection,” in Proc. IEEE PES Winter Meeting Vol. 1 126 - 131
Holmes D. G. , Lipo T. A. 2003 Pulse Width Modulation for Power Converters John Wiley & Sons, IEEE press
Gupta R. , Ghosh A. , Joshi A. 2007 “Control of cascaded transformer multilevel inverter based DSTATCOM” Electric Power System Research (EPSR) 77 (8) 989 - 999    DOI : 10.1016/j.epsr.2006.08.015
Gupta R. , Ghosh A. 2006 “Frequency-domain characterization of sliding mode control of an inverter used in DSTATCOM application,” IEEE Trans. Circuits Syst. I, Reg. Papers 53 (3) 662 - 676    DOI : 10.1109/TCSI.2005.859053
Ghosh A. , Ledwich G. 2003 “Load compensating DSTATCOM in weak AC systems” IEEE Trans. Power Delivery 18 (4) 1302 - 1309    DOI : 10.1109/TPWRD.2003.817743
Samuel P. , Gupta R. , Chandra D. 2011 “Grid interface of wind power with large split-winding alternator using cascaded multilevel inverter” IEEE Trans. Energy Convers. 26 (1) 299 - 309    DOI : 10.1109/TEC.2010.2096538