A new active LED driver with high power factor (PF) and low total harmonic distortion (THD) compatible with a rapid-start ballast is proposed. An LC input filter is attached to the ballast to increase PF and reduce THD. A boost converter is then installed to regulate the LED current, where an unstable operating region has been newly identified. The unstable region is successfully stabilized by feedback control with two zeroes. The extremely high overall system of the 10th order is completely analyzed by the newly introduced phasor transformed circuits in static and dynamic analyses. Although a small DC capacitor is utilized, the flicker percentage of the LED is drastically mitigated to 1% by the fast controller. The proposed LED driver that employs a simple controller with a start-up circuit is verified by extensive experiments whose results are in good agreement with the design.
I. INTRODUCTION
Conventional fluorescent lamps are being replaced with light emitting diode (LED) lamps to save energy and preserve the environment
[1]
-
[13]
. An LED lamp has higher efficiency than fluorescent lamps; its lifetime is longer than 50,000 hours, which is approximately 10 times that of a fluorescent lamp. Many countries thus promote the use of LED lamps even though these lamps are expensive. The replacement of fluorescent lamps with LED lamps in some countries, such as Japan, is highly impeded by this issue. Rapid-start ballasts are already firmly installed inside ceilings and are difficult to replace with new switching converter-type LED drivers. A practical solution is to attach an LED driver to a rapid-start ballast instead of removing the ballast from the ceiling
[14]
-
[16]
. A few practical design issues must be considered in dealing with LED drivers. First, the use of a large DC input capacitor for the LED driver should be avoided because it produces a large peak inrush current and may cause occasional fires inside the rapid-start ballast
[16]
. Second, the power factor (PF) and total harmonic distortion (THD) of the LED lamp should not be reduced although the power level of an LED lamp is typically half that of a fluorescent lamp . This problem can be resolved by attaching an appropriate LC filter to the rapid-start ballast
[16]
. Third, accurate static and dynamic circuit models, including a switching converter and a highly nonlinear rapid-start ballast, are required for the design of an LED lamp. This cumbersome problem can be addressed by the recently proposed unified general phasor transformation
[18]
.
An active LED driver that is compatible with the rapid-start ballast and meets the three design considerations mentioned above is proposed in this study. A small DC capacitor with an LC filter is attached to the ballast, and a boost converter regulates the LED array (
Fig. 1
). Unlike a conventional boost converter, the power source of the converter is not an ideal voltage source but the small DC capacitor linked to an output of the ballast whose characteristic is highly nonlinear. Furthermore, an unstable operating region is identified in this study; such region can be avoided by selecting an appropriate duty cycle of the boost converter. The complete DC and AC phasor transformed circuit models for the 10th order LED lamp system developed in this study allow for the drastic reduction in LED ripple current even with a small DC capacitor. This design is extensively verified by experiments.
Proposed boost converter-type LED lamp with a control circuit that is compatible with a rapid-start ballast..
II. STATIC ANALYSIS AND DESIGN OF THE PROPOSED ACTIVE LED DRIVER
The LED lamp (
Fig. 1
) operates with a rapid-start ballast and is composed of an LED array and the proposed LED driver, which includes an input filter, a rectifier, a boost converter, and a controller. Regulated current is provided by controlling the duty cycle of the boost converter for the LED array regardless of the large rectified ripple voltage of 120 Hz caused by the small DC input capacitor. This capacitor is where the LED current obtains the feedback from the source voltage variation of the rapid-start ballast and other variations, such as temperature.
- A. Selection of the Converter
A DC–DC converter is necessary to make the LED current constant regardless of the ripple voltage without any power loss. Galvanic isolation is not required for tubular-type LEDs; hence, an isolation transformer need not be used. Instead, a single-stage converter should be utilized considering the complexity of the gate driver and voltage rating of the LED array. Among various DC–DC converters, the boost converter was selected in this study because of the simple driver structure of its main MOSFET (
Fig. 1
). Although soft switching provides high efficiency in general, it is not considered because the use of high switching frequency to reduce the converter filter size does not contribute to the overall filter size, where the input filter is already extremely large for the operating frequency of 60 Hz. For a buck converter, the n-MOSFET utilized for a power switch requires a bootstrap gate driver, such as IR2101, which does not work properly when the load current is small.
The LED employed in this study (i.e., DG-82A83C-001-5S-3) has forward voltage drop
VLED
= 3.0 V and equivalent series resistance
rLED
= 6.3 Ω at 60 mA. The LED array can then be characterized by
rT
and
VT
as follows
[10]
:
where
m
is the number of series-connected LEDs. The output voltage applied to the LED array (
Fig. 1
) becomes the following:
The voltage drop of an LED at 60 mA is determined from Eq. (2) as 3.38 V, and its power becomes 0.20 W. This condition means that approximately 100 LEDs are required for an output power of 20 W.
- B. Derivation of the Static Models of the LED Lamp
The static behavior of the proposed lighting system (
Fig. 1
) was fully analyzed in this study through phasor transformations
[17]
,
[18]
, which enable us to determine the amplitude and phase of AC circuit variables such as in a DC circuit. By applying the transformation, an averaged DC phasor circuit was obtained (
Fig. 2
(a)). The imaginary resistors represent the reactance of inductors and capacitors in the steady state. The rapid-start ballast is highly nonlinear, but its parameters are assumed to be fixed at an operating point. The input filter composed of
Lc
and
Cc
is attached to this ballast to satisfy PF and THD regulations.
Static phasor transformed circuits of Fig. 1.
The boost converter and rectifier can be transformed to equivalent auto-transformers whose turn ratios are the complementary values of their corresponding switch duty cycles
[19]
. The boost converter and rectifier are assumed to operate in the continuous conduction mode (CCM) so that they can be replaced with the averaged switched transformers. All variables, including
Vs
and
Is
, are represented as phasors and the Zener diode voltage
Vz1
. The LED array is modeled as DC voltage source
VT
and dynamic resistance
rT
. Removing the complex transformer for the equivalent circuit of the rectifier (
Fig. 2
(a)) from the left side is possible with a recently proposed method
[22]
. By referring all parameters into the primary side of the rapid-start ballast while removing all transformers (
Fig. 2
(b)), the source current is as follows:
From Eq. (3), PF can be derived by identifying its real and imaginary parts as follows:
From Eq. (6), the complex transformer is assumed to have a zero phase for simplicity so that the real part operator of
Fig. 2
(a) can be neglected; only the real value of equivalent voltage source
V’tz
is provided. Given the nonlinearity of the ballast, the exact values of
Lc
and
Cc
were determined by experiments, which will be described in the succeeding section.
- C. Determination of Stable Operating Points Using a Simplified Model
As described in the previous section, a detailed analysis of the lighting system (
Fig. 2
(a)) may yield inaccurate results because of the nonlinearity of the rapid-start ballast and rectifier. The left part of the rectifier circuit must be simplified to understand the behavior of the boost converter with the LED array. The output
V-I
characteristic of the rectifier in the steady state was measured as shown in
Fig. 3
. It was found to be quite linear for the operating range as shown in
Fig. 4
; hence, the system at the output of the rectifier can be characterized as equivalent resistance
Ri
= 270 Ω and voltage source
Veq
= 168 V as follows:
Measured static rectifier output characteristic curve.
Simplified model of the static rectifier output model and boost converter.
The load current of LED array
IL
versus the duty cycle of boost converter
D
in the steady state is derived from
Fig. 4
as follows:
where
The critical duty cycle
Dc
that maximizes
IL
is derived from Eq. (8) as follows:
For the LED array of
m
= 100, the calculated
IL
from Eq. (8) is compared with the experimental result as shown in
Fig. 5
.
IL
increases for duty cycle
D
up to the critical value
Dc
= 0.75 similar to the conventional boost converter; however, it decreases when
D
is larger than
Dc
. Load current
IL
can be either controlled for the lower region (
D < Dc
) or the higher region (
D > Dc
). However, the lower region is preferred because rectifier current
Ii
for the higher region increases for the same load current
IL
as shown in Eq. (8). The maximum duty cycle should thus be restricted to
D < Dc
. In this study, the Zener diode
Dz2
was employed to limit the maximum duty cycle by clamping control voltage
vc
.
Measured and analyzed static characteristics of IL vs. D with the critical value of Rc of Eq. (17) that determines the dynamic stability of the LED driver.
III. DYNAMIC ANALYSIS AND DESIGN OF THE PROPOSED ACTIVE LED DRIVER
- A. Derivation of the Dynamic Models of the LED Lamp
Controlling the proposed active LED driver is challenging because of the highly nonlinear characteristics and the 10th order complexity of the overall system. As shown in
Fig. 1
, the proposed controller includes the differential current sensing part and frequency compensation circuit components
CT, Rz
, and
Cz
as well as a conventional PWM control circuit. The dynamic models for the overall LED driver should be derived to design the proposed controller. As shown in
Fig. 6
(a), the models can be regarded as operating in a quasi-steady state; the same static model used in the steady state (
Fig. 4
) was thus adopted. This condition can be justified by the very slow dynamic response of the rapid-start ballast and input filter. Its operating frequency of approximately 60 Hz is more than 20 times lower than the bandwidth of the dynamics of the controller. One difference is rectified current ripple
ir
, which is a surge current of 120 Hz that acts as a major disturbance to the control system. The proposed controller should mitigate these ripple harmonics by a fairly fast control loop. Considering that ripple voltage
vr
that appears in capacitor
Ci
is easy to measure and analyze, an approximated equivalent circuit can be obtained as shown in
Fig. 6
(b) by applying the Thevenin theorem to the left part of the dotted line of the circuit of
Fig. 6
(a). The detailed analysis of
vr
for a given
ir
is complicated and avoided in this study. Instead, it will be measured for an open loop control condition and regarded as an independent source from here on.
Derivation of the dynamic models of the proposed LED driver with the rectified ripple disturbance of the dynamic stability of the LED driver.
The large signal model of
Fig. 6
(b) is then perturbed, and an AC model is obtained in the frequency domain by removing all DC sources but including the ripple voltage source
[19]
. The harmonic ripples and perturbed small signals appear in the same equivalent circuit; this occurrence is uncommon. Finally, the most simplified model (where the auto transformer of the boost converter is removed) is obtained as shown in
Fig. 6
(d). A filtered circuit with three independent voltage sources appears.
- B. Transfer Function of Load Voltage vs. Duty cycle: Gd(s)
For the AC analysis, DC operating point
Ii
is calculated from
Fig. 4
as follows:
The input side impedance is derived from
Fig. 6
(c) as follows:
The small signal transfer function of boost converter output
in CCM as a function of duty cycle
of the switch can be derived from
Fig. 6
(d) for the two small signal-independent sources
From
Fig. 6
(d), the transfer function from
to
when
is zero is as follows:
The transfer function from
to
when
is zero is derived with Eq. (11) as follows:
From Eqs. (13) and (14), transfer function
Gd (s)
from
to
can be calculated as
The zero frequency response is obtained from Eq. (15) as follows:
where
Rc
is critical resistance that determines the proposed system stability as follows:
When the numerator of Eq. (16) is positive (i.e.,
Rc
> 0), the gain is positive and thus corresponds to the positive slope of
IL
in
Fig. 5
. This condition is justified considering that
IL
is proportional to
VL
as follows:
Critical duty cycle
Dc
that maximizes
IL
of Eq. (10) is also obtained from Eq. (17) when
Rc
= 0 as shown in the lower part of
Fig. 5
. Notably, the
Rc
of Eq. (17) should be positive to keep the proposed system stable. The first term of Eq. (17) is always negative as can be easily identified from Eq. (18).
- A. Transfer Function of Load Voltage vs. Rectified Ripple Voltage: Gr(s)
As discussed in the previous section, ripple voltage
Vi(s)
is adisturbance, and its transfer function to load voltage
should be obtained to mitigate the effect of this disturbance on the ripple current of the LED. This transfer function is easily derived from
Fig. 6
(d) in a very similar manner to Eq. (13) as follows:
- B. Transfer Function of Load Current vs. Load Voltage: Gv(s)
The overall configuration of the proposed controller is redrawn in
Fig. 7
(a). All the circuit parameters at the LED load side are highlighted.
Fig. 7
(a) is modeled for the complete modeling of the proposed LED driver for use in subsequent sections. Transfer function
Gv (s)
is defined for perturbed load current
against perturbed load voltage
and obtained from
Fig. 7
(a) as follows:
Overall control block diagram of the proposed LED driver of Fig. 1.
- C. Transfer Function of the Control Circuit: Gc(s)
The transfer function of the control circuit (
Fig. 1
) from
to
can be determined as follows:
where
gm
and
rm
are the gain and output resistances of the operational transconductance amplifier (OTA), respectively. The amplitude of the saw tooth of the PWM is denoted as
Vsaw
.
- D. Controller Stability Design
The overall control block diagram of the proposed LED driver is drawn in
Fig. 7
(b) by combining the transfer functions of Eqs. (13) to (22). The overall transfer function for the reference current input is derived from
Fig. 7
(b) with Eq. (15) as follows:
The overall transfer function for the ripple voltage input is derived from
Fig. 7
(b) with Eq. (15) again as follows:
From Eqs. (23) and (24), the proposed LED driver is determined to have loop gain as follows:
To make the system stable, converter transfer function
Gd (s)
was examined with Eq. (15) and plotted in
Fig. 8
for the circuit parameters of
Table I
used in the experiment. For clarity, these calculation results were verified by the circuit simulator MMSIM72 (Cadence) using the equivalent circuit in
Fig. 6
, which is found to be very accurate. As shown in Eq. (15), three poles and two zeroes exist in
Gd (s)
, which is rewritten as follows:
Calculated bode plot of boost converter transfer function Gd (s) using Eq. (15) when D = 0.65. The diamond-shaped symbols denote the points of the simulated AC response of Fig. 6(b) to verify this calculation.
CIRCUIT PARAMETERS OF THE PROPOSED LED LAMP
CIRCUIT PARAMETERS OF THE PROPOSED LED LAMP
From Eq. (26), the first pole and zero (i.e.,
p1
and
z1
, respectively) can be approximately obtained by neglecting the high-order terms at low frequency as follows:
As calculated from Eq. (28), the first pole and zero are
p1
/(2π) = ˗47 Hz and
z1
/(2π) = –13 Hz, respectively, which are mainly formed by large input capacitance
Ci
. The low-frequency pole and zero do not reduce the system stability because their values are negative and only a slight change occurs in the phase of much less than 90 degrees (
Fig. 8
).
However, the high-frequency zero,
z2
, should be positive as far as
Rc
> 0. This condition can be proved from Eq. (26), considering
z1
< 0, as follows:
Complex poles
p2
and
p3
and positive zero
z2
are determined from Eq. (28) and
Table I
as |
p2
| /(2π) = |
p3
| /(2π) = 951 Hz and
z2
/(2π) = 27 kHz, respectively. They may affect the system stability significantly because the phase of
Gd (s)
approaches 180 degrees because of the poles and even crosses over it because of the positive zero. The complex poles are mainly formed by the
Li
and
CL
of the boost converter as identified from the highest-order coefficient of Eq. (27). However, the dominant pole compensation that allows the high-order dynamics to be buried cannot be used for the proposed design because fast response is crucial to eliminate the 120 Hz ripple caused by the feedback loop control.
Two additional zeroes are thus inserted to the frequency at the two poles so that they cancel each other out. The first zero is inserted to the OTA output, and the second one is added at the current sensing circuit as follows:
From Eq. (30b),
CT
is determined as 270 nF for
rT
= 620 Ω; however, the value of
RzCz
only can be determined from Eq. (30a) for now.
- E. Controller Gain Design to Mitigate the 120 Hz Ripple
Considering the increased concern over the flicker in LED lamps and its effect on human health
[20]
, the ripple current of LEDs is mitigated in this study. The small voltage change across LEDs causes a large current variation because of the small dynamic resistance. The flicker percentage (percent flicker) is defined as follows
[21]
:
where
Amax
and
Amin
are the maximum and minimum brightness,
Imax
and
Imin
are the maximum and minimum currents, and
Iripple
and
Iavg
are the ripple and average currents of the LED lamp, respectively. In Eq. (31), the brightness of the LED is assumed to be linearly proportional to its current. The targeted flicker percentage was set to approximately 1% to be nearly flicker-free. Given that the average current of the LED array in this study is 60 mA,
Iripple
should be less than 1.2 mA to meet the specification in Eq. (31).
From Eq. (24), the ripple current can be obtained for the ripple frequency of
ωr
(= 2
π
x 120
rad/s
) in the steady state as follows:
where it has been approximated considering that the loop gain of Eq. (25) is much larger than 1 at the ripple frequency. Applying Eqs. (13), (15), and (26) to (32) and neglecting all poles and zeroes higher than 120 Hz result in the following:
For the operating conditions in
Table I
, peak-to-peak ripple voltage
Vr
is measured to be approximately 13
V
when
Ci
is 47 μF.
Cz
can thus be calculated from Eq. (33b) as 330 nF for the given value of |
H2(jωr)
|=1.2 mA/13 V = –80.7 dB.
Cz
is thus selected as 250 nF considering a 25% margin. From Eqs. (30a) and (33b),
Rz
is finally deter mined to be 670 Ω as follows:
As shown in
Fig. 9
, the compensated loop gain and phase margin at 120 Hz are 34.2 dB and 44º, respectively. This finding confirms the design of fairly high gain and appropriate margin. This calculation was verified by simulation using the equivalent circuit of
Fig. 6
(b); good agreement was observed.
Calculated bode plot of the loop gain of the proposed LED driver from Eq. (25) after being compensated. The diamond-shaped symbols denote the simulated AC response of Fig. 6(b) to verify the calculation.
IV. FABRICATIONS AND EXPERIMENTAL VERIFICATIONS
- A. On-board Power Supply for the Controller
For the operation of the proposed LED driver without an external power supply, a cheap and simple on-board power supply is required for the controller. A Zener regulator in series with the LED array was used as shown in
Fig. 1
. At start-up, this regulator cannot generate any voltage because the boost converter does not operate until the regulator activates the control circuit. A start-up circuit is thus implemented by simply adopting the diode
Ds
connected between
vi
and an appropriated intermediate point of the LED array. During start-up,
Ds
is turned on to provide the regulator with LED current directly from
vi
.
Ds
is automatically turned off after start-up because load voltage
vL
is increased as the boost converter operates. The point near the center of the array was carefully selected to meet this condition.
- B. Experiments to Determine the Combination of Lcand Cc
Several design requirements, such as load power of 20 W, PF higher than 90%, low THD characteristics, and high efficiency, should be considered for the source voltage variable range to determine the suitable values of
Lc
and
Cc
of the input filter (i.e., from 94
Vrms
to 106
Vrms
). The proposed boost converter-type LED driver is very similar to the passive LED driver in terms of output power and resonant frequency
[16]
. Therefore, the inductor of the input filter is considered to be approximately 0.1 H to 0.3 H. The suitable value of
Cc
that increases PF to above 0.9 is approximately 2 μF to 4 μF from Eq. (4). However, determining the exact values of
Lc
and
Cc
is theoretically impossible because of the non-linearity of the rapid-start ballast. Eq. (4) is inaccurate because the rectifier does not always operate in CCM and the elimination of the complex transformer is approximated and imperfect. The equations can thus be used as a guideline to select
Lc
and
Cc
, which were actually determined by experiments. The load power and PF for different source voltages were measured as shown in
Fig. 10
. The results are shown in
Table II
. The combination of 0.1 H, 3 μF or 0.1 H, 4 μF cannot satisfy the operating point of 20 W. The value of
Lc
was selected as 0.2 H in consideration of the THD of the source current and the cost.
Measured output power and input power factor with respect to duty ratio D for the source voltages from 94 Vrms to 106 Vrms.
THD regulation IEC61000-3-2 class C standard - 5th: 10%, 7th: 7%, 9th: 5%
Two additional experiments were conducted to determine the exact value of
Cc
considering the power loss and PF by changing
Cc
from 2 μF to 4 μF as shown in
Fig. 11
. As a result, 0.2 H and 2.4 μF were selected as the optimal values of
Lc
and
Cc
, respectively.
Measured Ploss and PF with respect to Cc for the source voltage from 94 Vrms to 106 Vrms.
- C. Experimental Verifications of the Design
The proposed boost converter type LED driver was built based on the proposed design procedure and verified in the laboratory. The value of input capacitor
Ci
was set to as small as 47 μF to decrease the maximum peak voltage across capacitor
Cb
in the initial transient period
[16]
. This LED driver can thus ensure a stable initial start-up.
The experimental results for load voltage
VL
, load current
IL
, source power
Ps
, ballast power loss
Pb
, load power
PL
, PF, and the efficiency for source voltages from 94 V
rma
to 106 V
rms
are summarized in
Table III
. Compared with a previous study
[16]
, the load power in the present study is perfectly regulated within 0.1% offset error without system instability. Source voltage
vs
, source current
is
, rectified voltage
vi
, and LED current
iL
were measured in ms (
Fig. 12
) to verify the line regulation. The measured rectified ripple voltage
vr
and LED ripple current
are approximately 13 V
p-p
and 1 mA
p-p
, respectively. With regard to the ratio of these peak-to-peak values to that of the 120 Hz ripples, themeasured loop gain at 120 Hz is 33.2 dB, whereas the simulated one (
Fig. 9
) is 34.2 dB. The discrepancy of 1.0 dB is of no practical concern; the experiment thus verifies that the proposed design guarantees the required mitigation of an LED ripple current of 1.2 mA
p-p
. LED ripple current
with line frequency is substantially decreased compared with that in a previous study
[16]
.
MEASUREMENT RESULTS FOR PF AND EFFICIENCY
MEASUREMENT RESULTS FOR PF AND EFFICIENCY
Measured waveforms of the proposed LED driver to verify the line regulation capability for Vs = 100 Vrms.
This experiment also shows that the selected combination of
Lc
and
Cc
meets the THD regulation for source voltages from 94 V
rms
to 106 V
rms
as shown in
Fig. 13
. Excluding the power dissipation of the rapid-start ballast, the efficiency of the proposed boost converter-type LED driver was measured to be 88.5%, which is decent considering the hard switching.
Measured source side harmonic currents for the source voltage from 94 Vrms to 106 Vrms.
The switching waveforms of MOSFET drain voltage
vx
, inductor current
iLi
, load voltage
vL
, and LED current
iL
were measured in μs as shown in
Fig. 13
; a large reverse recovery current appeared in
iLi
as expected. The prototype of the proposed LED driver is shown in
Fig. 14
. The prototype is compact in size and inexpensive.
Measured waveforms of the proposed LED driver for Vs = 100 Vrms.
V. CONCLUSIONS
The proposed boost converter-type LED driver compatible with a rapid-start ballast was proven to be very stable with fairly high PF and low THD characteristics. The very complicated 10
th
order overall system was completely analyzed for static and dynamic characterizations through reasonably simplified models. A systematic design procedure was fully established and verified by extensive simulations and experiments as having good agreement. The flicker percentage was successfully mitigated by the proposed fast feedback controller to as low as 1% even though a small DC capacitor was used. The experiments also showed that all the design requirements and standards were completely satisfied for source voltages from 94 V
rms
to 106 V
rms
.
BIO
Chang-Byung Park received his B.S. and M.S degrees in electrical engineering from Korea Advanced Institute of Science and Technology (KAIST), Daejeon, Korea, in 2008 and 2010, respectively He is currently pursuing his Ph.D. degree at KAIST. He has developed an LED driver IC and a column driver IC for LCDs as well as a wireless power transfer system. His current research interests include wireless power transfer systems and touch read-out circuits.
Bo-Hwan Choi was born in Korea in 1988. He received his B.S. degree in electrical engineering from Sungkyunkwan University, Seoul, Korea, in 2011. He is pursuing his integrated M.S. and Ph.D. degrees at the Department of Nuclear and Quantum Engineering, KAIST, Daejeon, Korea.
Jun-Pil Cheon was born in Korea in 1987. He received his B.S. degree in electrical engineering from Kwangwoon University, Seoul, Korea, in 2013. He is pursuing his M.S. degree at the Department of Nuclear and Quantum Engineering, KAIST, Daejeon, Korea.
Chun-Taek Rim was born in Korea in 1963. He received his B.S. degree in electrical engineering from Kumoh Institute of Technology, Gumi, Korea, in 1985, and his M.S. and Ph.D. degrees in electrical engineering from Korea Advanced Institute of Technology (KAIST), Daejeon, Korea, in 1987 and 1990, respectively. He has been an associate professor of nuclear and quantum engineering and an adjunct to aerospace engineering in power electronics at KAIST since 2007. From 1990 to 1995, he served as a military officer at the Ministry of National Defense in Korea. He worked as a senior researcher at the Agency for Defense Development, Daejeon, Korea, from 1995 to 2003. From 1997 to 1999, he worked for Astrium in Portsmouth, U.K. He served as a senior director at the Presidential Office, Seoul, Korea, from 2003 to 2007. He was one of the developers of Korea’s first airborne and spaceborne synthetic aperture radars. He has obtained three awards from the Korean government. He is currently developing inductive power transfer systems for online electrical vehicles and is the head of the Mobile Power Electronics Lab (Tesla Lab) at KAIST. His research area includes green modes of transportation, such as electric vehicles, ships, and airplanes, and wireless power systems for robots, home appliances, and bio-medical applications. He has authored and co-authored 42 technical papers, has written three books, and holds more than 40 patents (awarded and pending). Prof. Rim is a member of the Korea Aerospace Engineering Society and the Korean Political Science Association.
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