Modeling and Analysis of the Fractional Order Buck Converter in DCM Operation by using Fractional Calculus and the Circuit-Averaging Technique
Modeling and Analysis of the Fractional Order Buck Converter in DCM Operation by using Fractional Calculus and the Circuit-Averaging Technique
Journal of Power Electronics. 2013. Nov, 13(6): 1008-1015
• Received : March 27, 2013
• Published : November 20, 2013 PDF e-PUB PubReader PPT Export by style
Article
Author
Metrics
Cited by
TagCloud
Faqiang, Wang
State Key Laboratory of Electrical Insulation and Power Equipment, School of Electrical Engineering, Xi’an Jiaotong University, Xi’an, China
eecjob@126.com
Xikui, Ma
State Key Laboratory of Electrical Insulation and Power Equipment, School of Electrical Engineering, Xi’an Jiaotong University, Xi’an, China

Abstract
By using fractional calculus and the circuit-averaging technique, the modeling and analysis of a Buck converter with fractional order inductor and fractional order capacitor in discontinuous conduction mode (DCM) operations is investigated in this study. The equivalent averaged circuit model of the fractional order Buck converter in DCM operations is established. DC analysis is conducted by using the derived DC equivalent circuit model. The transfer functions from the input voltage to the output voltage, the duty cycle to the output voltage, the input impedance, and the output impedance of the fractional order Buck converter in DCM operations are derived from the corresponding AC-equivalent circuit model. Results show that the DC equilibrium point, voltage ratio, and all derived transfer functions of the fractional order Buck converter in DCM operations are affected by the inductor order and/or capacitor order. The fractional order inductor and fractional order capacitor are designed, and PSIM simulations are performed to confirm the correctness of the derivations and theoretical analysis.
Keywords
I. INTRODUCTION
The establishment of an accurate model for a DC–DC converter is the key step in power electronics analysis and design. A few suitable methods have been proposed in open literature   . For example, to investigate nonlinear phenomena such as chaos, period-doubling bifurcation, border collisions, and Hopf bifurcation in a pulse-width modulated-controlled DC–DC converter, a discrete map of the DC–DC converter is established  . The main idea of this discrete map is to solve the differential equations in each operation state of the DC–DC converter and then sample and collect the values of the circuit variables at a specific instant. According to the characteristics of DC–DC converters (i.e., the switching frequency is higher than the inherent frequency), the averaged method has been proposed to model DC–DC converters to investigate dynamical behavior in low frequency regions. The averaged method includes the state space averaged method  and circuit-averaging technique  . The averaged method is popular in the field of DC–DC converters because this method can be used in the complex frequency domain  ,  . However, all of the above results are obtained under the condition that the real inductor and capacitor in the DC–DC converter are considered integer order and are described by integer calculus.
Given the recent developments in integer calculus and thelarge number of discoveries on the fractal dimensions of nature and science/technology fields, fractional calculus and its corresponding applications have attracted considerable research interest and many excellent results have been obtained   . Open literature shows that the fractional order model, which is derived by using fractional calculus, is more accurate than the integer order model, which is derived by using integer calculus, in describing the real dynamical behavior of systems. For example, Reyes-Melo et al.  indicated that the dielectric relaxation phenomena in polymeric materials can be clearly described by using a fractional order model. Meral et al.  confirmed that the essential properties of viscoelastic materials can be precisely reflected by using a fractional order model. Recent research on the modeling of real inductors and capacitors shows that the nature of these two circuit elements are fractional orders and that these elements should be modeled by using fractional calculus   . For example, for the real inductor, Westerlund  indicated that the real inductor is fractional order in nature, that is, the magnetic process should be described by using a fractional order model to satisfy its causality. Westerlund  also measured the fractional order inductor of the air core coil, which is equal to 0.97. Tenreiro Machado et al.  indicated that a fractional order inductor with different orders can be developed based on the skin effect. For the real capacitor, Jonscher  and Bohannan  showed that an integer order capacitor cannot exist in nature because the form of its impedance will violate causality. Westerlund et al.  experimentally measured the order of the fractional order capacitor under different dielectrics and finding that the fractional order of the capacitor is 0.9776 for polyvinylidenefluoride, 0.9821 for metalized paper, and 0.9978 for polycarbonate. Jesus et al.  developed a fractional order capacitor with different orders by choosing different fractal structures, such as the curve of Koch, the carpet of Sierpinski, and the curves of Hilbert. Petráš  applied the fractional order inductor and fractional order capacitor to design a circuit that realizes the fractional Chua’s circuit successfully; the experimental results are in good agreement with the simulations. Thus, the real inductor and capacitor should be modeled by using fractional calculus to describe their real electrical characteristics.
A question naturally occurs to researchers and engineers who use integer calculus to derive the integer order model and describe the dynamical behavior of a Buck converter: why are the results of the derived integer order model of the Buck converter in good agreement with the circuit simulations or experiments? The main reason is that the inductor and capacitor orders in the market are near to one; thus, the integer order model can be used to describe its dynamical behavior approximately. These approximations will provide the wrong results if the inductor and capacitor orders are slightly far away from one, for example, the different inductor orders in  and the capacitor orders at 0.59 and 0.42 in  . Thus, the Buck converter should be modeled by using fractional calculus. In other words, the real Buck converter should be called as the fractional order Buck converter. By using fractional calculus and the circuit-averaging technique, this study investigates the modeling and analysis of the fractional order Buck converter in discontinuous conduction mode (DCM) operations.
The rest of the paper is organized as follows. Section II discusses the circuit operations and averaged circuit model of the fractional order Buck converter in DCM operations. Sections III and IV presents the DC and small signal analysis, respectively. Section V shows the design of the realization forms for the fractional order inductor and fractional order capacitor, as well as the validation of the effectiveness of the theoretical analysis by PSIM circuit simulations. Finally, Section VI concludes.
II. CIRCUIT OPERATION AND AVERAGED CIRCUIT MODEL
The circuit schematic of the fractional order Buck converter and its typical time domain waveforms in DCM operations are shown in Figs. 1 (a) and 1 (b), respectively. The fractional order inductor is denoted by L α , where α is its fractional order. Hence, two parameters describe the fractional order inductor, namely, inductance and inductor order α . The fractional order capacitor is denoted by Cβ , where β is its fractional order, and is described by two parameters, namely, capacitance and capacitor order β . The fractional order Buck converter contains the switch S and diode D i . vin is the input voltage, and R is the load. PPT Slide
Lager Image
Fractional order Buck converter and its typical timedomain waveforms in DCM operation: (a) circuit schematic and (b) inductor current.
The expression of the fractional order inductor of the relationship between its voltage across ( vL ) and its current through ( iL ) in the time and complex frequency domains are described in [8 , 17] . PPT Slide
Lager Image
The expression of the fractional order capacitor of the relationship between its voltage across ( vC ) and its current through ( iC ) in the time and complex frequency domains are described in [8 , 17] . PPT Slide
Lager Image
Fig. 1 (b) shows that the inductor current iL equals zero within d 3 T . So, three operation states exist in DCM operations: d 1 T , d 2 T , and d 3 T , which are different from the operation states of CCM operations. Thus, the above two points should be considered when using the circuit-averaging technique to model the fractional order Buck converter in DCM operations.
Assume that < iL >, < iS >, < v 0 >, < vin >, and < v Di > are the average values of iL , iS , v 0 , vin , and v Di , respectively; IL , IS , V 0 , Vin , and D 1 are the DC values of < iL >, < iS >, < v 0 >,< vin >, and d 1 , respectively; PPT Slide
Lager Image
are the small AC variations of < iL >, < iS >, < v 0 >, < vin >, and d 1 , respectively. Thus, < iL >, < iS >,< v 0 >, < vin >, and d 1 can be represented by the corresponding DC values plus superimposed small AC variations if the AC variations are small in magnitude compared with the corresponding DC values, that is: PPT Slide
Lager Image
Figs. 1 (a) and 1 (b) show that the switch S is ON and the diode D i is OFF within d 1 T . The voltage vL is equal to the input voltage vin minus the output voltage v 0 . Note that the input voltage vin and output voltage v 0 can be replaced by their averaged value because the amplitude of their ripple is significantly small  . Thus, we obtain the following: PPT Slide
Lager Image
According to the fractional calculus  , the peak value of the current iL can be calculated as follows: PPT Slide
Lager Image
Therefore, the averaged value of the inductor current iL can be derived as follows: PPT Slide
Lager Image
The current through switch S is equal to the current iL within d 1 T and is zero within d 2 T and d 3 T . Thus, the averaged value of the current through switch S is expressed as follows: PPT Slide
Lager Image
From Eqs. (5), (6), and (7), the inductor order has a significant effect on currents iLp , < iL >, and < iS > because all of these currents contain the inductor order α .
The voltage across diode D i is equal to the input voltage vin within d 1 T , is zero within d 2 T , and is v 0 within d 3 T . Thus the averaged voltage across diode D i is expressed as follows: PPT Slide
Lager Image
The voltage across the inductor equals vin v 0 within d 1 T , is − v 0 within d 2 T , and is zero within d 3 T . Thus, the averaged voltage across the inductor is expressed as follows: PPT Slide
Lager Image
However, according to the voltage second balance, the averaged value of the voltage across the inductor equals zero, that is, < vL > = 0. Thus, the following equation can be obtained: PPT Slide
Lager Image
By integrating Eq. (10) into Eqs. (6) and (8), the expressions concerning < iL > and < v Di > can be simplified as follows: PPT Slide
Lager Image PPT Slide
Lager Image
Thus, the averaged circuit model for the fractional order Buck converter in DCM operations can be described ( Fig. 2 ). PPT Slide
Lager Image
Averaged circuit model for the fractional order Buck converter in DCM operation.
By using Eq. (3) into Eqs. (6) and (7) and omitting high-order small signal terms, Eqs. (6) and (7) can be changed into the following formulas, respectively: PPT Slide
Lager Image PPT Slide
Lager Image
The DC and small signal analysis of the fractional order Buck converter in DCM operations are provided in the following two sections. The circuit parameters used in this study are as follows: vin = 6 V, Cβ = 470 μF, L α = 100 μH, D 1 = 0.2, R = 20 Ω, T = 10 μs, 0 < α < 1, and 0 < β < 1.
III. DC ANALYSIS
According to the averaged circuit model for the fractional order Buck converter in DCM operations (Section II), the corresponding DC circuit model can be obtained by substituting the averaged values in Fig. 2 into their corresponding DC values. According to Caputo’s fractional derivate  , the branch circuit of the fractional order capacitor is open because its current is zero. Thus, the DC equivalent circuit model for the fractional order Buck converter in DCM operations can be obtained ( Fig. 3 ). PPT Slide
Lager Image
DC equivalent circuit model for the fractional order Buck converter in DCM operations.
The DC value of iL can be easily derived by removing the small AC variations from Eq. (13), that is: PPT Slide
Lager Image
The following inequality can be derived from the condition for the Buck converter in DCM operations  , that is, IL V 0 / R : PPT Slide
Lager Image
Fig. 3 shows that IL equals V 0 / R . Thus, the following equation is obtained: PPT Slide
Lager Image
Therefore, the voltage ratio M can be derived as follows: PPT Slide
Lager Image
Accordingly, the respective expressions for V 0 and IL can be rewritten as follows: PPT Slide
Lager Image PPT Slide
Lager Image
Thus, V 0 , IL , M , and the DCM condition are all affected by the inductor order because they all include this item. Fig. 4 shows the critical resistors about the boundary condition under different inductances, with α = 0.8 and α = 0.7. The DCM region increases with decreasing inductor order. Thus, the fractional order Buck converter easily operates in DCM operations with decreasing inductor order. PPT Slide
Lager Image
Calculated results for the critical resistors under different inductances with α = 0.8 and α = 0.7.
Fig. 5 shows the calculated voltage ratio M under different inductances with α = 0.8 and α = 0.7. Under the same inductor order α , the voltage ratio M decreases with increasing inductance of the fractional order inductor. However, under the same inductance, the voltage ratio M increases with decreasing inductor order. If α = 1 (the inductor is integer order), the expressions for IL , V 0 , and M and the boundary condition for DCM operations are the same as in  . PPT Slide
Lager Image
Calculated results for the voltage ratio M under different inductances with α = 0.8 and α = 0.7.
IV. SMALL SIGNAL ANALYSIS
The small signal equivalent circuit model for the fractional order Buck converter can be obtained by substituting the average values in Fig. 2 into the corresponding small signal AC items in the complex frequency domain ( Fig. 6 ).
According to circuit theory and Fig. 6 , the following equation can be derived: PPT Slide
Lager Image
Small signal equivalent circuit model for the fractional order Buck converter in DCM operation. PPT Slide
Lager Image
The small signal of PPT Slide
Lager Image
can be easily derived by removing the DC values from Eqs. (13) and (14), respectively: PPT Slide
Lager Image PPT Slide
Lager Image
By using Eqs. (22) into (21) and simplifying the equation, the expression for PPT Slide
Lager Image
can be derived as follows: PPT Slide
Lager Image
Thus, the transfer function from the input voltage to the output voltage can be derived by setting the duty cycle variation to zero. PPT Slide
Lager Image
The transfer function from the duty cycle to the output voltage can be derived by setting the input voltage variation to zero. PPT Slide
Lager Image
The input impedance of the fractional order Buck converter in DCM operations can be derived by calculating the input voltage variations over the current through the switch S variations at a duty cycle variation of zero. PPT Slide
Lager Image
The output impedance of the fractional order Buck converter in DCM operations can be derived by setting both the input voltage variation and duty cycle variation to zero. Thereafter, the definition of the output impedance is used to derive the formulas. PPT Slide
Lager Image
The above four transfer functions contain the inductor and capacitor orders. Thus, all functions are significantly affected by these two parameters. If α , β = 1 (the inductor and capacitor are integer order), the above four transfer functions are the same as in  . Only the Bode diagrams of Gvv ( s ) and Gvd ( s ) under different inductor orders and capacitor orders are discussed in this study.
By using α , β = 0.8 and α , β = 0.7 and the other parameter values shown in Section II, the corresponding Bode diagrams of Gvv ( s ) and Gvd ( s ) are plotted in Fig. 7 according to the definition of the Bode diagram for the fractional order system  . The magnitudes and phases in these two cases ( α , β = 0.8 and α , β = 0.7) are very different. PPT Slide
Lager Image
Bode diagrams of Gvv(s) and Gvd(s) under different inductor orders and capacitor’s orders. (a) Gvv(s) and (b) Gvd(s).
V. PSIM SIMULATION FOR CONFIRMATION
As mentioned in the Introduction, all real inductors and capacitors are considered integer orders. Thus, no established circuit models exist for the fractional order inductor and fractional order capacitor in current popular circuit simulation software, such as PSIM. Thus, to confirm the correctness of the above theoretical analysis, building a circuit model for the fractional order inductor and fractional order capacitor is necessary to construct the fractional order Buck converter. The chain fractance  and Oustaloup’s approximation  are used to establish the approximate circuit models for these two fractional order circuit elements. PSIM software, which is widely used in simulating power electronics and motor drives [21 22] , is used to simulate the fractional order Buck converter.
The dynamical behavior of the fractional order inductor can be described by using the approximate circuit model in Fig. 8 . When we need Lα = 100 μH with α = 0.8, the resistors and inductors in Fig. 8 can be calculated by making the formulas from the input impedance of the approximate circuit model for the fractional order inductor equal to the formulas from Oustaloup’s approximation. The calculated results are as follows: R 11 = 238.5 Ω, R 12 = 11.4 Ω, R 13 = 1.1 Ω, R 14 = 118 mΩ, R 15 = 12 mΩ, R 16 = 1.27 mΩ, R 17 = 130 μΩ, R 18 = 13.6 μΩ, R 19 = 1.4 μΩ, R 110 = 0.17 μΩ, L 11 = 3.2 μH, L 12 = 2.56 μH, L 13 = 4.4 μH, L 14 = 7.72 μH, L 15 = 13.6 μH, L 16 = 24 μH, L 17 = 42.3 μH, L 18 = 74.5 μH, and L 19 = 131 μH. PPT Slide
Lager Image
Fractional order inductor and its approximate circuit model.
When Lα = 100 μH with α = 0.7, the calculated results for the resistors and inductors in Fig. 8 are as follows: R 11 = 36. 2Ω, R 12 = 3.03 Ω, R 13 = 0.4 Ω, R 14 = 56 mΩ, R 15 = 7.7 mW, R 16 = 1.06 mΩ, R 17 = 146 μΩ, R 18 = 20 μΩ, R 19 = 2.76 μΩ, R 110 = 0.44 μΩ, L 11 = 0.555 μH, L 12 = 0.8 μH, L 13 = 1.8 μH, L 14 = 4.2 μH, L 15 = 9.9 μH, L 16 = 23.1 μH, L 17 = 54.2 μH, L 18 = 127 μH, and L 19 = 296 μH.
Only the Bode diagrams of Lαsα for Lα = 100 μH with α = 0.8 from the theoretical analysis and PSIM simulations are plotted in Fig. 9 . The theoretical analysis is in good agreement with the PSIM simulations. Therefore, substituting the corresponding fractional order inductor with this approximate circuit model is reasonable. PPT Slide
Lager Image
Bode diagrams of Lαsα for Lα = 100 μH with α = 0.8 based on PSIM simulations and theoretical analysis.
The dynamical behavior of the fractional order capacitor can be described by using the approximate circuit model in Fig. 10 . When we need Cβ = 470 μF with β = 0.8, the resistors and capacitors in Fig. 10 can be calculated by making the formulas from the input impedance of the approximate circuit model for the fractional order capacitor equal to the formulas from Oustaloup’s approximation. The calculated results are as follows: R 21 = 4.16 mΩ, R 22 = 33 mΩ, R 23 = 0.32 Ω, R 24 = 3 Ω, R 25 = 30 Ω, R 26 = 289 Ω, R 27 = 2794 Ω, R 28 = 27 kΩ, R 29 = 260 kΩ, R 210 = 22 MΩ, C 11 = 31 μF, C 12 = 65.7 μF, C 13 = 115 μF, C 14 = 203 μF, C 15 = 358 μF, C 16 = 630 μF, C 17 = 1 mF, C 18 = 1.96 mF, C 19 = 3.46 mF, and C 110 = 2.63 mF. PPT Slide
Lager Image
Fractional order capacitor and its approximate circuit model.
When we need Cβ = 470 μF with β = 0.7, the calculated results for the resistors and capacitors in Fig. 10 are as follows: R 21 = 25.6 mΩ, R 22 = 152 mΩ, R 23 = 1.11 Ω, R 24 = 8 Ω, R 25 = 59 Ω, R 26 = 427.6 Ω, R 27 = 3109 Ω, R 28 = 22.6 kΩ, R 29 = 164.1 kΩ, R 210 = 7.86 MΩ, C 11 = 4.3 μF, C 12 = 12.4 μF, C 13 = 29 μF, C 14 = 67.6 μF, C 15 = 158 μF, C 16 = 370 μF, C 17 = 867 μF, C 18 = 2 mF, C 19 = 4.755 mF, and C 110 = 6.35 mF.
Only the Bode diagrams of 1/(C βsβ ) for Cβ = 470 μF with β = 0.8 from the theoretical analysis and PSIM simulations are plotted in Fig. 11 . The theoretical analysis is in good agreement with the PSIM simulations. Therefore, substituting the corresponding fractional order capacitor with this approximate circuit model is reasonable. PPT Slide
Lager Image
Bode diagrams of 1/(Cβsβ) for Cβ = 470 μF with β = 0.8 from the PSIM simulations and theoretical analysis.
The circuit model for the fractional order Buck converter can be constructed by using the above approximate circuit models. The corresponding Bode diagrams of Gvv ( s ) and Gvd ( s ) from the theoretical analysis and PSIM simulations under α , β = 0.8 and α , β = 0.7 can be obtained ( Fig. 12 ). Note that the Bode diagrams of Gvv ( s ) and Gvd ( s ) from the PSIM simulations are calculated from the original switch model of the fractional order Buck converter, and no average model is required. The results of the PSIM simulations are in basic agreement with the theoretical analysis, except for some discrepancy caused by the approximate circuit models for the fractional order inductor ( Fig. 8 ) and fractional order capacitor ( Fig. 10 ). PPT Slide
Lager Image
Bode diagrams of Gvv(s) and Gvd(s) from the PSIM simulations and theoretical analysis: (a) Gvv(s), (b) Gvd(s).
VI. CONCLUSIONS
By using DC and small signal analyses for the fractional order Buck converter in DCM operations, the DC values IL and V 0 , voltage ratio M , and boundary condition for DCM operations are found to contain the inductor order, and all derived transfer functions include the inductor and capacitor orders. The theoretical calculation results for the boundary condition for DCM operations and voltage ratio M show that the inductor order has a major effect on both of them; that is, the DCM operation region increases with decreasing inductor order, the voltage ratio M increases with decreasing inductor order under the same inductance. The theoretical analysis and PSIM simulations for the Bode diagrams of Gvv ( s ) and Gvd ( s ) show that both inductor order and capacitor order play an important role in the dynamical behavior of the fractional Buck converter in DCM operations. Therefore, if we directly establish the integer order transfer functions instead of the fractional order transfer functions in describing the fractional order Buck converter in DCM operations, the obtained results will be incorrect. In other words, the fractional order transfer functions of the fractional Buck converter in DCM operations must be established to describe its real dynamical behavior.
Acknowledgements
This project was supported by the National Natural Science Foundation of China (Grant No. 51007068), the Specialized Research Fund for the Doctoral Program of Higher Education, China (Grant No. 20100201120028), and the Fundamental Research Funds for the Central Universities of China (Grant No. 2012jdgz09).
BIO Faqiang Wang was born in China in 1980. He received his BS degree in automation from Xiangtan University, Xiangtan, China, in 2003, and his MS and PhD degrees in electrical engineering from Xi’an Jiaotong University, Xi’an, China, in 2006 and 2009, respectively. He was a lecturer at the School of Electrical Engineering, Xi’an Jiaotong University from 2009 to 2011. He has been an associate professor in the School of Electrical Engineering, Xi’an Jiaotong University since 2011. His current research interests include nonlinear dynamics and bifurcation analysis in power electronics. Xikui Ma was born in Shaanxi, China, in 1958. He received his BS and MS degrees in electrical engineering from Xi’an Jiaotong University, China, in 1982 and 1985, respectively. He then joined the Electrical Engineering Faculty of Xi’an Jiaotong University as a lecturer in 1985. He became a Professor in 1992. He is currently the chair of the Electromagnetic Fields and Microwave Techniques Research Group. During the academic year of 1994 to 1995, he was a visiting scientist at the Power Devices and Systems Research Group, Department of Electrical Engineering and Computer, University of Toronto. His main research interests include electromagnetic field theory and its applications, analytical and numerical methods in solving electromagnetic problems, field theory of nonlinear materials, modeling of magnetic components, chaotic dynamics and its applications in power electronics, and applications of digital control in power electronics.
References