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Development of Fault Detector for Series Arc Fault in Low Voltage DC Distribution System using Wavelet Singular Value Decomposition and State Diagram
Development of Fault Detector for Series Arc Fault in Low Voltage DC Distribution System using Wavelet Singular Value Decomposition and State Diagram
Journal of Electrical Engineering and Technology. 2015. May, 10(3): 766-776
Copyright © 2015, The Korean Institute of Electrical Engineers
This is an Open-Access article distributed under the terms of the Creative Commons Attribution Non-Commercial License (http://creativecommons.org/licenses/by-nc/3.0/)which permits unrestricted non-commercial use, distribution, and reproduction in any medium, provided the original work is properly cited.
  • Received : July 28, 2014
  • Published : May 01, 2015
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About the Authors
Yun-Sik Oh
College of Information and Communication Engineering, Sungkyunkwan University, Korea. (fivebal2@naver.com,j3angh@gmail.com,elysium03@naver.com,krkic@hanmail.net)
Joon Han
College of Information and Communication Engineering, Sungkyunkwan University, Korea. (fivebal2@naver.com,j3angh@gmail.com,elysium03@naver.com,krkic@hanmail.net)
Gi-Hyeon Gwon
College of Information and Communication Engineering, Sungkyunkwan University, Korea. (fivebal2@naver.com,j3angh@gmail.com,elysium03@naver.com,krkic@hanmail.net)
Doo-Ung Kim
College of Information and Communication Engineering, Sungkyunkwan University, Korea. (fivebal2@naver.com,j3angh@gmail.com,elysium03@naver.com,krkic@hanmail.net)
Chul-Hwan Kim
Corresponding Author: College of Information and Communication Engineering, Sungkyunkwan University, Korea. (hmwkim@hanmail.net)

Abstract
It is well known that series arc faults in Low Voltage DC (LVDC) distribution system occur at unintended points of discontinuity within an electrical circuit. These faults can make circuit breakers not respond timely due to low fault current. It, therefore, is needed to detect the series fault for protecting circuits from electrical fires. This paper proposes a novel scheme to detect the series arc fault using Wavelet Singular Value Decomposition (WSVD) and state diagram. In this paper, the fault detector developed is designed by using three criterion factors based on the RMS value of Singular value of Approximation (SA), Sum of the absolute value of Detail (SD), and state diagram. LVDC distribution system including AC/DC and DC/DC converter is modeled to verify the proposed scheme using ElectroMagnetic Transient Program (EMTP) software. EMTP/MODELS is also utilized to implement the series arc model and WSVD. Simulation results according to various conditions clearly show the effectiveness of the proposed scheme.
Keywords
1. Introduction
Recent developments and trends in the electric power consumption clearly indicate an increasing use of DC in end-user equipment. According to the trends, new DC power distribution systems have been researched and developed [1 - 2] . DC distribution system has advantages such as higher efficiency and reliability, lower conversion stage, and uninterrupted power delivery compared to the conventional AC power distribution system [3 - 5] . Despite of these advantages, there are still some challenges with respect to the protection of system. Technology for breaking the arc is still a challenging issue and coordination of protection system using devices such as DC arc fault detector is also not well-established yet [6 - 7] .
Series arc faults in Low Voltage DC (LVDC) distribution system occur at unintended points of discontinuity within an electrical circuit as in Low Voltage AC (LVAC) distribution system. Recent studies have indicated that loose connectors or terminals due to vibration are the most common cause of the series arc fault [8 - 9] . From the electrical point of view, the series arc results in an increase of the equivalent resistance of the load [10] . It means that the series arc fault can be more dangerous because circuit breakers will not respond timely to such a low fault current. It, therefore, is needed to detect the series arc fault properly for protecting circuits from electrical fires.
To overcome this problem, various methods including utilization of shoulder characteristics have been developed and proposed in LVAC distribution system [11 - 13] . Unfortunately, there are no shoulder characteristics in LVDC distribution system so that we need to focus on only characteristics of arc fault current. Most methods which depend highly on the arc current signal have been investigated to detect the DC arc fault based on time domain signatures [11 , 14] . Also, some methods using signal processing schemes such as Discrete Fourier Transform (DFT) and Discrete Wavelet Transform (DWT) have been developed and employed to highlight the characteristics of fault current [15] . In [15] , a change of the current frequency spectrum is used as evaluation parameter by employing DFT. Likewise, in [16] , dc arc energy in different sub-bands is evaluated by using a wavelet packet based analysis. Although we can find advantages in forementioned methods, there are still some challenges such as distinction between situations of series arc fault and sudden load decrease and steady-state line switching. Most of researches conducted previously, however, haven’t solved this problem successfully but just focused on only detection of the series arc fault. To solve this problem, in this paper, we use Wavelet Singular Value Decomposition (WSVD), one of the signal processing methods, and state diagram to easily distinguish between various situations and to prevent the circuit breaker from nuisance trips. We also present pseudo code of MODELS, which is a symbolic language interpreter for the EMTP, of implemented models such as the series arc fault and WSVD for an educational purpose.
In this paper, we propose a novel scheme for detection of series arc fault in LVDC distribution system by employing WSVD, one of the signal processing methods based on time-frequency analysis, to highlight the current of arc fault characteristics. State diagram is also used to distinguish and represent transitions between various events. Fault detection and distinction from the steady-state events like load decreases or line switching is based on the analysis of Singular vale of Approximation (SA) and Sum of absolute value of Detail (SD) using WSVD. In Section 2, the series arc fault is discussed and the modeling of the series arc using ElectroMagnetic Transient Program (EMTP) is presented. In Section 3, we discuss the WSVD used in this paper. Then, scheme for detecting DC series arc fault using WSVD and design of fault detector using state diagram is proposed in Section 4 and 5, respectively. In Section 6, simulations are performed according to various arc fault cases and event sequences. Based on the simulation results, the performance of the proposed detection scheme for the series arc fault is evaluated using EMTP. Finally, then, conclusion is discussed.
2. Modeling of DC Series Arc Fault using EMTP
- 2.1 DC series Arc fault
It is well known that a series arc fault occurs when there is a discontinuity in the electrical path due to loosened connectors or terminals but the current continues to flow, as shown in Fig. 1 [8 - 9] . The arc produced across the galvanic discontinuity is a fault where electrical current is maintained through the formation of a high-temperature plasma arc which ionizes the dielectric medium [17] . From the electrical point of view, a series arc is considered as an additional resistance, that is series arc resistance, and it causes increase in equivalent circuit resistance which means decrease in current flowing through circuit. It is very hard to detect those faults because these faults may occur at arbitrary locations on a LVDC distribution system, especially load end, and very low values of series arc resistance produce only minimal changes to system current. Furthermore, the series arc has extremely random characteristic which is represented as very “spiky” profile in the current waveform.
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Circuit diagram for a series arc fault
- 2.2 Mathematical model of DC series Arc fault[18]
We, in this paper, utilize current data of series arc faults generated by simulation based method which can be tested extensively. It can be also more adaptable to various systems with few modifications by using the model.
Some researchers have been developed arc model from a hyperbolic approximation of the arc’s dynamic component of voltage and current. This arc model can be considered as a right model because the instantaneous current behavior of the arc model is consistent with experimental results and we can see this in [18] . For example, there is a consistent decrease in the gap current while the exact magnitude and position of the individual spikes appear to be random. Besides, modeling of the dc series arc is still challenging due to so many things which should be considered such as “three-dimensional, unsteady, highly nonlinear, with large gradients, requiring a wide range of time and spatial scales for its description” [19] . Under this circumstance, we should predict arc dynamics in practical situations and model used in this paper properly provide simplicity in implementation and is suitable for transient simulations.
Fig. 2 shows the equivalent series arc model based on the mathematical approximation model. As indicated in Fig. 2 , the series arc can be represented as two components, which are an electromotive force pulse, e gap , and a nonlinear resistor, R gap . Mathematical expressions for each component in Fig. 2 are as follows;
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Equivalent model for series arc
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where, e gap : electromotive force pulse
  • igap: current through gap
  • Rgap: series arc resistance
  • Vdc: average dc voltage before the fault
  • α: variable that controls the slope ofvq
  • q: variable representing arc random characteristic
  • a: magnitude ofegap
  • λ: slope ofegap
  • b: slope of EMP
  • xgap: gap distance to be separated
As we can see in Eq. (1) and (2), hyperbolic-tangent functions are used to approximate the arc model to experimental results. ‘ q ’ which is in range of 0 to 1 is an essential variable to represent the arc random characteristic. ‘Spiky’ characteristic of the arc can be applied to the model by varying the ‘ q ’, continuously. We can transform shape of arc into other different ones by properly varying variables such as α , a , and b . It allows us to conduct simulations under different situations, especially without experimental data.
- 2.3 Modeling of DC Series Arc Fault using EMTP
Based on the mathematical model, we perform the modeling of DC series arc fault using EMTP. The model is implemented by using EMTP/MODELS which is a symbolic language interpreter for the EMTP. A pseudo code of it, which can help understanding of series arc model’s operation, is also indicated in Fig. 3 . EMTP/MODELS is very useful when generating user-defined signals with specific logic. We consider two fault cases; ‘fixed gap distance fault’ which represents fault where the electrodes remain stationary after reaching a predetermined distance and ‘constant gap speed fault’ which represents conductors tearing longitudinally at a constant speed [18] . For each fault cases, variable q , representing arc random characteristic, is controlled differently according to the logic indicated in the pseudo code. In Fig. 3 , the random() is a function which returns a random value between 0 and 1.
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Pseudo code of series arc current control
Fig. 4 and 5 show the simulation results for implemented series arc model by comparing with those in [18] . Variables used in modeling are equal to those in [18] to verify the performance of the series arc fault modeling using EMTP. We present only system current waveform because system current signal can be used only due to arbitrary location of the series arc fault. In following sections, we will use only system current signal to detect the series arc fault. As we can see in Fig. 4 and 5 , simulation results of implemented model correspond well with those of reference [18] and it is clear that modeling for the series arc fault using EMTP/MODELS is effective and appropriate.
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Comparison results of the arc model with [18] for ‘fixed gap distance fault’
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Comparison results of the arc model with [18] for ‘constant gap speed fault’
3. Wavelet Singular Value Decomposition
- 3.1 Wavelet Transform (WT)
WT, one of signal processing methods, can extract time and frequency information at the same time from the original signal [19 - 22] . It can be applied for both analog domain and digital domain. Discrete Wavelet Transform (DFT), recently, has been used widely as most systems are digitized.
DWT of a signal is defined as:
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where ψ [ k ] is mother wavelet, a0m is a scale parameter, and n a 0 m b 0 is the time shift of ψ [ k ] [22] . The conducting process for DWT will be expanded to a concept of two kinds of filtering with a high order and a low order. DWT is a process in which an original signal is analyzed by a component of high-pass filters (detail) and a component of low-pass filters (approximation). Each filter has successive pairs and for each pair, the high-scale and low-frequency components are called as approximation coefficient ( a 1 ) while the low-scale and high-frequency components are called as detail coefficient ( d 1 ) [21] .
For DWT, it is important to select the mother wavelet because results from DWT depend on the mother wavelet. We select the mother wavelet as Daubechies 4 (db4) which is widely used for transient analysis in power systems. Level 1 DWT is used in this paper because it is good enough to detect the series arc fault and the higher level is, the more time and data takes.
- 3.2 Wavelet Singular Value Decomposition (WSVD)
In order to make the series arc fault current noticeable enough to detect easily, we use Wavelet Singular Value Decomposition (WSVD) which has advantage on data compression. The WSVD is a method which combines WT and SVD together [22 , 25] and it is generally used to encode images in signal processing area. Singular Value Decomposition (SVD) is utilized to extract special features in linear algebra. The WSVD can be used not only to analyze high frequency components through time-frequency transformation, but also to provide a solution of problems of complex linear algebra. In application of electrical system, it can highlight abnormal quantities in current or voltage by utilizing both characteristics.
The a 1 and d 1 , calculated through the decomposition and reconstruction process on the level 1 DWT with the signal x from a moving window of size n , are subject to SVD process. Singular value of Approximation (SA) is a singular value to be calculated by (8) using a 1 and Sum of the absolute value of Detail (SD) is calculated by (9) and (10) using d 1 . We utilize those values to detect the series arc fault.
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where i is the starting time of sampling of the moving window, and lf is the filter size according to the mother wavelet. In order to suppress the negative effect of the DWT filter caused by applying the moving window techniques, SD1 is calculated to remove the value at both ends of d1 during the calculation. In this paper, sizes of moving window and filter are 24 and 8, respectively.
To perform WSVD processing to the current signal during computer simulation, we model the WSVD using EMTP/MODELS and a pseudo code of it is presented in Fig. 6 .
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Pseudo code of WSVD process
4. Scheme for Detecting DC Series Arc Fault using WSVD
- 4.1 Characteristic analysis of SA and SD for series Arc and various events
As shown in Figs. 4 and 5 before, when the series arc fault occurs, the current drops slightly but rapidly and has very “spiky” profile which represent repetitive extinction and re-ignition of arc. The “spiky” profile clearly indicates high-frequency components in arc current and it can be one of the factors that can help to detect the series arc fault. We will check the high-frequency components by using SD.
For reliable system operation, nuisance trips with respect to non-fault situation should be avoided. To identify the series fault from the other various events such as sudden load decreases and steady-state line switching which will not lead to the trip of protection devices, characteristic analysis should be preceded. Fig. 7 shows the SA and SD for various events including the two series arc fault cases. As seen in Fig. 7 , when the events occur, the SDs which represent the high-frequency components are generated in all the events. The SDs for only two fault cases, however, have large values relatively and continue longer until arc extinction fully, while the SDs for other events have small value relatively and disappear within just a few cycle. It, therefore, can be concluded that the information of SD including magnitude and duration can be employed to distinguish the faults and the other events.
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Typical SA and SD waveforms according to various events
The SAs can be utilized to distinguish events such as sudden load decreases or steady-state line switching which shouldn’t result in any trip, even though those can’t be used to detect the faults. In other words, value of SAs for sudden load decrease and steady-state line switching can help to distinguish those events because SA drops in both events but their levels are clearly different. For example, when the line is opened during the steady-state, current flowing through a system is going to be zero. On the other hand, in case some loads are rejected or injected suddenly, the current would be decreased or increased but still exist in the circuit. This feature can be used to determine the steady-state events in this paper.
- 4.2 Fault Detector using SA and SD
The fault detector employed in this paper uses three factors to detect a fault and distinguish it and steady-state events. Value and criterion for each factor is indicated and explained in Table 1 . The F1 decided by SD rms is used to distinguish transient events like series arc faults and steady-state events like sudden load decrease or line switching. In addition, F2 and F3 determined by SA rms are also used to distinguish steady-state events mentioned above. The SD rms and SA rms , which are modified to get more efficient criterion, are calculated by equations as follows;
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where, Δt : timestep. The variables in Table 1 such as β , γ and δ are carefully set by considering multiple simulation results. We will present those variables in Section 6.
Value and criterion of three factors to detect fault
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Value and criterion of three factors to detect fault
Fig. 8 shows the block diagram of the proposed fault detector. To detect the series fault, we only use the information of system current, because fault location should be determined to utilize voltage information but it is impossible. As indicated in Fig. 8 , the WSVD process is applied to the system current to extract the SD, SA from the original signal. Then, signals used in the fault detector such as F1, F2 and F3 are generated by signal generator using the characteristics of SD and SA. Finally, the series arc fault is detected by fault detector. In this process, the fault can be distinguished from steady-state events by applying state-diagram. Inputs to the fault detector have logical value, that is 0 or 1, and combination of those inputs determines each event. We will discuss it in following section.
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Block diagram of the proposed fault detector
5. Design of Fault Detector using State Diagram
State diagrams are used to give an abstract description of the behavior of a system. This behavior is analyzed and represented in series of events that could occur in one or more possible states. Hereby, each diagram usually represents objects of a single class and tracks the different states of its objects through the system [26] . In this paper, state diagram is employed to represent various events including the series arc fault as various but finite states and to distinguish those events, effectively.
Fig. 9 shows signal transition of F1, F2 and F3 according to various system events. As discussed before, in Fig. 9(a) , when the fault occurs, the F1 and F2 become ‘1’ according to the criterions in Table 1 . Then, they returns to ‘zero’ after the fault clearing. Similarly, when the load decreases suddenly, F2 becomes 1 and gets back to ‘zero’ at normal state. If, however, the line switching occurs during the load rejection state, F2 and F3 become ‘zero’ and ‘1’, respectively. If a fault occurs during the load rejection state, F1 would be changed as ‘1’.
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Signal transitions according to various events
Fig. 10 shows the state diagram for all the events and their transitions in fault detector. It varies according to combination of the inputs based on criterions using SD and SA. As illustrated in Fig. 10 , if a state is determined as the series arc fault and it lasts for 0.2[s], protection devices such as fuse or circuit breaker for LVDC distribution system operate. If load keeps injected in load rejection state and it reaches some level that can change the F2 as ‘zero’, the state gets back to the normal state after time expired, 0.2[s]. Time with respect to time expired can be adjusted as shorter if the operator wants quicker protection operation.
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State diagram for the fault detector
6. Simulation
- 6.1 Simulation system
To verify the proposed series fault detection scheme, we model a simple LVDC distribution system as shown in Fig. 11 . Both AC/DC and DC/DC converters are utilized in this system. DC cable connecting the output of DC/DC converter to the load is 150[m] length. Simulations are performed by using EMTP [27 - 28] .
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LVDC simulation system model
The series arc fault is assumed to occur at the load end where very low voltage is applied because this kind of fault hardly happens at higher voltage level. We use the series arc model presented in Section 2. In Fig. 11 , load consists of R, L and value of those are 3.986[Ω] and 6.55[mH], respectively.
- 6.2 Simulation conditions
We divide simulation cases according to various fault types and event sequences. Although there must be lots of cases, only typical 6 cases are considered in this paper because those are enough to verify the performance of the proposed fault detector. As shown in Table 2 , two fault types are applied to verify the proposed scheme; ‘fixed gap distance fault’ and ‘constant gap speed fault’. Various event sequences are considered to evaluate the performance of the proposed scheme. First event and second event in Table 2 are assumed to occur at 0.7[s] and 5[s], respectively. Table 3 indicates the variables used for determining the criterion factors. The β can be set as a value below 2 because SD rms doesn’t exceed 2 for more than 3 cycles in steady-state events as we can see in Fig. 5 . In addition, we can conclude through the results of multiple cases indicated in Table 4 that SD rms in fault situations are above 0.8. The β , therefore, can be set as 0.5 considering some margin. Also, considering some margin, the γ and δ are set as 165 and 20 which mean abnormal level and dead line level of SA rms , respectively. The γ is highly dependent on load amount injected or rejected so that the setting of that can be changeable.
Simulation conditions
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Simulation conditions
Variables for determination of criterion factors
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Variables for determination of criterion factors
Minimum value ofSDrmsin 3 cycles according to various fault conditions
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Minimum value of SDrms in 3 cycles according to various fault conditions
In simulation of load rejection, amount of load rejected is half of the total load.
- 6.3 Simulation results
Fig. 12 and 13 show the load current and the transition of F1, F2, F3 and resulting state signal for all cases considered in this paper. We remove results before 0.3[s] because undesirable component due to initial stage of two converters is contained which can’t be steady-state. As we can see in Fig. 12(a) , (b) and Fig. 13(a) , (b) , it is clear that for both fault types, the proposed fault detector find out the series faults exactly. It causes tripping of the circuit breaker and the load current goes to zero. Once the faults occur, F1 and F2 turn to ‘1’ after a little which make the state of fault detector be the ‘series arc fault state ③’ through the ‘confirming series arc fault state ②’. The state changes to ‘trip state ⑧’ after 0.2[s] until the state remains at state ③. Speed of fault detection is quicker in case 1 than in case 2 because SA rms falls slowly in case 2 due to characteristic of the ‘constant gap speed’ fault. It makes duration of ‘confirming series arc fault state ②’ much longer. Based on the simulation results of case 1 and 2, we can conclude that the proposed scheme is effective for detecting the series arc faults.
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Simulation results for all cases considered - load current
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Simulation results for all cases considered – signal transition
As indicated in Table 1I, there is no fault situation in case 3 and 4. In case 3 and 4, we can see from Fig. 12(c) and 12(d) that there are two points to possibly misjudge events. However, the scheme proposed makes a decision that those are not fault so that there is no trip decision. In case 4 especially, the fault detector doesn’t judge this case as a fault although the load current goes to zero after the second event. With respect to the signal transition, the fault detector make the state be ‘load rejection state ⑤’ due to sudden decrease in SA rms after sudden load rejection is applied to the system. This state is completely distinguished from the series arc fault by using SD rms because it doesn’t last for more 3 cycles in load rejection event. As shown in Fig. 13(c) and (d) , in case 3, the state gets back to the normal state when the load is injected again, and if line switching occurs during load rejection state like case 4, fault detector properly operates to move the state to ‘line switching state ⑦’. Based on the simulation results of case 3 and 4, we can conclude that the proposed scheme is able to distinguish the steady-state events from the faults.
Case 5 and 6 indicate fault occurrence during the load rejection. As the results of case 3 and 4, state changes to ‘load rejection state ⑤’ after some load is suddenly rejected in the system. As we can see from the Fig. 13(e) and (f) , the proposed scheme can accurately detect the series arc fault even if the state is in load rejection. Fault detection speed is faster in case 5 than in case 6 like the results of case 1 and 2. Based on the simulation results of case 5 and 6, which are the case that both of a steady-state event and a fault occur consecutively, the proposed scheme can accurately distinguish the steady-state events from the faults.
Based on all the results considered, it can be concluded that the proposed scheme can distinguish steady-state events such as load variation and line switching from the series arc faults as well as detect those faults.
7. Conclusions
This paper proposes a novel scheme to detect the series arc faults and to distinguish those from steady-state events such as load variation and line switching. EMTP/MODELS is used to effectively implement the series arc fault model using mathematical approximation of characteristic of series arc according to type of fault. Pseudo codes of implemented models are also presented for an educational purpose. To extract time and frequency information at the same time from the fault current signal and highlight its ‘spiky’ characteristic, Wavelet Singular Value Decomposition (WSVD), which is one of the signal processing methods, is used in this paper. Based on the RMS value of Singular value of Approximation (SA) and Sum of the absolute value of Detail (SD), three criterion factors to detect the faults are determined. By using the combination of those factors and state diagram, we can design the proposed fault detector.
Various conditions according to the sequence of events including faults are considered and simulation results show that the proposed scheme can exactly detect the series faults and distinguish those from the steady-state events which may result in nuisance trips.
Acknowledgements
This work was supported by the Human Resources Development program (NO. 20131010501750) of the Korea Institute of Energy Technology Evaluation and Planning (KETEP) grant funded by the Korea government Ministry of Trade, Industry and Energy.
BIO
Yun-Sik Oh was born in Korea, 1987. At present, he is working on his Ph. D thesis at Sungkyunkwan University. His research interests include power system transients, protection and stability. He received his B.S and M.S degrees in School of Electrical and Computer Engineering from Sungkyunkwan University, Korea, 2011 and 2013.
Joon-Han was born in Korea, 1986. At present, he is working on his Ph. D thesis at Sungkyunkwan University. His research interests include power system transients, protection and stability. He received his B.S degree in School of Electrical Engineering from Soonchunhyang University, Korea, 2011 and M.S degree in College of Information and Communication Engineering from Sungkyunkwan University, Korea, 2013.
Gi-Hyeon Gwon was born in Korea, 1985. He received his B.S and M.S degrees in School of Electrical and Computer Engineering from Sungkyunkwan University, Korea, 2012 and 2014. At present, he is working on his Ph.D thesis at Sungkyunkwan University. His research interests include power system transients, protection and stability.
Doo-Ung Kim was born in Korea, 1986. He received B.S degree in School of Electrical and Computer Engineering from Sungkyunkwan University, 2012. At present, he is working on his MS course in Sungkyunkwan University. His research interests include power system transients, DC distribution system and electric vehicle.
Chul-Hwan Kim was born in Korea, 1961. In 1990 he joined Cheju National University, Cheju, Korea, as a fulltime Lecturer. He has been a visiting academic at the University of BATH, UK, in 1996, 1998, and 1999. Since March 1992, he has been a professor in the School of Electrical and Computer Engineering, Sungkyunkwan University, Korea. His research interests include power system protection, artificial intelligence application for protection and control, the modelling/protection of underground cable and EMTP software. He received his B.S and M.S degrees in Electrical Engineering from Sungkyunkwan University, Korea, 1982 and 1984, respectively. He received a Ph.D in Electrical Engineering from Sungkyunkwan University in 1990. Currently, he is a director of Center for Power IT (CPIT) in Sungkyunkwan University.
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