Fig. 6
shows the inductor current stress in the classical ZSI, ESL-Γ-ZSI and SL-ZSI. In
Fig. 6(a)
, it shows the inductor current stress of ESL-Γ-ZSI and SL-ZSI. The inductor current stress of ESL-Γ-ZSI is increased with the increasing of shoot-through duty ratio and the increasing of the number of inductors. Comparing
Fig. 4(b)
and
Fig. 6(a)
, the inductor current stress of ESL-Γ-ZSI is smaller than that of SL-ZSI, when the boost factor is equal to each other.
Table 2
shows the inductor current stress comparison between ESL-Γ-ZSI and SL-ZSI, when the boost factor is equal to each other.
Boost factor curves for ESL-Γ-ZSI under different n, SL-ZSI and the classical ZSI
Capacitor voltage stress for ESL-Γ-ZSI, SL-ZSI and the classical ZSI
Comparing
Fig. 4(a)
and
Fig. 6(b)
, the inductor current stress of ESL-Γ-ZSI is also smaller than that of the classical ZSI, when the boost factor is equal to each other.
Table 3
shows the inductor current stress comparison between ESL-Γ-ZSI and the classical ZSI, when the boost factor is also equal to each other.
Inductor current stress comparison between ESL-Γ-ZSI under different n, SL-ZSI, and the classical ZSI
Inductor current stress comparison between ESL-Γ-ZSI and SL ZSI
Inductor current stress comparison between ESL-Γ-ZSI and SL ZSI
Inductor current stress comparison between ESL-Γ--ZSI and the classical ZSI
Inductor current stress comparison between ESL-Γ--ZSI and the classical ZSI
- 3.2 Power loss analysis and comparison
In order to simplify analysis, we just consider the parasitic resistance of inductor, the parasitic resistance of capacitor, and the forward conduction loss of diode. The parasitic resistance of inductor, the parasitic resistance of capacitor, and forward conduction loss of diode are the same in ESL-Γ-ZSI and Cuk converter. The impact of the parasitic resistances and the forward voltage drop of diodes on the current is also ignored.
- 3.2.1 Nonshoot-through state power loss of ESL-Γ-ZSI
Fig. 7(a)
describes the equivalent circuit of ESL-Γ-ZSI under considering the power loss, and the power loss is
where
R_{r}
is the parasitic resistance of inductor;
r_{r }
is the parasitic resistance of capacitor;
V_{f}
is the forward voltage drop of diode.
- 3.2.2 Shoot- through state power loss of ESL-Γ-ZSI
In this mode, the equivalent circuit of ESL-Γ-ZSI is described in
Fig. 7(b)
, and the power loss is
So, the power loss of ESL-Γ-ZSI under the step- up mode is
When the ESL-Γ-ZSI works in step- down mode, the equivalent circuit of ESL-Γ-ZSI, in steady state, is described in
Fig. 8
. And the power loss is
Assuming
V_{f}
is far less than
V_{dc}, R_{r }
is far less than
R_{l}
, and n is a small constant, (18) can be simplified as follows
Operating states for ESL-Γ-ZSI under step-up state and considering power loss
Operating states for ESL-Γ-ZSI under step-down state and considering power loss
- 3.2.3 Power loss analysis for cuk converter
Cuk converter has two working modes and the boost factor is D′/(1-D′)
[25]
. In the first working mode as shown in
Fig. 9(a)
, ignoring the loss of switching device, the power loss is
where D′ is the duty ratio of switching device in Cuk converter.
In the second working mode as shown in
Fig. 9(b)
, the power loss is
In Cuk converter,
The equivalent circuit for Cuk converter
So, the power loss of Cuk converter is obtained from (20)~ (23).
- 3.2.4 Power loss comparison
Fig. 10
shows the power loss curves for Cuk converter and ESL-Γ-ZSI.
In
Fig. 10
, we can see the power loss of ESL-Γ-ZSI is increased with the increasing number of inductors and diode and the increasing of shoot- through duty ratio. In addition, the boost factor is also increasing with the increasing number of inductor and diode and the increasing of shoot- through duty ratio. So, in order to contain a better cost performance, we should consider the boost factor and power loss at the same time.
In step- up mode and under the same boost factor, we can know, from Fig. 10, the power loss of Rr in ESL-Γ-ZSI is lower than that of Cuk converter, the power loss of rr in ESL-Γ-ZSI is also lower than that of Cuk converter. However, the power loss of diode in ESL-Γ-ZSI is larger than that of Cuk converter.
When the working mode is step- down as shown in
Fig. 10
, the power loss of
R_{r}
in ESL-Γ-ZSI is larger than that of Cuk converter and the power loss of diode in ESL-Γ-ZSI is also larger than that of Cuk converter. But power loss of
r_{r}
in Cuk converter is larger than that in ESL-Γ-ZSI.
- 3.3 Inrush current and voltage overshoot analysis
The Z-source impedance network is the energy storage and filtering element for the ZSI. The purpose of the inductors is to limit the current ripples through the devices during boost mode with the shoot-through state. Moreover, the purpose of the capacitors is to absorb the current ripples and maintain a constant voltage to keep the ac output voltage sinusoidal.
Power loss comparison between ESL-Γ-ZSI and Cuk converter
Power loss comparison between ESL-Γ-ZSI and Cuk converter.
In the classical Z-source impedance network and SL Zsource impedance network, there are two capacitors which cause the problem of inrush current and voltage overshoot at startup. Startup equivalent circuit for the classical ZSI and SL-ZSI is shown in
Fig. 11
. The initial voltage across the Z-source capacitors is zero, huge inrush current flows to the diode
D_{0}
, and the Z-source capacitors are immediately charged to
V_{dc}/2
. Then, the Z-source inductors and capacitors resonate, generating the current and voltage spikes. This phenomenon will result in a large harmonic content and voltage overshoot in the dc link voltage and output ac voltage, increase voltage ratings of all the components, and result in long transition process, as shown in
Figs. 12
and
Fig. 13
.
Simulation results using maximum boost control for SL-ZSI under M = 0.8 and D=0.2.
Simulation results using maximum boost control for the classical ZSI under M = 0.8 and D=0.2.
In addition, the peak dc-link voltage will change when there is a step change in the input voltage or undesired interference though
V_{c}
keeps constant. This phenomenon will also result in the output voltage overshoot.
In ESL-Γ-Z-source impedance network, there is no loop for inrush current at startup as shown in
Fig. 2
, and the proposed topology provides inrush current suppression and improves the transition process. But there is still inrush current in ESL-Γ-ZSI, and the analysis is as follows.
At startup, the initial voltage across the Z-source capacitor is zero, and
C_{0}
is charged by
V_{dc}
through
L_{0}
. When the Z-source capacitor is charged to near Vdc and the shoot-through state is coming, the resonance of the ESL-Γ- Z-source inductors and capacitor is happening, and the inrush current in the proposed ESL-Γ-ZSI is appeared. This problem can be improved by adopting soft start method which is not discussed in this paper. But, the inrush current of the proposed ESL-Γ-ZSI is lower than that of SL-ZSI and the classical ZSI, the problem of voltage overshoot is improved, and the transition process is shortened.
However, if the ESL-Γ-Z-source impedance network works in DCM mode, the dc link voltage is increasing infinitely, the output voltage will be uncontrollable and the system is unstable. In order to avoid the problem causing by the DCM mode, a snubber circuit is introduced as shown in
Fig. 14
.
A group of capacitor and resistance combination, which capacitor
C_{s}
and resistance
R_{s}
are in series, is right across PN of the inverter bridge. In
Fig. 14
, if the current to the inverter is in DCM mode, the snubber circuit provides an absorbing path for the inductor current. In addition, the snubber circuit can absorb a part of high frequency inductor current in normal operation and a part of inrush current at startup. Moreover, if the dc link voltage which is disturbed by other undesired interference has a step change, the snubber circuit provides an extra absorbing path for the extra current, and helps to reduce the overshoot voltage across the device.
Fig. 15
shows the simulation results for ESL-Γ-ZSI under n=2, M=0.7 and D=0.3.
Snubber circuit for ESL-Γ-ZSI
Simulation results for ESL-Γ-ZSI under n=2, M=0.7 and D=0.3.
4. Simulation and Experimental Results
To verify the aforementioned theoretical results, two simulation examples and two experimental examples for ESL-Γ-ZSI are given. Matlab/Simulink is used to realize the simulation, and a prototype has been constructed with IPM (Intelligent Power Module) devices and dsPIC6010A as main controller. In the simulation and experiment, maximum boost control method is adopted
[8]
, and the system parameters are shown in
Table 4
.
System parameters
- 4.1 Simulation result I
This example is the voltage inversion from dc 48 V to ac 37.3Vrms and n=2.
Assuming D=0.2 and M=0.8, B=2.75 and (25) can be concluded
(25) is the phase peak voltage, which implies that the line-to-line voltage is 64.7Vrms or 91.4 V peak.
Fig. 16
shows the simulation results.
- 4.2 Simulation result II
This example is the voltage inversion from dc 48 V to ac 39Vrms and n=2. Assuming D=0.3 and M=0.7, B=3.29 and (26) can be concluded.
(26) is the phase peak voltage, which implies that the line-to-line voltage is 67.7Vrms or 95.7V peak.
Fig. 17
shows the simulation results.
From
Figs. 16
and
Fig. 17
, we can see that, in the steady state, capacitor voltages are boosted to 96V; the output ac voltages are 91.4V peak and 95.7V peak, respectively; the output ac currents are 5.28A peak and 5.53A peak, respectively; the average currents of L
_{0}
are close to zero; the inductor currents of SL cells are near 13A and 16A, respectively; the DC link voltages are near 130V and 160V, respectively.
Simulation results under n=2, D=0.2 and M=0.8
Simulation results under n=2, D=0.3 and M=0.7
There is inrush current which is appeared at startup and the inrush current is caused by the resonance of the ESL-Γ- Z-source inductors and capacitor. This phenomenon causes the voltage overshoot in capacitor voltage, dc link voltage, and output ac voltage. As shown in
Figs. 16
and
Fig. 17
, the capacitor voltages are immediately charged from 0V to 145V and 160V, respectively; the currents of L
_{0}
are decreased from 0A to -9A and -10A, respectively; the inductor currents of SL cells are increased from 0A to 20A and 24A, respectively; the DC link voltages are increased from 0V to 200V and 250V, respectively. However, the inrush current and the voltage overshoot are not very large, the response speed of system is very fast, and the transient process is less than 10ms.
- 4.3 Experimental result I
This example is the voltage inversion from dc 48 V to ac 44.1Vrms and n=4.
Assuming
D
= 0.2 and
M
= 0.8,
B
= 3.25 and (27) can be concluded.
Experimental results I.
Experimental results II.
(27) is the phase peak voltage, which implies that the line-to-line voltage is 76.4Vrms or 108 V peak as shown in
Fig. 18
.
- 4.4 Experimental result II
This example is the voltage inversion from dc 48 V to ac 49.2Vrms and n=4.
Assuming D=0.3 and M=0.7, B=4.14 and (28) can be concluded.
(28) is the phase peak voltage, which implies that the line-to-line voltage is 85.2Vrms or 120.5 V peak as shown in
Fig. 19
.
From
Figs. 18
and
Fig. 19
, it can be seen that, in the steady state, capacitor voltages are boosted to 96V; the output ac voltages are 108V peak and 120.5V peak, respectively; the output ac currents are 6.24A peak and 6.96A peak, respectively; the average currents of L
_{0}
are close to zero; the inductor currents of SL cells are near 16A and 20A, respectively; the DC link voltages are near 160V and 200V, respectively.
All the simulation and experimental results are quite consistent with the theoretical analysis results. The operating characteristic of ESL-Γ-ZSI is therefore validated.
5. Conclusion
This paper has presented a novel ESL-Γ-ZSI by improving the existing traditional Z-source impedance network. The proposed inverter employs a unique Γ shape Z source network and extended SL network to couple the low dc voltage energy source to the main circuit of the inverter. In ESL-Γ-ZSI, the capacitor voltage stress is a constant 2V
_{dc}
avoiding the disadvantage that capacitor voltage stress is increased with the increase of shootthrough duty ratio in the classical Z source inverter and SL-ZSI.
ESL-Γ-ZSI provides an extended SL network in front of the inverter bridge, so there is no inrush current flowing to the main circuit at startup. The inverter can increase the boost factor through adjusting shoot-through duty ratio and increasing the number of inductors. The inductor current stress of ESL-Γ-ZSI is smaller than that of SL-ZSI and the classical ZSI, when the boost factor is equal to each other.
Both the simulation and experimental results demonstrate its advantages. Therefore, the proposed inverter could be widely used in the engineering applications using impedance-type power inverters.
Acknowledgements
This work was supported by Universities Science and Technology Fund Planning Project of Tianjin (20130419)
BIO
Lei Pan He is a lecturer of Tianjin Chengjian University and is currently pursuing the Ph.D. degree at HeBei University of Technology, Tianjin. His research interests are power converters and motor drives.
Hexu Sun He received the Ph.D. degrees from Northeastern University, Liaoning, China, in 1993. He is currently a Professor of HeBei University of Technology and an IEEE Senior Member. His research interests include power electronics for utility applications, electric motors, distributed power generation and the control for engineering system.
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