This paper describes a novel structure for single phase Unified Power Quality ConditionerDistributed Generation (UPQCDG) with direct grid connected DCAC converter for low DC output DG systems which can be used not only for compensation of power quality problems but also for supplying of load power partly. This converter has been composed of one fullbridge inverter, one three winding high frequency transformer with galvanic isolation and two cycloconverters. Proper control based on Input Output feedback Linearization is used to tracking the reference signals. The simulation and experimental results are presented to confirm the validity of the proposed approach.
1. Introduction
Nowadays, most of the equipments based on power electronic devices used by the industry, lead to power quality problems. These devices not only need highquality energy to work properly but also are the major cause for decreasing of power quality. In these conditions, both electric utilities and customers are increasingly affected from the quality of electric power. Between the different technical approaches available for compensation of power quality problems, Active Power Filters (APFs) have an important alternative to compensate the power quality problems
[1]
.
Different configurations of APFs can be found in
[2]
and
[3]
. One of the comprehensive systems for many of power quality problems, such as current harmonics, reactive power, and source voltage distortions, is Unified Power Quality Conditioner (UPQC)
[4]
. It consists of two back to back connected series and shunt Voltage Source Inverters (VSIs) with a common dc link
[5

9]
. In all of the previous contributions of series and shunt inverters DC link capacitor is a major part of compensator. Custom power devices such as UPQC by a DC link capacitor need to an external control circuit for arranging up the DC capacitor stored energy. Although limit stored energy in DC capacitor causes inability of deep voltage sags and interruptions
[10]
.
In the last decade, Distributed Generation systems (DGs) which use Clean Energy Sources (CESs) such as wind power
[10]
, fuel cells
[11]
and photo voltaic are integrated at distribution level increasingly and will have major role in future sustainable energy systems
[4]
. Also they can be as an active power source which affects in stability, voltage regulation and Power Quality (PQ) issues of the network. With the advancement in power electronics, the custom power devices with DG systems can now be actively controlled to enhance the system operation for improving PQ at Point of common Coupling (PCC)
[12]
.
In this area converters not only are considered as an essential part of custom power devices such as UPQC but also have a key role in connecting of different types of DGs to the grid. So, further studying and developing of them can be an essential problem.
A high frequency link direct boost DCAC converter accompanied by a dc link capacitor has been proposed in
[13]
. Existence of DC link capacitor in this converter can lead to increase in circuit degree and difficulty in dynamic analysis. In some of related schemes, converters with a galvanic isolation high frequency link can be used for elimination of the DC link capacitor and big volume power transformer
[14
,
15]
.
The previous configurations of UPQC, based on limit DC link capacitor energy storage are unable to compensation of deep and long voltage sags, and interruptions
[10]
. This problem could be solved by using of DG as an active source in DC side of custom power devices such as UPQC. In
[4]
a series of photovoltaic arrays as a DC DG, have been connected to the DC side of UPQC via a boost DCDC converter. In
[10]
a wind turbine as an AC DG has been connected to the DC side of UPQC via a DCAC converter. Also because of variable nature of wind a battery has been connected directly to the DC side of UPQC. The battery is used in low power generation condition by the wind turbine. In
[16]
a small AC generator has been connected to the DC side of UPQC via a rectifier which could be as an active power source for load supply and compensation of voltage interruptions. In
[17]
a single phase combination of photovoltaic systems with UPQC for power quality compensation has been investigated too.
The proposed direct DCAC converter configuration (UPQCDG)
This paper proposes a novel configuration for the UPQCDG which is composed from a direct DCAC converter and a high frequency link. In the proposed configuration a DG system with low voltage DC output has been connected to the DC side of the UPQC. The proposed configuration has been composed of one fullbridge inverter, one three winding High Frequency Transformer (HFT) and two cycloconverters. One of the cycloconverters acts as a series APF and the other one act as a shunt APF which are connected to the grid directly. High frequency transformer not only steps up voltage of the primary side and reduce converters volume but also provide an electrical isolation between input DG and main grid. Also elimination of DC link capacitor not only can reduce related losses and increase conversion efficiency but also can reduce circuit degree and simple the dynamic analysis of it. State space equations of the proposed configuration is presented for dynamic analysis of the proposed configuration and providing proper control based on phase shift with nonlinear control. According to the nonlinear inherent of the proposed system, designing of the proposed configuration controller is based on the InputOutput feedback Linearization (IOFL)
[18

20]
. The operation of the proposed system is analyzed through simulations with power system computeraided design/electromagnetic transient dc analysis program (PSCAD/EMTDC). The experimental results of a 220V50Hz prototype are provided to validate the theoretical analysis.
2. Proposed UPQC Configuration
As shown in
Fig. 1
, in the proposed configuration UPQC has been composed of two cycloconverters which act as series and shunt APFs and have been connected back to back to a fullbridge inverter via a HFT. Each cycloconverters has been composed of eight bidirectional switches. The shunt cycloconverter can compensate load current harmonics and reactive power but the series cycloconverter can compensate voltage problems. Series cycloconverter is connected to the grid via a second order low pass LC filter. The proposed configuration not only can supply a part of load power but also can compensate power quality problems. For avoiding of saturation of transformer, the input DC port (DCAC inverter) works with a duty cycle equal to 50%. For avoiding of short circuit, there is a dead time between switches
S
_{1}
,
S
_{2}
and
S
_{3}
,
S
_{4}
and similarly between switches
S
_{5}
,
S
_{6}
and
S
7
,
S
_{8}
. Also there is an overlapping time between switches of each cycloconverter considering the continuity of inductive current. In the proposed converter which DC voltage is directly converted to an AC one, the electric isolation between input and output ports is implemented by a HFT which steps up the input voltage and, reduces the size and volume of the converter.
3. Switching Modes of the Proposed Configuration
Fig. 2
, shows the simulation results of the main switching waveforms for a specific operating point. The switching period is
T
_{s}
=1/
f
_{s}
which
f
_{s}
is the switching frequency. As shown in
fig. 2
, there are 12 modes in the proposed converter, but the modes related to dead and overlapping times can be ignored to simplify the circuit modeling. The simplified switching modes have been listed in
Table 1.
The primary voltage of high frequency isolation transformer is a bipolar square wave AC voltage with high frequency and duty cycle equal to 50%. Secondary voltage of transformer is
ν
_{s}
=
nν
_{p}
. Where,
n
is the transformer ratio. Also
ν
_{p}
and
ν
_{s}
are the primary and secondary voltages of the transformer respectively. By the phase shift of
φ
_{1}
and
φ
_{2}
of series and shunt cycloconverters switches (respect to the primary side fullbridge switches), the output voltage/current of each cycloconverter can track the related reference signals.
Switching modes for the proposed UPQC
As shown in
Fig. 2
, existence of a DC DG source in the primary side of the high frequency transformer causes a positive or negative bias in the primary side current of the transformer. This problem can be viewed based on the Kirchhoff Voltage Law on the primary side of the transformer in a special operating point as Eq. (1).
Time intervals and switches states
Time intervals and switches states
4. Reference Signals of the Proposed UPQC
The proposed UPQC consists of two shunt and series APFs which each of controllers should have their reference outputs. Their reference signals are calculated as follows.
 4.1. Reference signals of the series APF
In this paper the source voltage has been assumed to be pure sinusoidal (it has first order component only) with sag and swell. In this control approach, series APF compensates voltage sag and swell. So, the series APF arranges the load voltage at a predetermined constant voltage level. As Eqs. (2) and (3), first order components of the source voltage (
ν
_{r1}
(
t
),
ν
_{i1}
(
t
) ), which are extracted from Fourier transform, are normalized to the nominal magnitude (
V
_{nom }
) and set as desired load voltage (
ν
_{lref}
(
t
) )
[21]
. So the reference voltage of the series APF is determined as Eq. (4).
Where,
ν
_{s}
is the source voltage and
ν
_{ser}
(
t
) , is the series active filter reference voltage. Also
V
_{r1}
and
V
_{i1}
are magnitudes of the first order active and reactive components of the source voltage respectively.
Fig. 3
, shows block diagram of the series active filter reference signal extraction circuit.
In
Fig. 3
, active and reactive components of the source voltage (
ν
_{s}
), have been determined from Fourier transform (the first order component detector block). In this figure, PLL block is used for detection of the angular frequency.
 4.2. Reference signals of parallel APF
As mentioned before, load side current high degree harmonics and load reactive power can be compensated by the shunt cycloconverter in the source side. Based on single phase pq theory
[22]
active and reactive components of the source side current can be determined as Eq. (5). As mentioned, the source voltage is pure sinusoidal with sag and swell. For that, first order component of the source voltage has been used in Eq. (5).
Block diagram of the series active filter reference signal extraction
Block diagram of the parallel active filter reference signal extraction
Where,
p
_{s}
(
t
) and
q
_{s}
(
t
) are the source side active and reactive powers. Also
i
_{sr}
(t)
and
i
_{si}
(t)
are active and reactive components of the source side current respectively. For reactive power compensation of the source side, in Eq. (6),
q
_{s}
(t)
has been set to zero. Also for supplying
k
percent of the main component of the load active power by the PAF, related active power (
P
_{l}
(t)
) in Eq. (6) has been set to (1
k
)
P
_{l}
(t)
. Where,
P
_{l}
(t)
is determined as Eq. (7). Because
P
_{l}
(t)
is the main component of the load active power, first order component of the load current has been used in Eq. (7). So the reference currents of the source and PAF can be determined as Eqs. (8) and (9) respectively.
Fig. 4
, shows block diagram of the parallel active filter reference signal extraction circuit which has been designed based on Eqs. (69).
5. Dynamic and State Space Analysis of the Proposed Configuration
For control of the proposed configuration and tracking of the reference signals of the series and shunt cycloconverters, statespace averaging method has been used in this paper
[18

20]
, and the related equations have been obtained, as follows:
Where,
X
, is the state space variable vector, and
U
, is the input vector, which are defined as follows:
Where,
i
_{se}
,
i
_{sh,}
ν
_{se}
, and
ν
_{l}
are the series APF current, shunt APF current, series APF voltage, and the load voltage respectively. So, state space equation of the proposed converter can be as Eq. (12).
Equivalent circuits of six related modes of
Table 1
, have been shown in
Fig. 5
. As mentioned before the primary voltage of the high frequency isolation transformer is a bipolar square wave AC voltage with high frequency and duty cycle equal to 50%. Mode I, II and III show equivalent circuit for its positive half period and mode IV, V and VI show equivalent circuit for its negative half period. Where,
R_{1}
is the series capacitor snubber resistance. In
Fig. 5
, load has been modeled by
R
_{2}
. States of switches in
Table 1
, determine polarity of
v_{se}
and
v_{l}
in the mentioned modes. State equation for each mode of
Fig. 5
, can be determined as
Table 2
.
The IOFL method uses average of
A
_{i}
and
B
_{i}
matrixes of
Table 2
(
i
=16) as follows.
Equivalent circuits of related modes
State space equation for each mode
State space equation for each mode
And ,
So A is:
And B is:
 5.1 Nonlinear control of the proposed UPQC based on IOFL method
The purpose of the proposed controller is the regulation of the output signals of series and shunt cycloconverters to the desired values by controlling the phase shifts of
φ
_{1}
and
φ
_{2}
. By reordering the Eq. (12), the state space equation can be rewritten as follows:
Where,
d
is disturbance vector,
x
is statespace vector,
u
is new input vector,
f(x)
is smooth vector field,
g(x)
is smooth vector field for input u and
p(x)
is smooth vector field related to the disturbance d
[19]
.
State space and input vectors are as:
So state space equation can be written as:
Where functions of
f(x)
,
g(x)
,
p(x)
and d are as:
By changing equilibrium point to
x
*, where
f
(
x
)
_{x*}
= 0
[19]
, the nonlinear system is defined, as follows:
In IOFL method, the outputs are differentiated until appearance of inputs which the number of derivatives required for each output (
r
_{j}
) is called the relative degree of
j
th output and total degree of the system is the sum of all outputs relative degrees
[19]
. In the proposed system, degree of the first output (
x_{2}
=
i_{sh}
) is one but degree of the second output (
x_{3}
=
v
_{se}
) is two then total degrees is equal to 3. In the proposed system, differentiated equations can be written based on
Z
. Which
Z
, is a helping parameter vector as:
The statespace equations in the new coordinate can be defined at the systems equilibrium point as Eq. (26):
This equation will be used to define the control law. To ensure that
z
_{1}
and
z
_{2}
are adjusted respectively to the desired reference values of
Y
_{r1}
=
i_{shr}
and
Y
_{r2}
=
ν
_{ser}
, the stabilizing controller is designed by using poleplacement linear control strategy. The new control inputs are expressed by Eqs. (27) and (28):
Overal block diagram of power and control system
State space model of the proposed system
By substituting 𝑥=𝑥−𝑥*, Eq. (28) can be written as:
Based on Eq. (29),
φ
_{1}
and
φ
_{2}
are determined as Eq. (30):
Where,
ν_{1}
and
ν_{2}
(the control laws) are determined as Eq. (31) too.
A stable system will be access with negative values of
k
_{ij}
.
Fig. 6
shows overall block diagram of the power and control system and
Fig. 7
, shows state space model of the proposed system. As shown in
Fig. 7
, the phase shifts of
φ
_{1}
and
φ
_{2}
can be controlled in a way for accessing the reference output signals of the series and shunt cycloconverters by using IOFL based control system.
V
_{ser}
and
i
_{shr}
stands for reference signals of series and shunt cycloconverters respectively but
v
_{se}
and
i
_{sh}
stands for real amount of them respectively.
6. Stability Analysis
Based on Eq. (29), state space equation of the control signals can be written as:
For stability analysis eigenvalues of the coefficient matrix in Eq. (32) should be in left side of
j𝜔
axes. Eigenvalues can be found from Eq. (33).
Based on routhhurwitz theory for stability condition, Eq. (34) should be satisfied. So permissible area for
k
_{ij}
can be found.
For stability condition, amounts of
k
_{ij}
should satisfy related terms of Eq. (34).
7. Simulation Results
For investigation of validity of the proposed control strategy in power quality compensation of a distribution system, the parameters of the converter given in
Table 3
, have been used in simulations and building the prototype.
Threeport converter parameters
Threeport converter parameters
The UPQC input port uses a 40V DC source, to model a DC DG. The AC grid voltage is 220V, 50Hz. In this simulation an RC load with nominal power of 25 VA has been selected as a consumer. Also for investigation of the proposed converter capability in load change condition, amount of the load has been reduced in time 2sec. The proposed UPQC has been simulated to investigating of its responsibility in load current harmonics reactive power and voltage sag/swell compensation too. The simulation of operating conditions has been carried out for 2.4 seconds to study of the proposed converter.
Fig. 8
, shows simulation results of the source voltage, SAF voltage, and load voltage too. As shown in
Fig. 8
, source voltage sag and swell have been compensated by the proposed configuration.
Fig. 9
, shows simulation results of the load current, PAF current and source current too. In this figure parameter of
i
_{sh}
(
i_{f}
) is related to the parallel active filter current. As shown in
Fig. 9
,load current harmonics have been compensated by the proposed UPQCDG. Also
Fig. 10
, shows simulation results of the source, load, SAF and PAF active and reactive powers. In this figure,
p
_{sh}
(
p_{f}
) is related to active power of shunt active filter. In this simulation, value of
k
has been set to 55 percent. As shown in
Figs. 8
,
9
, and
10
the operating conditions can be divided to following six stages.
Stage one
(0≤t<0.4sec):
The source voltage is normal with magnitude of 310V.
The SAF of UPQCDG voltage is 0V. This is for that there is no sag or swell.
The active power of the load (
P
_{l}
=23W) is feed from the source (
P
_{s}
=10W) and PAF of UPQCDG (
P
_{sh}
=13W).
The load injects reactive power to the grid (
Q
_{l}
=8Var) and UPQC absorbs all of this reactive power (
Q
_{sh}
=8Var). Then the reactive power of the source is about 0VAR.
Simulation result of the source voltage, SAF voltage and load voltage
Simulation result of the load current, PAF current and source current
Stage two
(0.4≤t≤0.8sec):
The source voltage has sag with magnitude of 70 V.
The SAF of UPQCDG voltage is about 70 V. This is for compensation of voltage sag. Then the load voltage has been normal with magnitude of 310V.
The active power of the load (
P
_{l}
=23W) is feed from the source (
P
_{s}
=10W), PAF of UPQC (
P
_{sh}
=10W) and SAF of UPQC (
P
_{se}
=3W).
Like stage one, load injects reactive power to the grid (
Q
_{l}
=8Var) and UPQC absorbs all of this reactive power (
Q
_{sh}
=8Var). Then the reactive power of the source is about 0 VAR.
Stage three
(0.8≤t≤1.2sec): This stage is like stage one.
Stage four
(1.2 ≤t<1.6sec):
The source voltage has swell with magnitude of 30 V.
The SAF of UPQC compensates voltage swell. Then the load voltage is normal with magnitude of 310V.
The active power of the load (
P
_{l}
=23W) is feed from the source (
P
_{s}
=10W), PAF of UPQC (
P
_{sh}
=14W) and SAF of UPQC (
P
_{se}
=1W). SAF of UPQC absorbs 1W in this condition.
Like stage one, load injects reactive power to the grid (
Q
_{l}
=8Var) and UPQC absorbs all of this reactive power (
Q
_{sh}
=8Var). Then the reactive power of the source is about 0 VAR.
Simulation results of load, source, SAF and PAF active and reactive powers
Simulation of sag compensation
Simulation of swell compensation
Stage five
(1.6≤t≤2sec): This stage is like stage one.
Stage six
(2≤t≤2.4sec):
The source voltage is normal with magnitude of 310 V.
The SAF of UPQC voltage is 0 V. This is for that there is no sag or swell.
The active power of the load (
P
_{l}
) decrease to 10W which is feed from the source (
P
_{s}
=4.5W) and UPQC (
P
_{sh}
=5.5W).
The load injects 3VAR reactive power to the grid and UPQC absorbs that. Then the reactive power of the source is about 0 VAR.
As mentioned earlier voltage sag (70 V), has been carried between 0.4sec and 0.8sec.
Fig. 11
shows the simulation results of SAF between 0.3sec and 0.9sec. This is for investigation of capability of the proposed configuration in sag compensation clearly. As shown in
Fig. 11
, UPQC is compensates the voltage sag so the load voltage is normal with magnitude of 310 V.
Also as mentioned before a voltage swell (30V), has been carried between 1.2sec and 1.6sec.
Fig. 12
shows the simulation results of SAF between 1.1sec and 1.7sec clearly. This is for investigation of capability of the proposed configuration in swell compensation. As shown in
Fig. 12
, UPQC compensates the voltage swell so the load voltage is normal with magnitude of 310 V.
Simulation results of compensator current (i_{sh}), source current (i_{s}), and load current (i_{l})
Simulation results of the source current and voltage
In
Fig. 13
the simulation results of the shunt part of the proposed UPQC for a few cycles has been shown clearly. The proposed UPQC has compensated the harmonics of the load current. In Figs. (
8
,
11
) and (
12
) parameter of
ν
_{se}
(
ν_{f}
) is related to the series active filter voltage. Also, in Figs. (
9
) and (
13
) parameter of
i
_{sh}
(
i_{f}
) is related to the shunt active filter current.
Fig. 14
represents simulation results of the source current and voltage simultaneously. Source current is sinusoidal with no phase difference with the voltage. As the other word UPQC has compensated the load reactive power.
8. Experimental results
A prototype has been built in order to test the performance of the proposed UPQC and its control strategy. The controllers have been derived by a DSP 320F28335. The UPQC and load have been connected to the grid at the point of the common coupling (PCC). The MOSFETs are IRFP560 and the switching frequency is 15.8 kHz.
Experimental results of source voltage (ν_{s}), load voltage (ν_{l}) and compensator voltage (ν_{se})
Experimental results of load current (i_{l}), compensator current (i_{sh}), and source current (i_{s})
Fig. 15
, shows the experimental results of SAF for a few cycles. In this figure, there is a voltage sag (70 V) in grid side (
ν
_{s}
), then series part of UPQC compensates sag (
ν
_{se}
) and the load voltage is normal with magnitude of 310 V (
v_{l}
). In
Fig. 16
, the experimental results of the shunt part of the proposed UPQC have been shown. The load current (
i_{l}
) has harmonics and UPQC compensates the harmonics as well as reactive power. As shown in
Fig 16
experimental results are satisfactory. Also
Fig. 17
shows experimental results of the source, SAF and PAF active powers experimental that has good agreement with
Fig. 10
. Fig. 18
shows results of the source, load, SAF and PAF reactive powers that has good agreement with
Fig. 10
. The control board generates output current and voltage, as well as the PWMswitching orders.
Fig. 19
shows the electronic circuit of the control board and PWMswitching orders. The circuit is divided into different blocks. The CSN151 100 current sensors have been used to measure the output currents of the converters, while the LEM LV25P voltage sensors have been used to measure the output voltage of load, SAF and source. Several TL084s have been used as operational amplifiers. The PWM switching orders have been generated by means of DSP 320F28335. TLP250 optocouplers have been used to enhance the produced voltage of DSP 320F28335.
Experimental results of active powers
Experimental results of reactive powers
9. Conclusions
A novel configuration of UPQCDG for low DC output DGs has been proposed which could be used in power quality compensation of distribution networks with presence of nonlinear loads. The proposed configuration has been composed of one fullbridge inverter, one three winding high frequency transformer and two cycloconverters. One of the cycloconverters has been as a series APF and the other one as a shunt APF connected to the grid directly. In the proposed configuration a DC capacitor has been omitted and an energy source has been provided by DGs. Proposed configuration not only could compensate power quality problems but also could supply a part of load power.
The electrical isolation between input and output ports has been provided with high frequency transformer, then the size and volume of the converter has been reduced. State space equations of the proposed configuration have been used for dynamic analysis and providing a control based on phase shift with nonlinear control. The results validate the good performance of the proposed configuration in compensation of power quality problems and as the same time supplying the load power partly.
Electronic circuit of control board
Acknowledgements
This research has been supported by Electrical Engineering Department, Research and Science Branch, Islamic Azad University, Tehran, Iran.
BIO
Ahad Mokhtarpour was born in Tabriz, Iran, 1979. He received the B.S. and M. S. E. degrees in Electrical Engineering in 2003 and 2005 from Iran University of Science and Technology, Tehran, Iran. Currently he is a Ph.D. student in Islmic Azad University, Science and Research Branch, Tehran, Iran. His research interests are in the power quality compensation, distribution network control, automation and reliability.
Heidar Ali Shayanfar was born in Zabol, Iran, 1951. He received the B.S. and M.S.E. degrees in Electrical Engineering in 1973 and 1979 and the Ph.D. degree in Electrical Engineering from Michigan State University, U.S. A., in 1981. Currently, he is a full professor in Electrical Engineering Department of Iran University of Science & Technology University, Tehran, Iran. His research interests are in the application of artificial intelligence to power system control design, dynamic load modeling, power system observability studies and voltage collapse. He is a member of Iranian Association of Electrical and Electronic Engineers (IAEEE) and IEEE. He has published more than 385 papers in the International Journals and Conferences Proceedings
Seyed Mohammad Taghi Bathaee was born in Iran on July 1950. He graduated from K.N.T University, Tehran University, George Washington University and amir Kabir University B.Sc., B.Sc., Ms., Ph.D. respectively in math and electrical engineering. His interest is power system analysis & control.
Mohamad Reza Banaei was born in Tabriz, Iran. He received his M.Sc. degree from the Poly Technique University of Tehran, Iran, in control engineering in 1999 and his Ph.D. degree from the electrical engineering faculty of Tabriz University in power engineering in 2005. He is an Associate Professor in the Electrical Engineering Department of Azarbaijan Shahid Madani University, Iran, which he joined in 2005. His main research interests include the modeling and controlling of power electronic converters, renewable energy, modeling and controlling of FACTS and Custom Power devices and power systems dynamics.
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